the following patch was just integrated into master: commit ec3daf7e08b4c42b45fc2c84b92820af6688e11b Author: Aladyshev Konstantin aladyshev@nicevt.ru Date: Tue Dec 18 23:15:55 2012 +0400
Supermicro H8QGI: Fix routing from 16 to 55 in ACPI table
H8QGI board has 2 IO-APICS with 56 IRQ’s:
IOAPIC[0]: GSI 0-23 - SB700 southbridge IOAPIC[1]: GSI 24-55 - RD890 northbridge
`gDefaultApicDeviceInfoTable[]` structure in northbridge code
vendorcode/amd/cimx/rd890/nbIoApic.c
has IO-APIC interrupt mapping for HT and IOMMU set to last 31 IRQ pin (24+31=55).
CONST APIC_DEVICE_INFO gDefaultApicDeviceInfoTable[] = { // Group Swizzling Port Int Pin {0, 0, 31}, //HT {0, 0, 31}, //IOMMU […]
Also the same value (55) can be found in original Supermicro BIOS ACPI DSDT.
Change-Id: Ie26da1f773716d1b7f5f5f884050ae799afc0b7e Signed-off-by: Aladyshev Konstantin aladyshev@nicevt.ru Reviewed-on: http://review.coreboot.org/2047 Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao zheng.bao@amd.com Reviewed-by: Ronald G. Minnich rminnich@gmail.com
Build-Tested: build bot (Jenkins) at Wed Dec 19 23:19:48 2012, giving +1 Reviewed-By: Zheng Bao zheng.bao@amd.com at Thu Dec 20 10:59:00 2012, giving +1 Reviewed-By: Ronald G. Minnich rminnich@gmail.com at Fri Dec 21 15:43:38 2012, giving +2 See http://review.coreboot.org/2047 for details.
-gerrit