[LinuxBIOS] r402 - in LinuxBIOSv3: . mainboard/adl/msm800sev northbridge/amd/geodelx

Author: rminnich
Date: 2007-06-28 20:29:46 +0200 (Thu, 28 Jun 2007)
New Revision: 402

Added:
   LinuxBIOSv3/sdram/
Modified:
   LinuxBIOSv3/mainboard/adl/msm800sev/Makefile
   LinuxBIOSv3/northbridge/amd/geodelx/raminit.c
Log:
Trivial cleanup to make things compile:
- Makefile corretion
- one last usage of msr_t (we hope)

Hmm, did we decide to add sdram directory? I will remove this -- it's a
mistake.

Signed-off-by: Ronald G. Minnich 
Acked-by: Ronald G. Minnich

Modified: LinuxBIOSv3/mainboard/adl/msm800sev/Makefile
===================================================================
--- LinuxBIOSv3/mainboard/adl/msm800sev/Makefile	2007-06-28 17:12:37 UTC (rev 401)
+++ LinuxBIOSv3/mainboard/adl/msm800sev/Makefile	2007-06-28 18:29:46 UTC (rev 402)
@@ -29,7 +29,7 @@
    	$(obj)/southbridge/amd/cs5536/cs5536_early_setup.o\
    	$(obj)/superio/winbond/w83627hf/w83627hf_early_serial.o\
    	$(obj)/device/pnp_raw.o \
-		$(obj)/arch/x86/geodelx.o
+		$(obj)/arch/x86/geodelx/geodelx.o

$(obj)/linuxbios.initram: $(obj)/stage0.init $(obj)/stage0.o $(INITRAM_OBJ) 
    $(Q)# initram links against stage0
@@ -67,9 +67,9 @@
    $(Q)printf "  OBJCOPY $(subst $(shell pwd)/,,$(@))\n"
    $(Q)$(OBJCOPY) -O binary $< $@

-STAGE2_MAINBOARD_OBJ = 
+STAGE2_MAINBOARD_OBJ =

-STAGE2_CHIPSET_OBJ =  		$(obj)/arch/x86/geodecpu.o
+STAGE2_CHIPSET_OBJ =  		$(obj)/arch/x86/geodelx/geodelx.o $(obj)/arch/x86/geodelx/cpu.o

$(obj)/mainboard/$(MAINBOARDDIR)/%.o: $(src)/mainboard/$(MAINBOARDDIR)/%.c
    $(Q)mkdir -p $(obj)/mainboard/$(MAINBOARDDIR)

Modified: LinuxBIOSv3/northbridge/amd/geodelx/raminit.c
===================================================================
--- LinuxBIOSv3/northbridge/amd/geodelx/raminit.c	2007-06-28 17:12:37 UTC (rev 401)
+++ LinuxBIOSv3/northbridge/amd/geodelx/raminit.c	2007-06-28 18:29:46 UTC (rev 402)
@@ -47,7 +47,7 @@
    u32 dimm_setting;
    u16 dimm_size;
    u8 spd_byte;
-	msr_t msr;
+	struct msr msr;

dimm_setting = 0;

@@ -207,7 +207,7 @@
 {
    u8 spd_byte0, spd_byte1;
    u16 rate0, rate1;
-	msr_t msr;
+	struct msr msr;

spd_byte0 = smbus_read_byte(dimm0, SPD_REFRESH);
    spd_byte0 &= 0xF;
@@ -261,7 +261,7 @@
 {
    u16 glspeed, dimm_speed;
    u8 spd_byte = 0xff, casmap0, casmap1;
-	msr_t msr;
+	struct msr msr;

glspeed = geode_link_speed();

@@ -359,7 +359,7 @@
 {
    u32 memspeed, dimm_setting;
    u8 spd_byte0, spd_byte1;
-	msr_t msr;
+	struct msr msr;

memspeed = geode_link_speed() / 2;
    dimm_setting = 0;
@@ -502,7 +502,7 @@
 static void set_extended_mode_registers(u8 dimm0, u8 dimm1)
 {
    u8 spd_byte0, spd_byte1;
-	msr_t msr;
+	struct msr msr;
    spd_byte0 = smbus_read_byte(dimm0, SPD_DEVICE_ATTRIBUTES_GENERAL);
    if (spd_byte0 == 0xFF) {
    	spd_byte0 = 0;
@@ -528,7 +528,7 @@
   */
 static void EnableMTest(void)
 {
-	msr_t msr;
+	struct msr msr;

msr = rdmsr(GLCP_DELAY_CONTROLS);
    msr.hi &= ~(7 << 20);	/* clear bits 54:52 */
@@ -552,7 +552,7 @@
   */
 void sdram_set_registers(void)
 {
-	msr_t msr;
+	struct msr msr;
    u32 msrnum;

/* Set Timing Control */
@@ -653,7 +653,7 @@
 void sdram_enable(u8 dimm0, u8 dimm1)
 {
    u32 i, msrnum;
-	msr_t msr;
+	struct msr msr;

post_code(POST_MEM_ENABLE);	// post_76h