On Thu, Mar 27, 2008 at 03:14:36PM +0100, Carl-Daniel Hailfinger wrote:
On 27.03.2008 04:19, Jake Peavy wrote:
I'd be interested in trying to help with this effort. It would be certainly be a learning experience for me.
If Coreboot has been ported to PPC it might be very similar. Both PPC and MIPS architectures are RISC based, but maybe that's where the similarities end.
Well, only v2 has been ported to PPC and the structure of v3 is radically different. However, the v3 structure allows much easier porting, so I think v3 would be your preferred target.
Yep, definately.
v2 (or was it v1?) also had some support for Alpha, btw.
Based on http://www.mips.com/media/files/MD00103-2B-4KE-SUM-02.04.pdfsection 6.1.5, MIPS execution begins at 0x1FC00000. At least on the MIPS32 core I have ;-)
I assume MIPS boards have some sort of ROM. How is that ROM mapped into the address space?
Also, are there generic "PC"-like machines with a standard "ROM chip" as in x86-world, or are they exclusively embedded boards? How would you go about flashing such a board? Can flashrom be hacked to support them or do you usually use some sort of JTAG interface?
Uwe.