Hello all,
My etherboot(5.0.9) payload on linuxbios failed to initialize RTL8139 successfully,but the payload inculded RTL8139 codes.
But LinuxBIOS has already initialized the RTL8139 ,because when the system was booted from IDE,RTL8139 can work well.
Could somebody help me?Thanks!
riskin
Boot Messages:
LinuxBIOS-1.0.0 Tue Nov 18 13:48:39 CST 2003 starting... Enabled first bank of RAM: 0x04000000 bytes Copying LinuxBIOS to ram. Jumping to LinuxBIOS. POST: 0x39 LinuxBIOS-1.0.0 Tue Nov 18 13:48:39 CST 2003 booting... POST: 0x40 Finding PCI configuration type. PCI: Using configuration type 1 POST: 0x5f Scanning PCI bus...PCI: pci_scan_bus for bus 0 POST: 0x24 PCI: 00:00.0 [1106/0601] PCI: 00:01.0 [1106/8601] PCI: 00:07.0 [1106/0686] PCI: 00:07.2 [1106/3038] PCI: 00:07.3 [1106/3038] PCI: 00:07.4 [1106/3057] PCI: 00:07.5 [1106/3058] PCI: 00:07.6 [1106/3068] PCI: 00:0e.0 [10ec/8139] POST: 0x25 PCI: pci_scan_bus for bus 1 POST: 0x24 POST: 0x25 PCI: pci_scan_bus returning with max=01 POST: 0x55 PCI: pci_scan_bus returning with max=01 POST: 0x55 done POST: 0x66 Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xfeb00000 - 0xfeafffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfeb00000 - 0xfeafffff] bus 1 mem PCI: 00:07.2 20 <- [0x00001c00 - 0x00001c1f] io PCI: 00:07.3 20 <- [0x00001c20 - 0x00001c3f] io PCI: 00:07.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:07.5 14 <- [0x00001c40 - 0x00001c43] io PCI: 00:07.5 18 <- [0x00001c50 - 0x00001c53] io PCI: 00:07.6 10 <- [0x00001400 - 0x000014ff] io PCI: 00:0e.0 10 <- [0x00001800 - 0x000018ff] io PCI: 00:0e.0 14 <- [0xfeb00000 - 0xfeb000ff] mem ASSIGNED RESOURCES, bus 0 done. POST: 0x88 Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:07.0 cmd <- 87 PCI: 00:07.2 cmd <- 01 PCI: 00:07.3 cmd <- 01 PCI: 00:07.4 cmd <- 00 PCI: 00:07.5 cmd <- 01 PCI: 00:07.6 cmd <- 01 PCI: 00:0e.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized POST: 0x89 Disable Cache Bank4 64MB (MA type 0x8) Enable Cache Total 64MB + frame buffer 0MB Enabling shadow DRAM at 0xC0000-0xFFFFF: done POST: 0x70 totalram: 64M Initializing CPU #0 POST: 0x60 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB Setting fixed MTRRs(24-88) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs POST: 0x6a done.
Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x03 Feature flags : 0x00803035
POST: 0x92
MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled
POST: 0x93 Disabling local apic...done. POST: 0x9b CPU #0 Initialized Mainboard fixup IDE enable in reg. 48 is 0x3 set IDE reg. 48 to 0x1 IRQs in reg. 4a are 0x4 setting reg. 4a to 0xc4 enables in reg 0x42 0xc9 enables in reg 0x42 read back as 0x9 IDE enable in reg.1-40 is 0x8 set IDE reg.1-40 to 0xb IDE enable in reg.1-40 read back is 0xb enables in reg 0x9 0x8f enables in reg 0x9 read back as 0x8a command in reg 0x4 0x80 command in reg 0x4 reads back as 0x7 pci_routing_fixup: dev is 000125e4 setting southbridge Assigning IRQ 11 to 0:7.2 Readback = 11 Assigning IRQ 11 to 0:7.3 Readback = 11 Assigning IRQ 12 to 0:7.5 Readback = 12 setting ethernet Assigning IRQ 11 to 0:e.0 Readback = 11 setting pci slot pci_routing_fixup: DONE POST: 0x75 POST: 0x77 POST: 0x91 POST: 0x92 POST: 0x95 Final mainboard fixup Southbridge fixup IDE enable in reg. 48 is 0x1 set IDE reg. 48 to 0x1 IRQs in reg. 4a are 0x4 setting reg. 4a to 0xc4 enables in reg 0x42 0x9 enables in reg 0x42 read back as 0x9 IDE enable in reg.1-40 is 0xb set IDE reg.1-40 to 0xb IDE enable in reg.1-40 read back is 0xb enables in reg 0x9 0x8a enables in reg 0x9 read back as 0x8a command in reg 0x4 0x7 command in reg 0x4 reads back as 0x7 pci_routing_fixup: dev is 000125e4 setting southbridge Assigning IRQ 11 to 0:7.2 Readback = 11 Assigning IRQ 11 to 0:7.3 Readback = 11 Assigning IRQ 12 to 0:7.5 Readback = 12 setting ethernet Assigning IRQ 11 to 0:e.0 Readback = 11 setting pci slot pci_routing_fixup: DONE POST: 0xec POST: 0x9a Checking IRQ routing tables... /home/chenyq/linuxbios/filo+bios8601/bios8601/src/arch/i386/lib/pirq_routing.c: 30:check_pirq_routing_table() - irq_routing_table located at: 0x00009ac0 done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...succeed POST: 0x96 Wrote linuxbios table at: 00000500 - 0000068c checksum 98
Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2
POST: 0xf8 37:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 New segment addr 0x94000 size 0x7c68 offset 0x80 filesize 0x3474 (cleaned up) New segment addr 0x94000 size 0x7c68 offset 0x80 filesize 0x3474 Loading Segment: addr: 0x0000000000094000 memsz: 0x0000000000007c68 filesz: 0x0000000000003474 Clearing Segment: addr: 0x0000000000097474 memsz: 0x00000000000047f4 Jumping to boot code at 0x94000 POST: 0xfe ROM segment 0x7191 length 0xbffe reloc 0x9400 Etherboot 5.0.9 (GPL) ELF for [RTL8139] routerd etherboot version 1.0.0 Probing...[RTL8139]Found Realtek 8139 ROM address 0x0000 - to enable rtl8139 rtl8139 old command 263 rtl8139 new command 263 ioaddr 0X1800, addr 00:0D:87:36:2B:ED 10Mbps half-duplex Cable not connected or other link failure No adapter found <sleep> 0
LinuxBIOS-1.0.0 Tue Nov 18 13:48:39 CST 2003 starting... Enabled first bank of RAM: 0x04000000 bytes Copying LinuxBIOS to ram. Jumping to LinuxBIOS. POST: 0x39 LinuxBIOS-1.0.0 Tue Nov 18 13:48:39 C ...