Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/826
-gerrit
commit a529a4718a63f7e0853b4c9dd32ec1c77cc7bb2c Author: Stefan Reinauer reinauer@chromium.org Date: Fri Mar 30 16:19:31 2012 -0700
Don't loop infinitely long on serial comm failures
If serial uart (8250/16x50) takes abnormally long to respond, give up on logging to serial console and instead let the system boot.
Also reference bit in LSR register with correct name.
Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com
Ported from 9dd3ef165a1bf1bc404056d3e54337de1a15ac90 to uart8250mem.c: Signed-off-by: Stefan Reinauer reinauer@google.com
Change-Id: Iaca4f57389c887110e6406d45053935891c96838 --- src/lib/uart8250mem.c | 32 +++++++++++++++++++++++--------- 1 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index a38623e..b98cb0e 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -27,24 +27,34 @@ #if !defined(__SMM__) && !defined(__PRE_RAM__) #include <device/device.h> #endif +#include <delay.h>
/* Should support 8250, 16450, 16550, 16550A type UARTs */
+/* Expected character delay at 1200bps is 9ms for a working UART + * and no flow-control. Assume UART as stuck if shift register + * or FIFO takes more than 50ms per character to appear empty. + */ +#define SINGLE_CHAR_TIMEOUT (50 * 1000) +#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) + static inline int uart8250_mem_can_tx_byte(unsigned base_port) { - return read8(base_port + UART_LSR) & UART_MSR_DSR; + return read8(base_port + UART_LSR) & UART_LSR_THRE; }
static inline void uart8250_mem_wait_to_tx_byte(unsigned base_port) { - while(!uart8250_mem_can_tx_byte(base_port)) - ; + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while(i-- && !uart8250_mem_can_tx_byte(base_port)) + udelay(1); }
static inline void uart8250_mem_wait_until_sent(unsigned base_port) { - while(!(read8(base_port + UART_LSR) & UART_LSR_TEMT)) - ; + unsigned long int i = FIFO_TIMEOUT; + while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) + udelay(1); }
void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) @@ -65,9 +75,13 @@ int uart8250_mem_can_rx_byte(unsigned base_port)
unsigned char uart8250_mem_rx_byte(unsigned base_port) { - while(!uart8250_mem_can_rx_byte(base_port)) - ; - return read8(base_port + UART_RBR); + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while(i-- && !uart8250_mem_can_rx_byte(base_port)) + udelay(1); + if (i) + return read8(base_port + UART_RBR); + else + return 0x0; }
void uart8250_mem_init(unsigned base_port, unsigned divisor) @@ -83,7 +97,7 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor) /* DLAB on */ write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS);
- /* Set Baud Rate Divisor. 12 ==> 115200 Baud */ + /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ write8(base_port + UART_DLL, divisor & 0xFF); write8(base_port + UART_DLM, (divisor >> 8) & 0xFF);