"David Hendricks" sc@flagen.com writes:
I know you guys aren't AMD tech support, I was hoping someone could help me figure this problem out. In section 3.3.8 (page 35) of their BIOS and Kernel developers guide ( http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/2609...
), they have a 32-bit UnitID register. The example given lists the lowest four bits as follows: 3-2: CPU1 Unit ID 1-2: CPU0 Unit ID
Ok, so you could give CPU1, CPU2, and CPU3 a unique ID with two binary digits, but I thought we were supposed to be able to have eight (or more?) CPUs?
Is there something obvious I'm missing?
The context. The unitid referred to are all internal to the cpu.
On current cpu implementations only CP0 is present so it is a little confusing.
Is the CPU Unit ID the same as the NodeID, or different?
Different.
Do these CPU Unit IDs even have to be unique for each CPU?
Yes.
I was thinking perhaps the CPU1 Unit ID is used only by a noncoherant device attached via Hypertransport link to what it thinks is CPU1 to differentiate the CPU it's attached to from CPU0. If this is true, is it necessary since the bootstrap processor, CPU0, is the only one with access to its northbridge and memory controller at this point?
Sorry if all this is complete and utter nonsense, I'm just a very curious newbie.
There is a lot integrated into an opteron and it takes some serious looking to really see what is going on.
Eric