What the 3d register will tell you is what INT is wired to each function. So, e.g., I would guest that 3d is like this:
USB1 1 USB2 2 USB3 3 EHCI 4
Yup. 00:1d.0 USB Controller #1 - 0x3d = 0x01 00:1d.1 USB Controller #2 - 0x3d = 0x02 00:1d.2 USB Controller #3 - 0x3d = 0x03 00:1d.7 USB Controller EHCI - 0x3d = 0x04
FYI, here is what the ICH4 data sheet says about these 0x3d registers. Looks like the PIRQ is internally specific.
USB 1,2, & 3 0x3d Interrupt Pin (INT_PN) — RO. The values of 01h, 02h, and 03h in function 0, 1, and 2, respectively, indicate to software that the corresponding ICH4 UHCI USB controllers drive the INTA#, INTB#, and INTC# PCI signals. Note that this does not determine the mapping to the ICH4 PIRQ inputs. Function 0 will drive PIRQA. Function 1 will drive PIRQD. Function 2 will drive PIRQC. Function 1 does not use the corresponding mapping in order to spread the interrupts with AC97, which has historically been mapped to PIRQB.
EHCI 0x3d Interrupt Pin (INT_PN) — RO. The value of 04h indicates that the USB EHCI function within the ICH4’s multi-function USB device will drive the fourth interrupt pin from the device (INTD# in PCI terms). The value of 04h in function 7 is required because the PCI specification does not recognize more than 4 interrupts and older APM-based OSs require that each function within a multi-function device has a different Interrupt Pin Register value. NOTE: Internally the USB EHCI controller uses PIRQ[H]#.