Corey, After scatching my head for days (hair thinning even more) I think you may be onto something. I have tried changing the values in APBASE before with no luck and I think this is why:
- APSIZE Bits[5:3] need to be set first to 111 too allow APBASE
Bits[27:25] to become R/W.
This register sets ok
- Now we can set APBASE Bits[27:25] to 111 for 32MB Aperture.
Nope not able to write to this register. Why??
- I noticed this in my bootlogs:
PCI: 00:00.0 register 10(00000008), read-only ignoring it
Which is the APBASE register. I think LB is tring to configure an address range for it but not able to because the address range is set to read only.
Boot log still says this:-(
- Set register GCC0 Bit 9 to 1. This enables access to the Aperture
allowing LB to configure an address range.
Not able to set this bit eithor.
I wish there was a way to just disable the Aperture all togethor for now but the i82830 is not designed to run in headless mode (no graphics). I will try this out and report back.
I don't know where to go from here..
Thanks - Joe
Northbridge following SDRAM init: PCI: 00:00.00 00: 86 80 75 35 06 00 10 00 04 00 00 06 00 00 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 01 00 00 00 00 00 00 00 00 02 28 00 0e 50: 72 A0 20 00 00 00 00 00 00 30 33 33 33 33 33 33 60: 00 00 04 04 00 00 00 00 00 00 00 00 00 00 00 00 70: ff f1 ff ff 00 00 00 00 10 00 00 00 70 02 00 20 80: 00 00 00 00 00 00 00 00 00 d0 00 40 00 00 00 00 90: 02 38 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 02 00 20 00 17 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 38 00 00 00 00 00 00 00 00 00 00 00 c0: 00 54 0e 41 a2 99 01 00 c0 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 09 c9 9f fc f0: 11 11 01 00 00 00 0b 05 34 d6 30 cf 22 cf 23 cf Testing DRAM : 00100000-00200000 DRAM fill: 00100000-00200000 00100000 00110000 00120000 00130000 00140000 00150000 00160000 00170000 00180000 00190000 001a0000 001b0000 001c0000 001d0000 001e0000 001f0000 00200000 DRAM filled DRAM verify: 00100000-00200000 00100000 Fail: @0x00100000 Read value=0xffffffff .................. Fail: @0x00100400 Read value=0xffffffff Aborting.
00100400 DRAM did _NOT_ verify!