[Missed coreboot List Cc]
Hi Patrick,
thanks for you reply. I've attached a new patch which addresses those issues.
Thanks,
Sven. --
For hardware that uses other addresses (like the ThinkPad X60) this means we get only one module running instead of both.
This patch adds a second parameter to sdram_initialize, which is an array with 2 * DIMM_SOCKETS members. It should contain the SPD addresses for every single DIMM socket. If NULL is given as the second parameter, the code uses the old addressing scheme.
Signed-off-by: Sven Schnelle svens@stackframe.org --- src/mainboard/getac/p470/romstage.c | 2 +- src/mainboard/ibase/mb899/romstage.c | 2 +- src/mainboard/intel/d945gclf/romstage.c | 2 +- src/mainboard/kontron/986lcd-m/romstage.c | 2 +- src/mainboard/lenovo/x60/romstage.c | 3 +- src/mainboard/roda/rk886ex/romstage.c | 2 +- src/northbridge/intel/i945/raminit.c | 57 +++++++++++++++++++---------- src/northbridge/intel/i945/raminit.h | 3 +- 8 files changed, 46 insertions(+), 27 deletions(-)