Stephen.Kimball@bench.com wrote:
If you haven't already tried... maybe a few out's to port 0x80 to slow things down.
Thats a pretty quick and easy test. I'll do that in a bit and see what happens.
No change. I still get all 0xff's (not all zeros like I said earlier)
I think I'm a victim of my own cleverness. Digging back into the code I now rember that my port is _not_ just a port of the V1 assembly. Its a total rewrite.
My port is heavly based on the AMD solo board. Thats the mainboard that had a superIO closest to mine and out of all the boards I looked at the AMD north and southbridge code was the cleanist and easiest to follow. So I basically took the smbus code from the amd8111 and changed the register defines and bit flags to match the i440bx.
Well at least thats the theory. Obviously I got something wrong. The structure for the sm_bus read already has a delay function in it. It was only one out(80,80) I bumped it up to 6 but no change.
I suspect that one of my flags is just incorrect. What needs to happen is lots of debug prints to watch the status register and verify that a single read really does the right thing.
I was kinda hopeing it would just "work". Sigh.
I can't really mess with it again till this weekend but if someone else wants the code let me know.