Thanks for suggestions..I will go through the provided link.
On Thu, Mar 15, 2012 at 11:12 PM, coreboot-request@coreboot.org wrote:
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Today's Topics:
1. Patch merged into coreboot/master: a47f09d AGESA family 12 changes to fix torpedo warnings (gerrit@coreboot.org) 2. Re: SMP stop_this_cpu and AP_IN_SIPI_WAIT (ron minnich) 3. Re: Problems with Winnet G270 Board / Igel Thin Client 3210 need help (Christian) 4. Patch merged into coreboot/master: 8cc685b Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available (gerrit@coreboot.org) 5. Fwd: kindly requesting to assign work on coreboot (manasa gv) 6. Fwd: kindly requesting to assign work on coreboot (manasa gv) 7. [RFC] Improve very early boot (Ky?sti M?lkki) 8. Re: Fwd: kindly requesting to assign work on coreboot (Paul Menzel) 9. kindly requestig to assign work on coreboot (manasa gv) 10. Re: [RFC] Improve very early boot (Patrick Georgi)
Message: 1 Date: Wed, 14 Mar 2012 00:57:57 +0100 From: gerrit@coreboot.org To: coreboot@coreboot.org Subject: [coreboot] Patch merged into coreboot/master: a47f09d AGESA family 12 changes to fix torpedo warnings Message-ID: E1S7bbJ-0007ag-Gr@ra.coresystems.de Content-Type: text/plain; charset="UTF-8"
the following patch was just integrated into master: commit a47f09d8e723896eb63ae8437250c0ee7ce68da9 Author: Martin Roth martin@se-eng.com Date: Fri Feb 17 13:16:04 2012 -0700
AGESA family 12 changes to fix torpedo warnings
Fixes the warnings generated in the torpedo mainboard build by AGESA. Removing broken tests.
Change-Id: Ib444fa2bf4dd94cadb4ce33040eb5650d1c0325b Signed-off-by: Martin L Roth martin@se-eng.com
Build-Tested: build bot (Jenkins) at Fri Feb 17 22:50:04 2012, giving +1 Reviewed-By: Stefan Reinauer stefan.reinauer@coreboot.org at Wed Feb 29 23:32:35 2012, giving +2 See http://review.coreboot.org/667 for details.
-gerrit
Message: 2 Date: Tue, 13 Mar 2012 19:40:41 -0700 From: ron minnich rminnich@gmail.com To: Ky?sti M?lkki kyosti.malkki@gmail.com Cc: Coreboot coreboot@coreboot.org Subject: Re: [coreboot] SMP stop_this_cpu and AP_IN_SIPI_WAIT Message-ID:
CAP6exYJZxNY+8SxEFKUW7pYa_j_sUsVCt1Huf-iYB5HC70cjGg@mail.gmail.com Content-Type: text/plain; charset=ISO-8859-1
On Tue, Mar 13, 2012 at 1:13 PM, Ky?sti M?lkki kyosti.malkki@gmail.com wrote:
Seems like the patch just appeared and was merged without any discussion. It would have been nice to describe the circumstances under which Intel Core Duo failed...
Assuming one is allowed to. Keep in mind that there are changes that go in that people can't talk about because they are under some sort of NDA. This may have been one of them. I do not know.
ron
Message: 3 Date: Wed, 14 Mar 2012 19:22:06 +0100 From: Christian christian.suehs@online.de To: coreboot@coreboot.org Subject: Re: [coreboot] Problems with Winnet G270 Board / Igel Thin Client 3210 need help Message-ID: 1331749326.5272.4.camel@dance-or-die3.athome.de Content-Type: text/plain; charset="UTF-8"
For Via Model A Eden I have to change the
static int c7a_speed_translation[] = { // LFM HFM
0x0409, 0x0609 // 400MHz, 844mV --> 600MHz, 844mV Eden insert this line for Via Eden 600MHz CPU
0x0409, 0x0f13, // 400MHz, 844mV --> 1500MHz, 1.004V C7-M 0x0409, 0x1018, // 400MHz, 844mV --> 1600MHz, 1.084V 0x0409, 0x0c18, // 533MHz, 844mV --> 1600MHz, 1.084V 0x0409, 0x121c, // 400MHz, 844mV --> 1800MHz, 1.148V 0x0409, 0x0e1c, // 533MHz, 844mV --> 1860MHz, 1.148V 0x0409, 0x141f, // 400MHz, 844mV --> 2000MHz, 1.196V 0x0409, 0x0f1f, // 533MHz, 844mV --> 2000MHz, 1.196V 0x0406, 0x0a06, // 400MHz, 796mV --> 1000MHz, 796mV C7-M ULV 0x0406, 0x0a09, // 400MHz, 796mV --> 1000MHz, 844mV 0x0406, 0x0c09, // 400MHz, 796mV --> 1200MHz, 844mV 0x0406, 0x0f10, // 400MHz, 796mV --> 1500MHz, 956mV };
I`m not sure about DRAM Frequency Loading the kernel is a little bit slower as with factoy Bios, should be 266MHZ.
chris
Message: 4 Date: Wed, 14 Mar 2012 23:00:27 +0100 From: gerrit@coreboot.org To: coreboot@coreboot.org Subject: [coreboot] Patch merged into coreboot/master: 8cc685b Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available Message-ID: E1S7wF9-0000ut-MO@ra.coresystems.de Content-Type: text/plain; charset="UTF-8"
the following patch was just integrated into master: commit 8cc685b2e006f3756dd26885b834fb198fa1f137 Author: Gabe Black gabeblack@google.com Date: Fri Sep 16 02:24:03 2011 -0700
Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available
Since cbfs_core.h provides a macro that uses ntohl, make sure ntohl is available by including byteorder.h
Change-Id: I9ab8cb51bd680e861b28d5130d09547bb9ab3b1f Signed-off-by: Gabe Black gabeblack@google.com
Build-Tested: build bot (Jenkins) at Fri Mar 9 05:43:36 2012, giving +1 Reviewed-By: Peter Stuge peter@stuge.se at Wed Mar 14 23:00:25 2012, giving +2 See http://review.coreboot.org/709 for details.
-gerrit
Message: 5 Date: Thu, 15 Mar 2012 15:39:31 +0530 From: manasa gv manasa671989@gmail.com To: coreboot@coreboot.org Subject: [coreboot] Fwd: kindly requesting to assign work on coreboot Message-ID:
CALYtimq4egNViWtXoh4etfz8HFV686hCB20bmfuQaFKhO5WhHA@mail.gmail.com Content-Type: text/plain; charset="iso-8859-1"
---------- Forwarded message ---------- From: manasa gv manasa671989@gmail.com Date: Thu, Mar 15, 2012 at 3:27 PM Subject: kindly requesting to assign work on coreboot To: kirantpatil@gmail.com
Respected sir,
I am Manasa, a graduate engineer intersted to work on coreboot..I have gone through the coreboot website, flashrom,supported mother boards,chipsets,bios savior and all those things.and also gone through opencompute.org site to understand regarding mother board and bus architecture..am new and interested to work on coreboot..so please assign some work related to coreboot..
Regards & Thanks, Manasa