[coreboot] Seabios: PCI interrupt routing question

[Magnus Christensson]

Hi,

I have a question about the PCI INTx pin interrupt routing in Seabios.

Specifically, what does the pci_slot_get_pirq function do? It looks like 
it assigns different interrupt numbers to devices depending on their 
device number.

But the interrupt routing in the southbridge maps a given INTx to the 
same interrupt number regardless of the device number (that mapping is 
initialized by the code with the "activate irq remapping in PIIX" comment).

To me, this looks like the INTERRUPT_LINE would be set to a value that 
does not match the actual interrupt routing (if (dev & 3) != 0).

M.