Stefan,
Is there a technical reason to split the logical "or" considering that the values constants that are known at compile time? It seems like the additional orl could be avoided by how the code was before?
BTW, I am asking to learn, not because I think it's wrong.
Thanks, wt
On Fri, Oct 1, 2010 at 5:24 AM, repository service svn@coreboot.org wrote:
Author: stepan Date: Fri Oct 1 14:24:57 2010 New Revision: 5897 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5897
Log: fix VIA C7 code. Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Modified: trunk/src/cpu/via/car/cache_as_ram.inc
Modified: trunk/src/cpu/via/car/cache_as_ram.inc
--- trunk/src/cpu/via/car/cache_as_ram.inc Fri Oct 1 13:34:05 2010 (r5896) +++ trunk/src/cpu/via/car/cache_as_ram.inc Fri Oct 1 14:24:57 2010 (r5897) @@ -100,7 +100,8 @@ */ movl $MTRRphysBase_MSR(1), %ecx xorl %edx, %edx
- movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
- movl $REAL_XIP_ROM_BASE, %eax
- orl $MTRR_TYPE_WRBACK, %eax
wrmsr
movl $MTRRphysMask_MSR(1), %ecx @@ -243,7 +244,8 @@ /* Cache XIP_ROM_BASE-SIZE to speedup coreboot code. */ movl $MTRRphysBase_MSR(3), %ecx xorl %edx, %edx
- movl $(REAL_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
- movl $REAL_XIP_ROM_BASE, %eax
- orl $MTRR_TYPE_WRBACK, %eax
wrmsr
movl $MTRRphysMask_MSR(3), %ecx
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