-----Original Message----- From: coreboot-bounces@coreboot.org [mailto:coreboot-bounces@coreboot.org] On Behalf Of Arne Georg Gleditsch Sent: Tuesday, October 19, 2010 01:51 AM To: Scott Duplichan Cc: 'Coreboot' Subject: Re: [coreboot] [PATCH] AMD F10h: set MMCONF bus count according toconfigured value
]"Scott Duplichan" scott@notabs.org writes: ] ]> For AMD family 10h processors, msr c0010058 is always programmed ]> for 256 buses, even if fewer are configured. This patch lets msr ]> c0010058 programming use the configured bus count, CONFIG_MMCONF_BUS_NUMBER. ] ]How about just renaming CONFIG_MMCONF_BUS_NUMBER to ...BUS_BITS? ]There's only 8 discrete values it can take anyway, and this would also ]make it harder to pick an unsupported value for BUS_NUMBER. ] ]-- ] Arne.
Hello Arne,
Thanks for the suggestion. It would certainly eliminate the awkward logic. On the other hand, if anyone is overriding the kconfig value CONFIG_MMCONF_BUS_NUMBER locally, they would have to update their override.
Last night, I thought I would just learn about gas macros and do it that way. It was more difficult than I thought. I cannot even find examples of gas macros that use arguments. A C style macro seemed possible, but I found when gas processes it the needed ?: does not work. So I ended up with a gas macro that does not use arguments. The macro allows the awkwark logic and additional error checking to be placed in an existing include file. The new error checking was tested by forcing a few failing cases:
Signed-off-by: Scott Duplichan scott@notabs.org
Index: src/include/cpu/amd/mtrr.h =================================================================== --- src/include/cpu/amd/mtrr.h (revision 5975) +++ src/include/cpu/amd/mtrr.h (working copy) @@ -32,6 +32,44 @@ #define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10)
+ +#if defined(ASSEMBLY) + +.macro SET_C0010058 + #if (CONFIG_MMCONF_BASE_ADDRESS > 0xFFFFFFFF) + #error MMCONF_BASE_ADDRESS too big + #elif (CONFIG_MMCONF_BASE_ADDRESS & 0xFFFFF) + #error MMCONF_BASE_ADDRESS not 1MB aligned + #endif + movl $0, %edx + movl $((CONFIG_MMCONF_BASE_ADDRESS) | (1 << 0)), %eax + #if (CONFIG_MMCONF_BUS_NUMBER == 1) + #elif (CONFIG_MMCONF_BUS_NUMBER == 2) + orl $(1 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 4) + orl $(2 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 8) + orl $(3 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 16) + orl $(4 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 32) + orl $(5 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 64) + orl $(6 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 128) + orl $(7 << 2), %eax + #elif (CONFIG_MMCONF_BUS_NUMBER == 256) + orl $(8 << 2), %eax + #else + #error "bad MMCONF_BUS_NUMBER value" + #endif + movl $(0xc0010058), %ecx + wrmsr +.endm + +#endif + + #if !defined(__PRE_RAM__) && !defined(ASSEMBLY) void amd_setup_mtrrs(void); #endif Index: src/cpu/amd/car/cache_as_ram.inc =================================================================== --- src/cpu/amd/car/cache_as_ram.inc (revision 5975) +++ src/cpu/amd/car/cache_as_ram.inc (working copy) @@ -132,15 +132,7 @@ wrmsr
#if CONFIG_MMCONF_SUPPORT - /* Set MMIO config space BAR. */ - movl $MSR_MCFG_BASE, %ecx - rdmsr - andl $(~(0xfff00000 | (0xf << 2))), %eax - orl $((CONFIG_MMCONF_BASE_ADDRESS & 0xfff00000)), %eax - orl $((8 << 2) | (1 << 0)), %eax - andl $(~(0x0000ffff)), %edx - orl $(CONFIG_MMCONF_BASE_ADDRESS >> 32), %edx - wrmsr + SET_C0010058 #endif
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