Skylake chips do not have any EHCI (USB 2.0) controllers in hardware, so using EHCI for coreboot debug is not possible.
On Mon, Sep 30, 2019, 16:14 Benjamin Doron firstname.lastname@example.org wrote:
I've been using the SPI flash console log, but thanks for the suggestion. Could I do something like that with a Raspberry Pi?
In addition, my current theory is that something is Intel ME's fault. My logs contain "ME: Version: Unavailable" and I've realised that I've been giving coreboot a stock, unconfigured image (a bad thing when considering that Purism found that the ME File System partition was essential, which contains the configuration). I'll test this when I can, but it seems to follow, so I'll hope that it works/helps. _______________________________________________ coreboot mailing list -- email@example.com To unsubscribe send an email to firstname.lastname@example.org