[coreboot] Patch set updated for coreboot: 0a6ff20 CBMEM CONSOLE: Enable coreboot CBMEM console.

[Stefan Reinauer]

Stefan Reinauer ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/722

-gerrit

commit 0a6ff20863a56b13497274ccf7642b51a7b980f3
Author: Vadim Bendebury 
Date:   Fri Sep 30 12:02:18 2011 -0700

CBMEM CONSOLE: Enable coreboot CBMEM console.

The appropriate Makefiles are modified to include the required
    source code in compilation.

Change-Id: I91842b1ba0f89d611d3249b63c020a2713a9124f
    Signed-off-by: Vadim Bendebury 
---
 src/console/Makefile.inc |    2 ++
 src/lib/Makefile.inc     |    2 ++
 2 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index 4a30918..f3b8758 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -18,6 +18,8 @@ driver-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem_console.c
 driver-$(CONFIG_USBDEBUG) += usbdebug_console.c
 driver-$(CONFIG_CONSOLE_LOGBUF) += logbuf_console.c
 driver-$(CONFIG_CONSOLE_NE2K) += ne2k_console.c
+driver-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
+

$(obj)/console/console.ramstage.o : $(obj)/build.h
 $(obj)/console/console.romstage.o : $(obj)/build.h
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index db640dc..45cb788 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -11,6 +11,7 @@ romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c
 romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c
 romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
 romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
+romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
 romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
 romstage-$(CONFIG_CONSOLE_NE2K) += compute_ip_checksum.c
 romstage-$(CONFIG_USBDEBUG) += usbdebug.c
@@ -34,6 +35,7 @@ ramstage-y += clog2.c
 ramstage-y += cbmem.c
 ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
 ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
+ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
 ramstage-$(CONFIG_USBDEBUG) += usbdebug.c
 ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c
 ramstage-$(CONFIG_TRACE) += trace.c