Quoting joe@smittys.pointclark.net:
Quoting Tom Sylla tsylla@gmail.com:
joe@smittys.pointclark.net wrote:
So, I should just need to clear any parity and serr errors after pci_bus_enable_resources() function runs but before the pci_dev_enable_resources() function runs. Like this:
Well, my suggestion was only to try that as a debug tactic. PERR or SERR set is probably something bad: misconfigured or misbehaving hardware. I don't know if blindly clearing them at first is the right solution, especially for all boards.
It is only an interesting piece of data if that fix works reliably on your board.
Well I figured out what the problem is. I have a parity error in the PD_STS?Primary Device Status Register 0x06 and can't clear the bit 15. When I try it just goes back to 0x8080. I am supposed to be able to clear this bit by writing a 1 to the bit location. Why won't it let me clear this bit?? Hugh...this is so frustrating...I am so close:-(
Anyone??
Thanks - Joe