That describes how the slot's INTA# INTB# INTC# INTD# pins are routed to the irq router's PIRQA# PIRQB# PIRQC# PIRQD# pins
for example on my board I have such routings PCI-X G2A1 OEM-slot 1 INTA# -> -> AMD8111 PIRQA# INTB# -> -> AMD8111 PIRQB# INTC# -> -> AMD8111 PIRQC# INTD# -> -> AMD8111 PIRQD# IDSEL = AD18 DEVNUM = 2 BUSNUM = 9
PCI-X G2A2 OEM-slot 2 INTA# -> -> AMD8111 PIRQB# INTB# -> -> AMD8111 PIRQC# INTC# -> -> AMD8111 PIRQD# INTD# -> -> AMD8111 PIRQA# IDSEL = AD19 DEVNUM = 3 BUSNUM = 9
so I have following entries in irq_table IRQ_SLOT(1, 9,2,0, 1,2,3,4 ), IRQ_SLOT(2, 9,3,0, 2,3,4,1 ),
wish that helps
Liu Tao
On Apr 6, 2005 9:47 PM, Peter.VanEchaute@bench.com Peter.VanEchaute@bench.com wrote:
I am trying to understand the "linka, linkb, linkc, linkd" part of this table. I understand the rest of the table, just not those pieces. Can someone give me a brief explanation? Thank you for your time.