I got some old boxes: tyan s2882-d, dual opteron processors, 16G RAM. 512K bios flash.
So far, I am not able to get it to boot. It appears to reboot during CPU init.
If anyone got coreboot working on this board, which revision did it worked last ?
Serial console:
coreboot-4.0-3129-gefb7940 Fri Nov 30 22:50:45 PST 2012 starting... Enabling routing table for node 00 done. Enabling SMP settings (0,1) link=01 (1,0) link=01 setup_remote_node: done Renaming current temporary node to 01 done. Enabling routing table for node 01 done. 02 nodes initialized. coherent_ht_finalize done SBLink=00 NC node|link=00 entering ht_optimize_link pos=0x8a, unfiltered freq_cap=0x8075 pos=0x8a, filtered freq_cap=0x75 pos=0xce, unfiltered freq_cap=0x35 freq_cap1=0x75, freq_cap2=0x15 dev1 old_freq=0x4, freq=0x4, needs_reset=0x0 dev2 old_freq=0x4, freq=0x4, needs_reset=0x0 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 entering ht_optimize_link pos=0xd2, unfiltered freq_cap=0x35 pos=0xce, unfiltered freq_cap=0x1 pos=0xce, filtered freq_cap=0x1 freq_cap1=0x15, freq_cap2=0x1 dev1 old_freq=0x0, freq=0x0, needs_reset=0x0 dev2 old_freq=0x0, freq=0x0, needs_reset=0x0 width_cap1=0x0, width_cap2=0x0 dev1 input ln_width1=0x3, ln_width2=0x3 dev1 input width=0x0 dev1 output ln_width1=0x3, ln_width2=0x3 dev1 input|output width=0x0 old dev1 input|output width=0x0 dev2 input|output width=0x0 old dev2 input|output width=0x0 SMBus controller enabled Ram1.00 setting up CPU00 northbridge registers done. Ram1.01 setting up CPU01 northbridge registers done. Ram2.00 Enabling dual channel memory Registered 200MHz Interleaved RAM end at 0x00800000 kB Handling memory mapped above 4 GB Upper RAM end at 0x00800000 kB Correcting memory amount mapped below 4 GB Adjusting lower RAM end Lower RAM end at 0x003f0000 kB Ram2.01 Enabling dual channel memory Registered 200MHz Interleaved RAM end at 0x01000000 kB Handling memory mapped above 4 GB Upper RAM end at 0x01000000 kB Correcting memory amount mapped below 4 GB Adjusting lower RAM end Lower RAM end at 0x003f0000 kB Ram3 ECC enabled ECC enabled Initializing memory: done Initializing memory: done Handling memory hole at 0x00300000 (default) RAM end at 0x01100000 kB Handling memory mapped above 4 GB Upper RAM end at 0x01100000 kB Correcting memory amount mapped below 4 GB Adjusting lower RAM end Lower RAM end at 0x00300000 kB Ram4 v_esp=000cff48 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Loading image. CBFS: Looking for 'fallback/coreboot_ram' CBFS: found.
INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} ---
Issuing SOFT_RESET...
....
No error during make. I tried building on x86_64 and x86.
thanks Kui.Z