Author: stepan Date: 2007-03-20 14:43:50 +0100 (Tue, 20 Mar 2007) New Revision: 2572
Modified: trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c Log: fix a stupid cut and paste error.
This is pretty trivial, as it was correct in the original non-CAR code. Suddently, CAR works nicely.
Signed-off-by: Stefan Reinauer stepan@coresystems.de Acked-by: Stefan Reinauer stepan@coresystems.de
Modified: trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c 2007-03-17 14:00:23 UTC (rev 2571) +++ trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c 2007-03-20 13:43:50 UTC (rev 2572) @@ -64,24 +64,26 @@ pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1); }
+/* + * GPIO28 of 8111 will control H0_MEMRESET_L + * GPIO29 of 8111 will control H1_MEMRESET_L + */ static void memreset_setup(void) { - if (is_cpu_pre_c0()) { - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0 - } - else { - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1 - } - outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17); + /* Ensure the CPU has controll of the memory lines */ + outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), + SMBUS_IO_BASE + 0xc0 + 29); }
static void memreset(int controllers, const struct mem_controller *ctrl) { - if (is_cpu_pre_c0()) { - udelay(800); - outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1 - udelay(90); - } + if (is_cpu_pre_c0()) { + udelay(800); + /* Set memreset_high */ + outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), + SMBUS_IO_BASE + 0xc0 + 28); + udelay(90); + } }
static inline void activate_spd_rom(const struct mem_controller *ctrl)