coreboot

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39686 discussions

GSoC contributor
by fikretgaripay 21 Mar '23

21 Mar '23

Dear coreboot community, My name is Fikret Garipay, and I am a final year Electrical Electronics Engineering student. I want to participate in this year's GSoC and contribute to coreboot. I have experience working with C, QEMU, Linux, git, and Bash. In addition, I have hands-on hardware experience using popular tools like flashrom. I own a coreboot-compatible g41m-es2l motherboard-based desktop and a Dell Optiplex 7010, which I have used to gain practical knowledge of coreboot. I have been developing my skills in UEFI and coreboot through the Open Security Training 2 courses. As a result, I feel prepared to contribute to the following projects: - Fully support building coreboot with the Clang compiler - Port payloads to ARM, AArch64, or RISC-V - Libpayload-based memtest payload - Fix POST code handling I have attached a log file containing the serial output of the tutorial as evidence of my work. Furthermore, I have pushed a commit to address a potential memory leak identified by scan-build. I am eager to contribute to the coreboot community and work alongside experienced developers to improve the projects. I am looking forward to receiving feedback, guidance, and mentorship from the community. Thank you for considering my application. I am excited to start contributing and making a positive impact on coreboot and its related projects. Best regards, Fikret Garipay

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4.20 release preparations
by Felix Singer 17 Mar '23

17 Mar '23

Hi everyone, 2 months passed since last release and the 4.20 release is ahead of us. I'm starting with the release preparations on Monday, which means I'm going through the patches on Gerrit (also the merged ones) and see what could add some value to the release and what needs more documentation. Patches, which should be included in the release, are marked with the following hashtag: coreboot_release_4.20 Patches lacking of documentation (no matter if release notes, user or developer documentation), are marked with the following hashtag: coreboot_needs_documentation Hashtags can be added by everyone, but the field for that is a little bit hidden. Once you have a patch open, click on "Show all" in the top left corner and then the hashtag field shows up in the list. Please feel free to add any of these hashtags yourself. In addition to that, add at least me to the reviewer list so that I'm getting notified and aware of it. If you add the hashtag for missing documentation, also add a comment about what exactly is missing. I will try to summarize the status at the end of each week. Felix

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Re: I need you help.
by Mike Banon 16 Mar '23

16 Mar '23

There is a batch of black CH341A s which are giving 5V instead of 3.3V - which is dangerous for flashing - so please try to get a green CH341A. There are plenty of them available from AliExpress / China. And about the test clips, you can find a small review of different test clips here http://dangerousprototypes.com/docs/Flashing_a_BIOS_chip_with_Bus_Pirate (double check that your BIOS chip is SOIC8 shape, otherwise that will be useless for you). The build is not difficult, there are plenty of manuals available online + a helpful community as you see ;-) On Tue, Mar 14, 2023 at 2:41 PM <email(a)danwin1210.de> wrote: > > Thank you for reply. > > I found CH341A and SOIC8. > But CH341A is not green. It is black edition. > Doesn't it work? > > And build is not difficult? > > On Tue, March 14, 2023 10:14 am, Mike Banon wrote: > > Usually, to flash a coreboot to a coreboot-supported laptop, you need > > to build a coreboot.rom firmware image for this laptop's model - and then, > > use the flashrom-supported programmer (i.e. a green PCB CH341A to simplify > > the process and reduce the costs - it's much much cheaper and simpler than > > RPi) together with a test clip which is compatible > > with the laptop's BIOS chip shape (i.e. SOIC8). More helpful instructions > > could be found online for your specific model; x230 is popular enough and > > there are a lot of guides > > > > On Tue, Mar 7, 2023 at 9:58 PM email--- via coreboot > > <coreboot(a)coreboot.org> wrote: > > > >> > >> Hello. > >> > >> > >> I would like to install Coreboot on my Lenovo x230, but I don't know > >> how to do that. Please tell me how to do it. I have done a lot of > >> research on my own, but I just can't figure it out. I am not a computer > >> educated person. > >> > >> I don't have a rasberry pie. Do I need it? > >> > >> > >> And what are skulls and heads, and what is the difference between them > >> and coreboot? > >> > >> > >> > >> _______________________________________________ > >> coreboot mailing list -- coreboot(a)coreboot.org To unsubscribe send an > >> email to coreboot-leave(a)coreboot.org > > > > > > > > -- > > Best regards, Mike Banon > > Open Source Community Manager of 3mdeb - https://3mdeb.com/ > > > > > > -- Best regards, Mike Banon Open Source Community Manager of 3mdeb - https://3mdeb.com/

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Introduction - GSoC
by Solomon Alan-Dei 15 Mar '23

15 Mar '23

Hey everyone, I am Solomon Alan-Dei from Ghana, West Africa. I look forward to participating in the upcoming GSoC and working on interesting projects in coreboot. coreboot has exciting projects that need little help and I’d be glad to contribute to any I choose to work on during GSoC period. I’m interested in low-level stuff and it’s even a plus that the coreboot community is welcoming to everyone who wants to be involved. It’s a pleasure to work with you! Best regards, Solomon.

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I need you help.
by email＠danwin1210.de 14 Mar '23

14 Mar '23

Hello. I would like to install Coreboot on my Lenovo x230, but I don't know how to do that. Please tell me how to do it. I have done a lot of research on my own, but I just can't figure it out. I am not a computer educated person. I don't have a rasberry pie. Do I need it? And what are skulls and heads, and what is the difference between them and coreboot?

2 1

Quick question for Kconfig lint checking
by Prajapati, Pratikkumar V 14 Mar '23

14 Mar '23

Hello, Quick question for Kconfig lint checking! For my patch https://review.coreboot.org/c/coreboot/+/71120, the Jenkins build fails with following error: "Check Kconfig files for errors (lint-stable-008-kconfig): #!!!!! Error: 'CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB' selected at src/soc/intel/meteorlake/Kconfig:101. Symbols created in a choice cannot be selected" What is the rationale behind enforcing this? As of now, PRMRR Kconfig settings are in common code and i wanted to set the right size from SOC specific code. e.g. the patch i mentioned earlier. Should we get rid of enforcing "lint-stable-008-kconfig" test? If not what is the best way to achieve the scenario i mentioned above. One option i think is to simplify PRMRR Kconfig options (get rid of choice menu) and define PRMRR_SIZE config option in SOC specific code. But then all SOC specific code would have to define this Kconfig option. If some SOC does not need PRMRR then also the Kconfig option with default set 0 might be needed. Thanks for suggestions in advance. -- Regards, Pratik

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Coreboot - Intel NUC
by Sandro 09 Mar '23

09 Mar '23

Hello, I am contacting you to ask for your opinion. Weeks ago I bought an Intel NUC 11 N5105 (BNUC11ATKC40002 ). Since this board does not have any SATA port, I thought that I could use a SilverStone SST-ECS07 connected to the M.2 slot. When I try to set up the sata adapter connected to my main PC ( ASUS Mainboard ROG Crosshair VIII Hero WI-FI), I have no problems seeing the drives and their partitions.... As soon as I try the same but in the NUC, then the drives are not found......lots of problems booting, and most of the time I am not even able to enter the original Intel BIOS. I reached the Intel discord server and I was able to get some feedback from a NUC team member. You can see the communication with him at: https://discord.com/channels/554824368740630529/1076245516406493195 He was able to confirm the same issues on his side, that it is a problem with this specific model BIOS. And that on other models it works. Sadly, he also gave me no realistic hopes of receiving a BIOS fix from Intel. Since I cannot return the products back I am really sad to have just wasted lots of money on these things and not being able to use them. This is when I came in contact with Coreboot.... this gave me a small light of hope.... Since I really do not know anything about this subject, neither if this would work on this specific motherboard..... I decided to ask for some opinions from you. Hopefully you could give me some good news :) Thank you very much and I wish you a good day. Best regards, Sandro

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[coreboot - Refactoring #460] (New) Make mainboards using the variant concept
by Felix Singer 09 Mar '23

09 Mar '23

Issue #460 has been reported by Felix Singer. ---------------------------------------- Refactoring #460: Make mainboards using the variant concept https://ticket.coreboot.org/issues/460 * Author: Felix Singer * Status: New * Priority: Normal * Target version: none * Start date: 2023-02-14 ---------------------------------------- * asrock/ivybridge * asrock/b75pro3-m * asrock/h77pro4-m * asrock/haswell * asrock/b85m_pro4 * asrock/h81m-hds -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[GSoC-23] Introductory mail
by Aditya Jha 08 Mar '23

08 Mar '23

Hello I am Aditya Ranjan Jha, I am a third year undergraduate student interested in OS, computer systems and architecture. I am interested in some of the project ideas of this edition of GSOC: 1) Support Power9/Power8 in coreboot 2) Learn hardware behavior from I/O and memory access log I wish to connect with the mentors to get better insights about the work to be carried out

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How To Get Coreboot On Dev One
by Sergio 07 Mar '23

07 Mar '23

Hello, Is there a service that you provide or know of that can change my HP Dev one to coreboot? I am new to Linux so pardon my ignorance... Thank you in advance, Sergio

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