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More problems with 440gx
by Gregg C Levine 18 Nov '02

18 Nov '02

Hello from Gregg C Levine Now I am completely baffled. The make files seem to think this was intended for an SMP motherboard. I'm. The motherboard I am thinking of, is a single processor based design, not a dual job. And so does the output files, yet the script output disagrees with the make files. Is there a configuration option that disables, or enables that setting that was not enumerated during the discussions for this whole process? Or did I miss something during that time period? For those of us who will ask for them I have added all of the relevant files to this message. The Script file, the Makefile, the settings file, and the config file. Gregg C Levine drwho8(a)worldnet.att.net Script started on Sun Nov 17 23:35:34 2002 root@drwho:/usr/src/lobos/work/l440gx-build/l440gx# make make: *** No rule to make target `/usr/src/lobos/freebios/src/arch/i386/smp/secondary.inc', needed by `crt0.s'. Stop. root@drwho:/usr/src/lobos/work/l440gx-build/l440gx# exit Script done on Sun Nov 17 23:35:41 2002 # File: /usr/src/lobos/work/l440gx-build/l440gx/Makefile # This file was generated by '/usr/src/lobos/freebios/util/config/NLBConfig.py l440gx.config /usr/src/lobos/freebios' # Get the value of TOP, VARIABLES, and several other variables. include Makefile.settings # Function to create an item like -Di586 or -DMAX_CPUS='1' or -Ui686 D_item = $(if $(subst undefined,,$(origin $1)),-D$1$(if $($1),='$($1)',),-U$1) # Compute the value of CPUFLAGS here during make's first pass. CPUFLAGS := $(foreach _var_,$(VARIABLES),$(call D_item,$(_var_))) # object dependencies (objectrules:) OBJECTS-1 := crt0.o DRIVERS-1 := OBJECTS-$(HAVE_OPTION_TABLE) += /$(TARGET_DIR)/option_table.o OBJECTS-1 += linuxbiosmain.o OBJECTS-1 += linuxpci.o OBJECTS-1 += newpci.o OBJECTS-1 += clog2.o OBJECTS-1 += printk.o OBJECTS-$(SERIAL_CONSOLE) += serial_subr.o OBJECTS-$(VIDEO_CONSOLE) += video_subr.o OBJECTS-$(LOGBUF_CONSOLE) += logbuf_subr.o OBJECTS-1 += subr.o OBJECTS-1 += vsprintf.o OBJECTS-1 += memset.o OBJECTS-1 += memcpy.o OBJECTS-1 += memcmp.o OBJECTS-1 += malloc.o OBJECTS-$(USE_ELF_BOOT) += elfboot.o OBJECTS-1 += do_inflate.o OBJECTS-$(BOOT_FLOPPY) += floppy_subr.o OBJECTS-1 += delay.o OBJECTS-$(HAVE_FALLBACK_BOOT) += fallback_boot.o OBJECTS-1 += compute_ip_checksum.o OBJECTS-1 += version.o DRIVERS-$(USE_GENERIC_ROM) += rom_fill_inbuf.o DRIVERS-$(USE_DOC) += docmil_fill_inbuf.o DRIVERS-$(USE_TSUNAMI_TIGBUS_ROM) += tsunami_tigbus_rom_fill_inbuf.o DRIVERS-$(USE_SERIAL_FILL_INBUF) += serial_fill_inbuf.o DRIVERS-$(USE_TFTP) += tftp_fill_inbuf.o DRIVERS-$(BOOT_FLOPPY) += floppy_fill_inbuf.o DRIVERS-$(BOOT_IDE) += ide_fill_inbuf.o OBJECTS-1 += keyboard.o OBJECTS-1 += mc146818rtc.o OBJECTS-1 += isa-dma.o OBJECTS-1 += i8259.o OBJECTS-$(CONFIG_UDELAY_TIMER2) += udelay_timer2.o OBJECTS-1 += ide.o OBJECTS-1 += boot.o OBJECTS-1 += linuxbios_table.o OBJECTS-1 += i386_subr.o OBJECTS-1 += params.o OBJECTS-1 += hardwaremain.o OBJECTS-$(HAVE_PIRQ_TABLE) += pirq_routing.o OBJECTS-$(CONFIG_VGABIOS) += vgabios.o OBJECTS-$(CONFIG_REALMODE_IDT) += idt.o OBJECTS-1 += c_start.o OBJECTS-$(HAVE_MP_TABLE) += mpspec.o OBJECTS-$(IOAPIC) += ioapic.o OBJECTS-$(SMP) += start_stop.o OBJECTS-$(SMP) += secondary.o OBJECTS-1 += northbridge.o OBJECTS-$(USE_CACHE_RAM) += raminit.o OBJECTS-1 += southbridge.o OBJECTS-$(USE_PIIX4E_SMBUS) += smbus.o OBJECTS-1 += superio.o OBJECTS-1 += mainboard.o OBJECTS-1 += mptable.o OBJECTS-$(HAVE_PIRQ_TABLE) += irq_tables.o OBJECTS-1 += microcode.o OBJECTS-1 += mtrr.o OBJECTS-1 += l2_cache.o OBJECTS-1 += cpuid.o OBJECTS-$(CONFIG_UDELAY_TSC) += delay_tsc.o # ldscript.ld dependencies: LDSUBSCRIPTS-1 := LDSUBSCRIPTS-1 += $(TOP)/src/arch/i386/config/ldscript.base LDSUBSCRIPTS-1 += $(TOP)/src/cpu/i386/entry16.lds LDSUBSCRIPTS-1 += $(TOP)/src/cpu/i386/entry32.lds LDSUBSCRIPTS-1 += $(TOP)/src/cpu/i386/reset16.lds # Dependencies for crt0_includes.h CRT0_INCLUDES:= CRT0_INCLUDES += $(TOP)/src/cpu/i386/entry16.inc CRT0_INCLUDES += $(TOP)/src/cpu/i386/entry32.inc CRT0_INCLUDES += $(TOP)/src/cpu/i386/reset16.inc CRT0_INCLUDES += $(TOP)/src/arch/i386/smp/secondary.inc CRT0_INCLUDES += $(TOP)/src/northbridge/intel/440gx/reset_test.inc CRT0_INCLUDES += $(TOP)/src/superio/NSC/pc87309/setup_serial.inc CRT0_INCLUDES += $(TOP)/src/pc80/serial.inc CRT0_INCLUDES += $(TOP)/src/arch/i386/lib/console.inc CRT0_INCLUDES += $(TOP)/src/arch/i386/lib/set_memory_size_noop.inc CRT0_INCLUDES += $(TOP)/src/northbridge/intel/440gx/raminit.inc CRT0_INCLUDES += $(TOP)/src/sdram/generic_sdram_enable.inc CRT0_INCLUDES += $(TOP)/src/sdram/generic_sdram.inc CRT0_INCLUDES += $(TOP)/src/sdram/generic_zero_ecc_sdram.inc CRT0_INCLUDES += $(TOP)/src/arch/i386/lib/cpu_reset.inc CRT0_INCLUDES += $(TOP)/src/cpu/p6/earlymtrr.inc SOURCES= SOURCES += /$(TARGET_DIR)/option_table.c SOURCES += /usr/src/lobos/freebios/src/lib/linuxbiosmain.c SOURCES += /usr/src/lobos/freebios/src/lib/linuxpci.c SOURCES += /usr/src/lobos/freebios/src/lib/newpci.c SOURCES += /usr/src/lobos/freebios/src/lib/clog2.c SOURCES += /usr/src/lobos/freebios/src/lib/printk.c SOURCES += /usr/src/lobos/freebios/src/lib/serial_subr.c SOURCES += /usr/src/lobos/freebios/src/lib/video_subr.c SOURCES += /usr/src/lobos/freebios/src/lib/logbuf_subr.c SOURCES += /usr/src/lobos/freebios/src/lib/subr.c SOURCES += /usr/src/lobos/freebios/src/lib/vsprintf.c SOURCES += /usr/src/lobos/freebios/src/lib/memset.c SOURCES += /usr/src/lobos/freebios/src/lib/memcpy.c SOURCES += /usr/src/lobos/freebios/src/lib/memcmp.c SOURCES += /usr/src/lobos/freebios/src/lib/malloc.c SOURCES += /usr/src/lobos/freebios/src/lib/elfboot.c SOURCES += /usr/src/lobos/freebios/src/lib/do_inflate.c SOURCES += /usr/src/lobos/freebios/src/lib/floppy_subr.c SOURCES += /usr/src/lobos/freebios/src/lib/delay.c SOURCES += /usr/src/lobos/freebios/src/lib/fallback_boot.c SOURCES += /usr/src/lobos/freebios/src/lib/compute_ip_checksum.c SOURCES += /usr/src/lobos/freebios/src/lib/version.c SOURCES += /usr/src/lobos/freebios/src/rom/rom_fill_inbuf.c SOURCES += /usr/src/lobos/freebios/src/rom/docmil_fill_inbuf.c SOURCES += /usr/src/lobos/freebios/src/rom/tsunami_tigbus_rom_fill_inbuf.c SOURCES += /usr/src/lobos/freebios/src/rom/serial_fill_inbuf.c SOURCES += /usr/src/lobos/freebios/src/rom/tftp_fill_inbuf.c SOURCES += /usr/src/lobos/freebios/src/rom/floppy_fill_inbuf.c SOURCES += /usr/src/lobos/freebios/src/rom/ide_fill_inbuf.c SOURCES += /usr/src/lobos/freebios/src/pc80/keyboard.c SOURCES += /usr/src/lobos/freebios/src/pc80/mc146818rtc.c SOURCES += /usr/src/lobos/freebios/src/pc80/isa-dma.c SOURCES += /usr/src/lobos/freebios/src/pc80/i8259.c SOURCES += /usr/src/lobos/freebios/src/pc80/udelay_timer2.c SOURCES += /usr/src/lobos/freebios/src/pc80/ide/ide.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/boot/boot.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/boot/linuxbios_table.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/lib/i386_subr.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/lib/params.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/lib/hardwaremain.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/lib/pirq_routing.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/lib/vgabios.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/lib/idt.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/lib/c_start.S SOURCES += /usr/src/lobos/freebios/src/arch/i386/smp/mpspec.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/smp/ioapic.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/smp/start_stop.c SOURCES += /usr/src/lobos/freebios/src/arch/i386/smp/secondary.S SOURCES += /usr/src/lobos/freebios/src/northbridge/intel/440gx/northbridge.c SOURCES += /usr/src/lobos/freebios/src/northbridge/intel/440gx/raminit.c SOURCES += /usr/src/lobos/freebios/src/southbridge/intel/piix4e/southbridge.c SOURCES += /usr/src/lobos/freebios/src/southbridge/intel/piix4e/smbus.c SOURCES += /usr/src/lobos/freebios/src/superio/NSC/pc87309/superio.c SOURCES += /usr/src/lobos/freebios/src/mainboard/intel/l440gx/mainboard.c SOURCES += /usr/src/lobos/freebios/src/mainboard/intel/l440gx/mptable.c SOURCES += /usr/src/lobos/freebios/src/mainboard/intel/l440gx/irq_tables.c SOURCES += /usr/src/lobos/freebios/src/cpu/p6/microcode.c SOURCES += /usr/src/lobos/freebios/src/cpu/p6/mtrr.c SOURCES += /usr/src/lobos/freebios/src/cpu/p6/l2_cache.c SOURCES += /usr/src/lobos/freebios/src/cpu/p5/cpuid.c SOURCES += /usr/src/lobos/freebios/src/cpu/p5/delay_tsc.c # userdefines: CPP:= $(CC) -x assembler-with-cpp -DASSEMBLY -E LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name) GCC_INC_DIR := $(shell $(CC) -print-search-dirs | sed -ne "s/install: $.*$/\1include/gp") CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS) CFLAGS := $(CPU_OPT) $(CPPFLAGS) -Os -nostdinc -nostdlib -fno-builtin -Wall HOSTCFLAGS:= -Os -Wall LINUXBIOS_PAYLOAD-$(CONFIG_COMPRESS):=linuxbios_payload.nrv2b LINUXBIOS_PAYLOAD-$(CONFIG_UNCOMPRESSED):=linuxbios_payload.bin .PHONY : crt0.s .PHONY : version.o BOOT_IMAGE=vmlinux.bin.gz.block LINUX=/usr/src/linux-2.4.17/vmlinux # mainrulelist: mainrule: all # From makerule or docipl commands: # from: /usr/src/lobos/freebios/src/config/Config ldscript.ld: ldoptions $(LDSUBSCRIPTS-1) echo "INCLUDE ldoptions" > $@ ; for file in $(LDSUBSCRIPTS-1) ; do echo "INCLUDE $$file" >> $@ ; done # from: /usr/src/lobos/freebios/src/config/Config cpuflags: Makefile.settings perl -e 'print "CPUFLAGS :=\n"; foreach $$var (split(" ", $$ENV{VARIABLES})) { if (exists($$ENV{$$var})) { print "CPUFLAGS += -D$$var" . (length($$ENV{$$var})?"=\x27$$ENV{$$var}\x27":"") ."\n"} else { print "CPUFLAGS += -U$$var\n"} }' > $@ # from: /usr/src/lobos/freebios/src/config/Config ldoptions: Makefile.settings perl -e 'foreach $$var (split(" ", $$ENV{VARIABLES})) { if ($$ENV{$$var} =~ m/^(0x[0-9a-fA-F]+|0[0-7]+|[0-9]+)$$/) { print "$$var = $$ENV{$$var};\n"; }}' > $@ # from: /usr/src/lobos/freebios/src/config/Config linuxbios.strip: linuxbios $(OBJCOPY) -O binary linuxbios linuxbios.strip # from: /usr/src/lobos/freebios/src/config/Config linuxbios_c.o: $(DRIVERS-1) linuxbios.a $(LIBGCC_FILE_NAME) $(CC) -nostdlib -r -o $@ c_start.o $(DRIVERS-1) linuxbios.a $(LIBGCC_FILE_NAME) # from: /usr/src/lobos/freebios/src/config/Config linuxbios_c: linuxbios_c.o $(TOP)/src/config/linuxbios_c.ld ldoptions $(CC) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/linuxbios_c.ld linuxbios_c.o nm -n linuxbios_c | sort > linuxbios_c.map # from: /usr/src/lobos/freebios/src/config/Config linuxbios_payload.bin: linuxbios_c $(OBJCOPY) -O binary $< $@ # from: /usr/src/lobos/freebios/src/config/Config linuxbios_payload.nrv2b: linuxbios_payload.bin nrv2b ./nrv2b e $< $@ # from: /usr/src/lobos/freebios/src/config/Config linuxbios_payload: $(LINUXBIOS_PAYLOAD-1) cp $(LINUXBIOS_PAYLOAD-1) linuxbios_payload # from: /usr/src/lobos/freebios/src/config/Config linuxbios: crt0.o linuxbios_payload ldscript.ld $(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o nm -n linuxbios | sort > linuxbios.map # from: /usr/src/lobos/freebios/src/config/Config linuxbios.a: $(OBJECTS-1) rm -f linuxbios.a ar cr linuxbios.a $(OBJECTS-1) # from: /usr/src/lobos/freebios/src/config/Config crt0.S: $(CRT0) cp $< $@ # from: /usr/src/lobos/freebios/src/config/Config crt0.s: crt0.S crt0_includes.h $(CRT0_INCLUDES) @echo "$(CPP) ... $< > $@ " @$(CPP) $(CPPFLAGS) -I$(TOP)/src $< > $@.new && mv $@.new $@ # from: /usr/src/lobos/freebios/src/config/Config crt0.o: crt0.s @echo $(CC) ... -o $@ $< @$(CC) -c $(CPU_OPT) -o $@ $< # from: /usr/src/lobos/freebios/src/config/Config etags: $(SOURCES) etags $(SOURCES) # from: /usr/src/lobos/freebios/src/config/Config tags: $(SOURCES) ctags $(SOURCES) # from: /usr/src/lobos/freebios/src/config/Config documentation: $(SOURCES) doxygen LinuxBIOSDoc.config # from: /usr/src/lobos/freebios/src/config/Config build_opt_tbl: $(TOP)/util/options/build_opt_tbl.c $(TOP)/src/include/pc80/mc146818rtc.h $(TOP)/src/include/boot/linuxbios_tables.h $(HOSTCC) $(HOSTCFLAGS) $< -o $@ # from: /usr/src/lobos/freebios/src/config/Config /$(TARGET_DIR)/option_table.c: build_opt_tbl $(MAINBOARD)/cmos.layout ./build_opt_tbl -b --config $(MAINBOARD)/cmos.layout # from: /usr/src/lobos/freebios/src/config/Config clean: rm -f linuxbios.* *~ rm -f linuxbios rm -f ldoptions cpuflags ldscript.ld rm -f a.out *.s *.l *.o rm -f TAGS tags rm -f docipl rm -f build_opt_tbl option_table.c crt0.S rm -f romimage linux.* payload.* rm -f $(PHLASH_BASE_NAME)* xa? # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base all: romimage # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base floppy: all mcopy -o romimage a: # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base romimage: linuxbios.rom payload.block cat payload.block linuxbios.rom > romimage # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base nrv2b: $(TOP)/util/nrv2b/nrv2b.c $(HOSTCC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG -DBITSIZE=32 -DENDIAN=0 $< -o $@ # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base linuxbios.rom: linuxbios.strip export size=`ls -l linuxbios.strip | (read p c u g size r ; echo $$size)` ; \ echo $$size ; \ dd if=linuxbios.strip of=linuxbios.rom bs=1 seek=`expr $(ROM_IMAGE_SIZE) - $$size` # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base payload.block: $(if $(PAYLOAD),$(PAYLOAD), linux.bin.gz) dd conv=sync bs=$(PAYLOAD_SIZE) if=$< of=$@ # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base linux.bin.gz: linux.bin gzip -f -3 linux.bin # from: /usr/src/lobos/freebios/src/arch/i386/config/make.base linux.bin: $(LINUX) objcopy -O binary -R .note -R .comment -S $< $@ # from: /usr/src/lobos/freebios/src/arch/i386/lib/Config c_start.s: /usr/src/lobos/freebios/src/arch/i386/lib/c_start.S @echo $(CPP) ... $< > $@ @$(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ # from: /usr/src/lobos/freebios/src/arch/i386/smp/Config secondary.s: /usr/src/lobos/freebios/src/arch/i386/smp/secondary.S @echo $(CPP) ... $< > $@ @$(CPP) $(CPPFLAGS) $< >$@.new && mv $@.new $@ # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config phlash_floppy: phlash mcopy -o /tmp/$(PHLASH_BASE_NAME).bi? a: # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config phlash: $(BOOT_IMAGE) linuxbios.rom headers rm -f xa? split -b 64k $(BOOT_IMAGE) # Now just touch them if we have a really # small kernel! touch xaa xab xac xad xae xaf xag xah # this is starting at bank 4, and proceeding on. Unused banks are dups # the nvram is odd, all of the banks are interleaved cat $(PHLASH_BASE_NAME).bi1.header xaa > $(PHLASH_BASE_NAME).bi1 #4 cat $(PHLASH_BASE_NAME).bi3.header xab > $(PHLASH_BASE_NAME).bi3 #6 cat $(PHLASH_BASE_NAME).bi2.header xac > $(PHLASH_BASE_NAME).bi2 #7 cat $(PHLASH_BASE_NAME).bi4.header xad > $(PHLASH_BASE_NAME).bi4 #9 cat $(PHLASH_BASE_NAME).bi7.header xae > $(PHLASH_BASE_NAME).bi7 #a cat $(PHLASH_BASE_NAME).bi6.header xaf > $(PHLASH_BASE_NAME).bi6 #b cat $(PHLASH_BASE_NAME).bi9.header xag > $(PHLASH_BASE_NAME).bi9 #c cat $(PHLASH_BASE_NAME).bi8.header xah > $(PHLASH_BASE_NAME).bi8 #d cat $(PHLASH_BASE_NAME).bia.header linuxbios.rom > $(PHLASH_BASE_NAME).bia # Part o & 5 seem not to be written reliably for some reason... cat $(PHLASH_BASE_NAME).bio.header /dev/null > $(PHLASH_BASE_NAME).bio cat $(PHLASH_BASE_NAME).bi5.header /dev/null > $(PHLASH_BASE_NAME).bi5 sh -x $(TOP)/src/mainboard/intel/l440gx/BUILD_PHLASH_FILES $(PHLASH_BASE_NAME) # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config headers: $(PHLASH_BASE_NAME).bi1.header $(PHLASH_BASE_NAME).bi2.header $(PHLASH_BASE_NAME).bi3.header $(PHLASH_BASE_NAME).bi4.header $(PHLASH_BASE_NAME).bi5.header $(PHLASH_BASE_NAME).bi6.header $(PHLASH_BASE_NAME).bi7.header $(PHLASH_BASE_NAME).bi8.header $(PHLASH_BASE_NAME).bi9.header $(PHLASH_BASE_NAME).bia.header $(PHLASH_BASE_NAME).bio.header # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi1.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi1 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi2.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi2 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi3.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi3 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi4.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi4 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi5.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi5 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi6.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi6 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi7.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi7 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi8.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi8 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bi9.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bi9 dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bia.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bia dd if=$< of=$@ bs=1 count=160 # from: /usr/src/lobos/freebios/src/mainboard/intel/l440gx/Config $(PHLASH_BASE_NAME).bio.header: $(TOP)/../intel_flash_disk/$(PHLASH_BASE_NAME).bio dd if=$< of=$@ bs=1 count=160 # objectrules: /$(TARGET_DIR)/option_table.o: /$(TARGET_DIR)/option_table.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< linuxbiosmain.o: $(TOP)/src/lib/linuxbiosmain.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< linuxpci.o: $(TOP)/src/lib/linuxpci.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< newpci.o: $(TOP)/src/lib/newpci.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< clog2.o: $(TOP)/src/lib/clog2.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< printk.o: $(TOP)/src/lib/printk.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< serial_subr.o: $(TOP)/src/lib/serial_subr.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< video_subr.o: $(TOP)/src/lib/video_subr.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< logbuf_subr.o: $(TOP)/src/lib/logbuf_subr.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< subr.o: $(TOP)/src/lib/subr.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< vsprintf.o: $(TOP)/src/lib/vsprintf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< memset.o: $(TOP)/src/lib/memset.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< memcpy.o: $(TOP)/src/lib/memcpy.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< memcmp.o: $(TOP)/src/lib/memcmp.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< malloc.o: $(TOP)/src/lib/malloc.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< elfboot.o: $(TOP)/src/lib/elfboot.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< do_inflate.o: $(TOP)/src/lib/do_inflate.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< floppy_subr.o: $(TOP)/src/lib/floppy_subr.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< delay.o: $(TOP)/src/lib/delay.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< fallback_boot.o: $(TOP)/src/lib/fallback_boot.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< compute_ip_checksum.o: $(TOP)/src/lib/compute_ip_checksum.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< version.o: $(TOP)/src/lib/version.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< rom_fill_inbuf.o: $(TOP)/src/rom/rom_fill_inbuf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< docmil_fill_inbuf.o: $(TOP)/src/rom/docmil_fill_inbuf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< tsunami_tigbus_rom_fill_inbuf.o: $(TOP)/src/rom/tsunami_tigbus_rom_fill_inbuf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< serial_fill_inbuf.o: $(TOP)/src/rom/serial_fill_inbuf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< tftp_fill_inbuf.o: $(TOP)/src/rom/tftp_fill_inbuf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< floppy_fill_inbuf.o: $(TOP)/src/rom/floppy_fill_inbuf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< ide_fill_inbuf.o: $(TOP)/src/rom/ide_fill_inbuf.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< keyboard.o: $(TOP)/src/pc80/keyboard.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< mc146818rtc.o: $(TOP)/src/pc80/mc146818rtc.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< isa-dma.o: $(TOP)/src/pc80/isa-dma.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< i8259.o: $(TOP)/src/pc80/i8259.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< udelay_timer2.o: $(TOP)/src/pc80/udelay_timer2.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< ide.o: $(TOP)/src/pc80/ide/ide.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< boot.o: $(TOP)/src/arch/i386/boot/boot.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< linuxbios_table.o: $(TOP)/src/arch/i386/boot/linuxbios_table.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< i386_subr.o: $(TOP)/src/arch/i386/lib/i386_subr.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< params.o: $(TOP)/src/arch/i386/lib/params.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< hardwaremain.o: $(TOP)/src/arch/i386/lib/hardwaremain.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< pirq_routing.o: $(TOP)/src/arch/i386/lib/pirq_routing.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< vgabios.o: $(TOP)/src/arch/i386/lib/vgabios.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< idt.o: $(TOP)/src/arch/i386/lib/idt.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< c_start.o: c_start.s @echo $(CC) ... -o $@ $< @$(CC) -c $(CPU_OPT) -o $@ $< mpspec.o: $(TOP)/src/arch/i386/smp/mpspec.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< ioapic.o: $(TOP)/src/arch/i386/smp/ioapic.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< start_stop.o: $(TOP)/src/arch/i386/smp/start_stop.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< secondary.o: secondary.s @echo $(CC) ... -o $@ $< @$(CC) -c $(CPU_OPT) -o $@ $< northbridge.o: $(TOP)/src/northbridge/intel/440gx/northbridge.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< raminit.o: $(TOP)/src/northbridge/intel/440gx/raminit.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< southbridge.o: $(TOP)/src/southbridge/intel/piix4e/southbridge.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< smbus.o: $(TOP)/src/southbridge/intel/piix4e/smbus.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< superio.o: $(TOP)/src/superio/NSC/pc87309/superio.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< mainboard.o: $(TOP)/src/mainboard/intel/l440gx/mainboard.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< mptable.o: $(TOP)/src/mainboard/intel/l440gx/mptable.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< irq_tables.o: $(TOP)/src/mainboard/intel/l440gx/irq_tables.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< microcode.o: $(TOP)/src/cpu/p6/microcode.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< mtrr.o: $(TOP)/src/cpu/p6/mtrr.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< l2_cache.o: $(TOP)/src/cpu/p6/l2_cache.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< cpuid.o: $(TOP)/src/cpu/p5/cpuid.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< delay_tsc.o: $(TOP)/src/cpu/p5/delay_tsc.c @echo $(CC) ... -o $@ $< @$(CC) -c $(CFLAGS) -o $@ $< # Remember the automatically generated files GENERATED:= GENERATED += Makefile GENERATED += Makefile.settings GENERATED += crt0_includes.h GENERATED += nsuperio.c GENERATED += LinuxBIOSDoc.config # Remake Makefile (and the other files generated by # NLBConfig.py) if any config dependencies change. $(GENERATED): /usr/src/lobos/work/l440gx.config $(GENERATED): $(TOP)/src/mainboard/intel/l440gx/Config $(GENERATED): $(TOP)/src/arch/i386/config/make.base $(GENERATED): $(TOP)/src/config/Config $(GENERATED): $(TOP)/src/lib/Config $(GENERATED): $(TOP)/src/boot/Config $(GENERATED): $(TOP)/src/rom/Config $(GENERATED): $(TOP)/src/pc80/Config $(GENERATED): $(TOP)/src/pc80/ide/Config $(GENERATED): $(TOP)/src/arch/i386/Config $(GENERATED): $(TOP)/src/arch/i386/boot/Config $(GENERATED): $(TOP)/src/arch/i386/lib/Config $(GENERATED): $(TOP)/src/arch/i386/smp/Config $(GENERATED): $(TOP)/src/northbridge/intel/440gx/Config $(GENERATED): $(TOP)/src/southbridge/intel/piix4e/Config $(GENERATED): $(TOP)/src/cpu/p6/Config $(GENERATED): $(TOP)/src/cpu/p5/Config $(GENERATED): /usr/src/lobos/work/l440gx.config $(GENERATED): $(TOP)/util/config/NLBConfig.py $(GENERATED): $(TOP)/src/arch/$(ARCH)/config/make.base $(GENERATED): python $(TOP)/util/config/NLBConfig.py /usr/src/lobos/work/l440gx.config $(TOP) echo: @echo CC='$(CC)' @echo CMD_LINE='$(CMD_LINE)' @echo CONFIGURE_L2_CACHE='$(CONFIGURE_L2_CACHE)' @echo CONFIG_COMPRESS='$(CONFIG_COMPRESS)' @echo CONFIG_LOGICAL_CPUS='$(CONFIG_LOGICAL_CPUS)' @echo CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2='$(CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2)' @echo CONFIG_UNCOMPRESSED='$(CONFIG_UNCOMPRESSED)' @echo CRT0='$(CRT0)' @echo ENABLE_FIXED_AND_VARIABLE_MTRRS='$(ENABLE_FIXED_AND_VARIABLE_MTRRS)' @echo HAVE_FRAMEBUFFER='$(HAVE_FRAMEBUFFER)' @echo HAVE_MP_TABLE='$(HAVE_MP_TABLE)' @echo HAVE_PIRQ_TABLE='$(HAVE_PIRQ_TABLE)' @echo HEAP_SIZE='$(HEAP_SIZE)' @echo HOSTCC='$(HOSTCC)' @echo INTEL_PPRO_MTRR='$(INTEL_PPRO_MTRR)' @echo IOAPIC='$(IOAPIC)' @echo L440GX='$(L440GX)' @echo LINUXBIOS_ASSEMBLER='$(LINUXBIOS_ASSEMBLER)' @echo LINUXBIOS_BUILD='$(LINUXBIOS_BUILD)' @echo LINUXBIOS_COMPILER='$(LINUXBIOS_COMPILER)' @echo LINUXBIOS_COMPILE_BY='$(LINUXBIOS_COMPILE_BY)' @echo LINUXBIOS_COMPILE_DOMAIN='$(LINUXBIOS_COMPILE_DOMAIN)' @echo LINUXBIOS_COMPILE_HOST='$(LINUXBIOS_COMPILE_HOST)' @echo LINUXBIOS_COMPILE_TIME='$(LINUXBIOS_COMPILE_TIME)' @echo LINUXBIOS_LINKER='$(LINUXBIOS_LINKER)' @echo LINUXBIOS_VERSION='$(LINUXBIOS_VERSION)' @echo MAINBOARD_PART_NUMBER='$(MAINBOARD_PART_NUMBER)' @echo MAINBOARD_VENDOR='$(MAINBOARD_VENDOR)' @echo MAX_CPUS='$(MAX_CPUS)' @echo MEMORY_HOLE='$(MEMORY_HOLE)' @echo NO_KEYBOARD='$(NO_KEYBOARD)' @echo OBJCOPY='$(OBJCOPY)' @echo PAYLOAD_SIZE='$(PAYLOAD_SIZE)' @echo PIIX4_DEVFN='$(PIIX4_DEVFN)' @echo ROM_IMAGE_SIZE='$(ROM_IMAGE_SIZE)' @echo SERIAL_CONSOLE='$(SERIAL_CONSOLE)' @echo SMP='$(SMP)' @echo STACK_SIZE='$(STACK_SIZE)' @echo UPDATE_MICROCODE='$(UPDATE_MICROCODE)' @echo USE_CACHE_RAM='$(USE_CACHE_RAM)' @echo USE_DOC='$(USE_DOC)' @echo USE_DOC_2000_TSOP='$(USE_DOC_2000_TSOP)' @echo USE_DOC_MIL='$(USE_DOC_MIL)' @echo USE_ELF_BOOT='$(USE_ELF_BOOT)' @echo USE_GENERIC_ROM='$(USE_GENERIC_ROM)' @echo XIP_ROM_BASE='$(XIP_ROM_BASE)' @echo XIP_ROM_SIZE='$(XIP_ROM_SIZE)' @echo ZKERNEL_MASK='$(ZKERNEL_MASK)' @echo ZKERNEL_START='$(ZKERNEL_START)' @echo _RAMBASE='$(_RAMBASE)' @echo _ROMBASE='$(_ROMBASE)' @echo i586='$(i586)' @echo i686='$(i686)' # File: /usr/src/lobos/work/l440gx-build/l440gx/Makefile.settings # This file was generated by '/usr/src/lobos/freebios/util/config/NLBConfig.py l440gx.config /usr/src/lobos/freebios' TOP:=/usr/src/lobos/freebios ARCH:=i386 MAINBOARD:=/usr/src/lobos/freebios/src/mainboard/intel/l440gx TARGET_DIR:=/usr/src/lobos/work/l440gx-build/l440gx export CC:=$(CROSS_COMPILE)gcc export CMD_LINE:="ro panic=5 root=/dev/hda1 console=ttyS0,115200 debug 3" export CONFIGURE_L2_CACHE:=0 export CONFIG_COMPRESS:=1 export CONFIG_LOGICAL_CPUS:=1 export CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2:=0 export CRT0:=$(TOP)/src/arch/$(ARCH)/config/crt0.base export ENABLE_FIXED_AND_VARIABLE_MTRRS:=1 export HAVE_FRAMEBUFFER:=1 export HAVE_MP_TABLE:=1 export HAVE_PIRQ_TABLE:=1 export HEAP_SIZE:=0x40000 export HOSTCC:=$(CROSS_COMPILE)gcc export INTEL_PPRO_MTRR:=1 export IOAPIC:=1 export L440GX:=1 export LINUXBIOS_ASSEMBLER:= $(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o ) export LINUXBIOS_BUILD:= $(shell date) export LINUXBIOS_COMPILER:= $(shell $(CC) $(CFLAGS) -v 2>&1 | tail -1) export LINUXBIOS_COMPILE_BY:= $(shell whoami) export LINUXBIOS_COMPILE_DOMAIN:= $(shell dnsdomainname) export LINUXBIOS_COMPILE_HOST:= $(shell hostname) export LINUXBIOS_COMPILE_TIME:= $(shell date +%T) export LINUXBIOS_LINKER:= $(shell $(CC) -Wl,-v 2>&1 | grep version | tail -1) export LINUXBIOS_VERSION:=1.0.0 export MAINBOARD_PART_NUMBER:=l440gx export MAINBOARD_VENDOR:=intel export MAX_CPUS:=2 export MEMORY_HOLE:=1 export NO_KEYBOARD:=1 export OBJCOPY:=objcopy export PAYLOAD_SIZE:=458752 export PIIX4_DEVFN:=0x90 export ROM_IMAGE_SIZE:=65536 export SERIAL_CONSOLE:=1 export SMP:=1 export STACK_SIZE:=0x2000 export UPDATE_MICROCODE:=1 export USE_CACHE_RAM:=0 export USE_DOC_2000_TSOP:=0 export USE_DOC_MIL:=0 export USE_ELF_BOOT:=1 export USE_GENERIC_ROM:=1 export XIP_ROM_BASE:=0xffff0000 export XIP_ROM_SIZE:=0x10000 export ZKERNEL_MASK:=0x3ed export ZKERNEL_START:=0xfff40000 export _RAMBASE:=0x00000800 export _ROMBASE:=0xffff0000 export i586:=1 export i686:=1 export CONFIG_UNCOMPRESSED:=${shell perl -e 'printf("%u\n", (!($(CONFIG_COMPRESS))));' } export USE_DOC:=${shell perl -e 'printf("%u\n", (($(USE_DOC_MIL))||($(USE_DOC_2000_TSOP))));' } export VARIABLES := CC CMD_LINE CONFIGURE_L2_CACHE CONFIG_COMPRESS CONFIG_LOGICAL_CPUS CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 CONFIG_UNCOMPRESSED CRT0 ENABLE_FIXED_AND_VARIABLE_MTRRS HAVE_FRAMEBUFFER HAVE_MP_TABLE HAVE_PIRQ_TABLE HEAP_SIZE HOSTCC INTEL_PPRO_MTRR IOAPIC L440GX LINUXBIOS_ASSEMBLER LINUXBIOS_BUILD LINUXBIOS_COMPILER LINUXBIOS_COMPILE_BY LINUXBIOS_COMPILE_DOMAIN LINUXBIOS_COMPILE_HOST LINUXBIOS_COMPILE_TIME LINUXBIOS_LINKER LINUXBIOS_VERSION MAINBOARD_PART_NUMBER MAINBOARD_VENDOR MAX_CPUS MEMORY_HOLE NO_KEYBOARD OBJCOPY PAYLOAD_SIZE PIIX4_DEVFN ROM_IMAGE_SIZE SERIAL_CONSOLE SMP STACK_SIZE UPDATE_MICROCODE USE_CACHE_RAM USE_DOC USE_DOC_2000_TSOP USE_DOC_MIL USE_ELF_BOOT USE_GENERIC_ROM XIP_ROM_BASE XIP_ROM_SIZE ZKERNEL_MASK ZKERNEL_START _RAMBASE _ROMBASE i586 i686 # This will make a target directory of ./winfast # Note that this is RELATIVE TO WHERE YOU ARE WHEN YOU RUN THE # CONFIG TOOL. Make it absolute if you like mainboard intel/l440gx target /usr/src/lobos/work/l440gx-build/l440gx # Enable Serial Console for debugging # It will come up at 115200,8n1 option SERIAL_CONSOLE =1 # Enable MicroCode update and L2 Cache init for PII and PIII option UPDATE_MICROCODE=1 option CONFIGURE_L2_CACHE=0 # Use the internal VGA frame buffer device option HAVE_FRAMEBUFFER=1 option USE_CACHE_RAM=0 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 #makedefine PHLASH_BASE_NAME=p13-0125 #makedefine BOOT_IMAGE=/tftpboot/netboot.ebi makedefine BOOT_IMAGE=vmlinux.bin.gz.block # Path to your kernel (vmlinux) # NOTE; you need a path to your test12 kernel here. #linux ~/projects/linux/linux-2.4.0-test9.eb5.4 linux /usr/src/linux-2.4.17 # Kernel command line parameters commandline ro panic=5 root=/dev/hda1 console=ttyS0,115200 debug 3

2 1

asking for help: how to compile doc-lilo ?
by yangzonghui＠KONKA.COM 18 Nov '02

18 Nov '02

hi all, i download source code of lilo( in doc-linux-5.0.0.tar.gz) , modify the Makefile according to lilo-0.21-doc.patch, and then key in 'make' to compile a doc-lilo binary which is normally located in /sbin, but failed to do so with a prompt "make: *** [doc.b] Error1" .that is my perplexity. thanks yang

1 0

Re: Peculiar behavor during the build process for the l440gx port
by Ronald G. Minnich 17 Nov '02

17 Nov '02

you have a typo. python /usr/src/lobos/freebios/util/config/NLBConfig.py l440gx.config /usr/src/ lobo/freebios ^^^^ lobos ron

1 0

Site down?
by Gregg C Levine 17 Nov '02

17 Nov '02

Hello again from Gregg C Levine Is there a reason for the site to be down this time? I just attempted to visit the site for the project, the site was www.linuxbios.org it gave my browser an error message. ------------------- Gregg C Levine hansolofalcon(a)worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke." Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda )

2 1

Peculiar behavor during the build process for the l440gx port
by Gregg C Levine 17 Nov '02

17 Nov '02

Hello from Gregg C Levine I am getting some darned strange error messages from the Python based builder script. It seems to reject the way the config file is setup, in favor of something totally different. Well I tried that. It did not work. So, I setup a shell script file to automate some of the steps. And with the exact same config file, as the one I've attached, I ended up with the exact same output from the scripting output. Even thiough the output is provided as a an attachment, I am going to paste it here: Script started on Sun Nov 17 17:49:12 2002 root@drwho:/usr/src/lobos/work# ./buildit.sh Process config file: /usr/src/lobo/freebios/src/mainboard/intel/l440gx/Config ===> Warning: /usr/src/lobos/work/l440gx.config:4: /usr/src/lobo/freebios/src/mainboard/intel/l440gx/Config not found Will place Makefile, crt0.S, etc. in /usr/src/lobos/work/l440gx-build/l440gx /usr/src/lobos/work/l440gx.config:10: arch, target, or mainboard must be the first commands, not option root@drwho:/usr/src/lobos/work# exit Script done on Sun Nov 17 17:49:30 2002 -------------------------------------------------------- And here is the l440gx config file: ---- # This will make a target directory of ./winfast # Note that this is RELATIVE TO WHERE YOU ARE WHEN YOU RUN THE # CONFIG TOOL. Make it absolute if you like mainboard intel/l440gx target /usr/src/lobos/work/l440gx-build/l440gx # Enable Serial Console for debugging # It will come up at 115200,8n1 option SERIAL_CONSOLE =1 # Enable MicroCode update and L2 Cache init for PII and PIII option UPDATE_MICROCODE=1 option CONFIGURE_L2_CACHE=0 # Use the internal VGA frame buffer device #option HAVE_FRAMEBUFFER option USE_CACHE_RAM=0 option USE_GENERIC_ROM=1 option USE_ELF_BOOT=1 #makedefine PHLASH_BASE_NAME=p13-0125 #makedefine BOOT_IMAGE=/tftpboot/netboot.ebi makedefine BOOT_IMAGE=vmlinux.bin.gz.block # Path to your kernel (vmlinux) # NOTE; you need a path to your test12 kernel here. #linux ~/projects/linux/linux-2.4.0-test9.eb5.4 linux /usr/src/linux-2.4.17 # Kernel command line parameters commandline ro panic=5 root=/dev/hda1 console=ttyS0,115200 debug 3 ----------------------------------------- What "Config" file is it talking about? This is on Slackware 8.0, with the current collection of tools, as of when Slackware 8.0 was released. And I am open to suiggestions. Gregg C Levine drwho8(a)worldnet.att.net "Oh my!" The Second Doctor's nearly favorite phrase.

2 1

overflowed source buffer ... segment exceeding memory
by Bill Rugolsky Jr. 15 Nov '02

15 Nov '02

I'm still trying to get LinuxBIOS booting on my Tyan S2462 board, and encountering some problems. This is with mkelfImage-1.17, binutils 2.13.90.0.2, etherboot-5.1.0.eb1, and LinuxBIOS from CVS. [ Building the LinuxBIOS CVS tree requires: perl -ni -e 'print if !/secondary\.inc/' src/mainboard/tyan/guiness/Config perl -pi -e 's/w832627hf/w83627hf/' src/mainboard/tyan/guiness/mainboard.c ] What I've done is produce a "normal" and a "fallback" romimage, catenated them together, and written the whole 512kB to the flash chip. [ At first glance I couldn't grok the whole fallback logic. ] Normal: option USE_FALLBACK_IMAGE=0 option ROM_SIZE=524288 option ROM_IMAGE_SIZE=65536 Fallback: option USE_FALLBACK_IMAGE=1 option ROM_SIZE=524288 option ROM_IMAGE_SIZE=45056 I tried several kernels with/without ramdisk; same results. At this point the sun was coming up and it was time to go to work. :-/ The boot log follows. Regards, Bill Rugolsky ==== LinuxBIOS-1.0.0 Wed Nov 13 00:17:27 EST 2002 starting... LinuxBIOS-1.0.0 Wed Nov 13 00:17:27 EST 2002 booting... Finding PCI configuration type. handle_superio port 0x0, defaultport 0x2e handle_superio Using port 0x2e Scanning PCI bus...done Allocating PCI resources...done. Enabling PCI resourcess...done. Initializing PCI devices... PCI devices initialized totalram: 1024M Initializing CPU #1 Enabling cache...done. Setting up local apic...done. CPU #1 Initialized clocks_per_usec: 1152 Initializing CPU #0 handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Enabling cache...done. Setting up local apic...done. CPU #0 Initialized handle_superio port 0x2e, defaultport 0x2e handle_superio Using port 0x2e Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 Searching for 16 byte tags 63:rom_read_bytes() - overflowed source buffer. max_block = 0 init_bytes found 0 tags ROM segment 0x0000 length 0x0000 reloc 0x9400 clocks_per_tick = 753184 Etherboot 5.1.0.eb1 (GPL) ELF (Multiboot) for [3C90X] Boot from (N)etwork or from (L)ocal? N Found 3Com980-Cyclone at 0x1C00, ROM address 0x0000 Probing...[3C90X] The PCI BIOS has not enabled this device! Updating PCI command 0003->0007. pci_bus 0000 pci_device_fn 0078 3C90X Driver 2.00 Copyright 1999 LightSys Technology Services, Inc. Portions Copyright 1999 Steve Smith Provided with ABSOLUTELY NO WARRANTY. ------------------------------------------------------------------------------- MAC Address = 00:E0:81:03:4A:31 Connectors present: 10Base-T / 100Base-TX. Searching for server (DHCP)... -\Me: 192.168.0.251, Server: 192.168.0.1, Gateway 192.168.0.1 Loading 192.168.0.1:kernel |/-(ELF)... No base memory found assuming 640K segment exceeding memory Unable to load file. <sleep> <abort> Issuing RESET: Boot from (N)etwork or from (L)ocal? N Found 3Com980-Cyclone at 0x1C00, ROM address 0x0000 Probing...[3C90X] 3C90X Driver 2.00 Copyright 1999 LightSys Technology Services, Inc. Portions Copyright 1999 Steve Smith Provided with ABSOLUTELY NO WARRANTY. ------------------------------------------------------------------------------- MAC Address = 00:E0:81:03:4A:31 Connectors present: 10Base-T / 100Base-TX. Searching for server (DHCP)... \|/-\|/Me: 192.168.0.251, Server: 192.168.0.1, Gateway 192.168.0.1 Loading 192.168.0.1:kernel -\|/(ELF)... segment exceeding memory Unable to load file. <sleep> <abort> Issuing RESET: Boot from (N)etwork or from (L)ocal? N Found 3Com980-Cyclone at 0x1C00, ROM address 0x0000 Probing...[3C90X]

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ide problem with pcm-5823
by Andrew Ip 15 Nov '02

15 Nov '02

Does any see the following errors? hdc is unusable. ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx CS5530: IDE controller on PCI bus 00 dev 92 CS5530: chipset revision 0 CS5530: not 100% native mode: will probe irqs later ide0: BM-DMA at 0x1800-0x1807, BIOS settings: hda:pio, hdb:pio ide1: BM-DMA at 0x1808-0x180f, BIOS settings: hdc:pio, hdd:pio hda: C/H/S=0/0/0 from BIOS ignored hda: LEAD DATA, ATA DISK drive hda: cs5530_set_xfer_mode(PIO 1) hda: set_drive_speed_status: status=0x51 { DriveReady SeekComplete Error } hda: set_drive_speed_status: error=0x04 { DriveStatusError } hdc: SanDisk SDCFB-16, ATA DISK drive hdc: IRQ probe failed (0xfef8) hdc: cs5530_set_xfer_mode(PIO 0) hdc: set_drive_speed_status: status=0x51 { DriveReady SeekComplete Error } hdc: set_drive_speed_status: error=0x04 { DriveStatusError } ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 ide1 at 0x170-0x177,0x376 on irq 15 (serialized with ide0) hda: 64000 sectors (33 MB) w/0KiB Cache, CHS=1000/16/4 hdc: 31360 sectors (16 MB) w/1KiB Cache, CHS=490/2/32 Partition check: hda: hda1 hdc:hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt hdc: lost interrupt [PTBL] [15/32/63] hdc1 -Andrew -- Andrew Ip Email: aip(a)cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en.

3 4

Check the status page.
by Ronald G. Minnich 15 Nov '02

15 Nov '02

The table there is perl-generated. ron

1 0

change coming.
by Ronald G. Minnich 15 Nov '02

15 Nov '02

As per my note from last night on the PIIX4E, I am going to move the SMBUS and PM base address assignment from the l440gx mainboard code to the piix4e southbridge code so that all platforms do the right thing. I'll let you know how it goes. ron

1 0

[COMMIT] pirq_routing.c
by Andrew Ip 15 Nov '02

15 Nov '02

freebios/src/arch/i386/lib/pirq_routing.c - Added verification of the copy of pirq routing table. -Andrew -- Andrew Ip Email: aip(a)cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en.

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