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39713 discussions

CVS Commit
by mark.wilkinson＠2pmtech.com 01 Dec '04

01 Dec '04

Hi All, I've just committed changes to the following files used by the VIA Epia northbridge/via/vt8601/raminit.c southbridge/via/vt8231/vt8231_early_smbus.c Changes are as follows :- re-written smbus_read_byte based on intel/i82801dbm after suggestion from ron, modifications to raminit to handle changes on re-written routine. Regards Mark Wilkinson. ---------------------------------------------------------------- This message was sent using ISPMailNow.com

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about power on
by zhu shi song 01 Dec '04

01 Dec '04

I hope when power is on, my MB can boot without press the switch. How can I do that? tks zhu __________________________________ Do you Yahoo!? Take Yahoo! Mail with you! Get it on your mobile phone. http://mobile.yahoo.com/maildemo

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RE: get_pbus
by YhLu 30 Nov '04

30 Nov '04

You mean to access extra reg space (4096 bytes) for PCI-E device? We don't need to touch that extra space ....in LinuxBIOS. Under LinuxBIOS + kernel + IB driver, the IB adapter works well with S289x. need to create one entry in mptable for the device. Otherwise it can not get INT. Currently I can not make MSI work....Kernel 2.6. YH

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MATLAB with Clustermatic
by Reza Shahidi 30 Nov '04

30 Nov '04

Hello: We have set up Clustermatic 5 on a small five-node cluster, and want to install a parallel implementation of MATLAB. Which would you recommend? MATLAB*P and STAR-P looked good, but I haven't been able to find anywhere to download them. Both ease of coding and running speed are important. If you have any experience or suggestions, could you respond? Thanks, Reza

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What's next?
by Stefan Reinauer 30 Nov '04

30 Nov '04

Hi, I am still having problems scanning the noncoherent chains connected to CPU1-3 of the motherboard I am working to support. I could temporarily work around this issue by setting the Config Base and Limit registers of those links to 0. Otherwise collapsing the chain when setting up that CPU fails. I set the Config Base and Limit registers like this: PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x04000103, PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0xff050213, since there's bus 0-4 on cpu0 when i don't scan cpu1 Looking at incoherent_ht.c there are two functions that are very similar: static int ht_setup_chain(device_t udev, unsigned upos) static int ht_setup_chains(const struct ht_chain *ht_c, int ht_c_num) the first one warns: #warning "FIXME handle multiple chains!" Should we not drop ht_setup_chain in favour of ht_setup_chains? Also later on it dies apparently in amdk8_scan_chains in northbridge/amd/amdk8/northbridge.c. Something is severely wrong with my link setup, but I double checked where the coherent and non coherent links hang off of.. Pointers? Stefan. LinuxBIOS-1.1.7.0-fallback Thu Nov 25 21:58:33 CET 2004 starting... setting up resource map....done. 04 nodes initialized. udev=(0,0x18,0) 0xb4=00ff0000bus=00 id =74501022 bus=00 id =74601022 udev=(0,0x18,0) 0x94=00000000bus=00 id =74501022 bus=00 id =74601022 udev=(0,0x18,0) 0x94=00000000bus=00 id =74501022 bus=00 id =74601022 udev=(0,0x18,0) 0x94=00000000bus=00 id =74501022 bus=00 id =74601022 PCI: 00:01.00 PCI: 00:01.01 PCI: 00:02.00 PCI: 00:02.01 PCI: 00:03.00 PCI: 00:04.00 PCI: 00:04.01 PCI: 00:04.02 PCI: 00:04.03 PCI: 00:04.05 PCI: 00:04.06 PCI: 00:18.00 PCI: 00:18.01 PCI: 00:18.02 PCI: 00:18.03 PCI: 00:19.00 PCI: 00:19.01 PCI: 00:19.02 PCI: 00:19.03 PCI: 00:1a.00 PCI: 00:1a.01 PCI: 00:1a.02 PCI: 00:1a.03 PCI: 00:1b.00 PCI: 00:1b.01 PCI: 00:1b.02 PCI: 00:1b.03 ht reset - Ram1.00 Ram1.01 Ram1.02 Ram1.03 Ram2.00 Ram2.01 Ram2.02 Ram2.03 Ram3 Initializing memory: done Initializing memory: done Initializing memory: done Initializing memory: done Clearing initial memory region: done Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.7.0-fallback Thu Nov 25 21:58:33 CET 2004 booting... Enumerating buses... PCI_DOMAIN: 0000 enabled APIC_CLUSTER: 0 enabled PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] bus ops PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: 00:19.0 [1022/1100] bus ops PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled PCI: 00:1a.0 [1022/1100] bus ops PCI: 00:1a.0 [1022/1100] enabled PCI: 00:1a.1 [1022/1101] enabled PCI: 00:1a.2 [1022/1102] enabled PCI: 00:1a.3 [1022/1103] ops PCI: 00:1a.3 [1022/1103] enabled PCI: 00:1b.0 [1022/1100] bus ops PCI: 00:1b.0 [1022/1100] enabled PCI: 00:1b.1 [1022/1101] enabled PCI: 00:1b.2 [1022/1102] enabled PCI: 00:1b.3 [1022/1103] ops PCI: 00:1b.3 [1022/1103] enabled PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 HyperT reset not needed PCI: pci_scan_bus for bus 1 PCI: 01:01.0 [1022/7450] bus ops PCI: 01:01.0 [1022/7450] enabled PCI: 01:01.1 [1022/7451] ops PCI: 01:01.1 [1022/7451] enabled PCI: 01:02.0 [1022/7450] bus ops PCI: 01:02.0 [1022/7450] enabled PCI: 01:02.1 [1022/7451] ops PCI: 01:02.1 [1022/7451] enabled PCI: 01:03.0 [1022/7460] bus ops PCI: 01:03.0 [1022/7460] enabled PCI: 01:04.0 [1022/7468] bus ops PCI: 01:04.0 [1022/7468] enabled PCI: 01:04.1 [1022/7469] ops PCI: 01:04.1 [1022/7469] enabled PCI: 01:04.2 [1022/746a] bus ops PCI: 01:04.2 [1022/746a] enabled PCI: 01:04.3 [1022/746b] bus ops PCI: 01:04.3 [1022/746b] enabled PCI: 01:04.5 No device operations PCI: 01:04.6 [1022/746e] enabled PCI: pci_scan_bus for bus 2 PCI: pci_scan_bus returning with max=02 PCI: pci_scan_bus for bus 3 PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus for bus 4 PCI: 04:00.0 [1022/7464] enabled PCI: 04:00.1 [1022/7464] enabled PCI: 04:00.2 No device operations PCI: 04:01.0 No device operations PCI: 04:04.0 [1002/4752] enabled PCI: 04:05.0 [8086/1209] enabled PCI: pci_scan_bus returning with max=04 PNP: 002e.0 enabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 disabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled I2C: 70 enabled I2C: 50 enabled I2C: 51 enabled I2C: 52 enabled I2C: 53 enabled I2C: 54 enabled I2C: 55 enabled I2C: 56 enabled I2C: 57 enabled PCI: pci_scan_bus returning with max=04

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Alignment of LinuxBIOS table structures
by Stefan Reinauer 30 Nov '04

30 Nov '04

Hi, I got an interesting report today from a customer having problems with building LinuxBIOS and the payload with different compilers The problem is that different compilers handle structure alignment differently, ie 2.95.x and 3.x have fundamental differences here: Adding __attribute__ ((packed)) to the structures helps: struct lb_memory_range { uint64_t start; uint64_t size; uint32_t type; #define LB_MEM_RAM 1 /* Memory anyone can use */ #define LB_MEM_RESERVED 2 /* Don't use this memory region */ #define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */ } __attribute__ ((packed)); struct lb_memory { uint32_t tag; uint32_t size; struct lb_memory_range map[0]; } __attribute__ ((packed)); Since this is a table that is passed in memory, we do want it to be exactly as it is defined, with no extra padding of any kind to make it reliable information. So I consider adding __attribute__ ((packed)) a good solution for the problem. If I get no good reasons against adding this, I will check it in later Stefan

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Any one have a "How to" on vga?
by Adam Talbot 30 Nov '04

30 Nov '04

OK, can any one give me a quick how to on setting up VGA? I have the system booting, kinda, and I would like to see if can get the VGA bios loaded.

2 1

Stuck. Compile error with a clean tree.
by Adam Talbot 30 Nov '04

30 Nov '04

Any one have an idea on this error? I grab a new copy of the freebios2 tree. cvs -d:pserver:anonymous@cvs.sourceforge.net:/cvsroot/freebios login cvs -z3 -d:pserver:anonymous@cvs.sourceforge.net:/cvsroot/freebios co freebios2 cd ~/freebios2/targets/ ./buildtarget digitallogic/adl855pc cd digitallogic/adl855pc/adl855pc make gcc -m32 -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o /usr/lib/gcc-lib/i686-pc-linux-gnu/3.3.4/../../../../i686-pc-linux-gnu/bin/l d: section .reset [00000000fffdfff0 -> 00000000fffdffff] overlaps section .rom [00000000fffd54f8 -> 00000000fffe686f] /usr/lib/gcc-lib/i686-pc-linux-gnu/3.3.4/../../../../i686-pc-linux-gnu/bin/l d: section .id [00000000fffdffce -> 00000000fffdffef] overlaps section .rom [00000000fffd54f8 -> 00000000fffe686f] collect2: ld returned 1 exit status make[1]: *** [linuxbios] Error 1 make[1]: Leaving directory `/root/freebios2/targets/digitallogic/adl855pc/adl855pc/normal' make: *** [normal/linuxbios.rom] Error 1 Here I stand stuck. fixing memory problems is beyond my C skill's -Adam Talbot

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RE: Any one have a "How to" on vga?
by YhLu 29 Nov '04

29 Nov '04

What's your VGA chip? Currently ati rage xl initialized in LinuxBIOS stage (dev init). --- via framebuffer and btext. Some XGI blade has some code in drivers dir too. Otherwise You need to get the system boot into Linux and use vgabios to call vga rom to init VGA. If you have problem before that, you need to stick to serial port to get debug message. YH -----Original Message----- From: Adam Talbot [mailto:talbotx@comcast.net] Sent: Monday, November 29, 2004 6:18 PM To: linuxbios(a)clustermatic.org Subject: Any one have a "How to" on vga? OK, can any one give me a quick how to on setting up VGA? I have the system booting, kinda, and I would like to see if can get the VGA bios loaded. _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

2 1

get_pbus
by YhLu 29 Nov '04

29 Nov '04

Every pci_read_config and pci_write_config need to findout top parenent bus to get bus ops. (get_pbus). It looks weird.... YH

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