coreboot

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39681 discussions

Pointers in FSP config?
by mr gadha 08 Apr '24

08 Apr '24

I've been poking around a bit more on system I'm attempting to port and started doing a detailed comparison between the FSP settings from the stock BIOS and what Coreboot is using. In going through the FSP settings, I'm noticing there are a few pointers to external tables that aren't very well documented. For example, the CoffeeLake FSP has "ChipsetInitBinPtr" / "ChipsetInitBinLen" fields, but their documentation doesn't seem to say anything beyond the names. Couldn't find any other code referencing these. Anybody know what these are?

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[coreboot - Support #534] (New) Enable Ethernet (LAN) on ADL-P Custom Board
by Mahesh Kilumu 08 Apr '24

08 Apr '24

Issue #534 has been reported by Mahesh Kilumu. ---------------------------------------- Support #534: Enable Ethernet (LAN) on ADL-P Custom Board https://ticket.coreboot.org/issues/534 * Author: Mahesh Kilumu * Status: New * Priority: Normal * Category: coreboot common code * Target version: 4.21 * Start date: 2024-03-21 ---------------------------------------- Hi, With respect to the Alderlake-P RVP platform designed Custom Board. i have been trying to implement the Ethernet(LAN) on my Custom Board. on RVP intel team used GBE PHY but on my custom board we have used the External Realtek RTL8111H controller over PCIe Root port7 for Ethernet. Below are the configuration details: 1) Devicetree.cb: device ref pcie_rp7 on end # Enable PCH PCIE RP 7 using CLK 6 register "pch_pcie_rp[PCH_RP(7)]" = "{ .clk_src = 6, .clk_req = 6, .flags = PCIE_CLK_LAN }" 2) gpio.c: /* 19: PCIE SRCCLKREQ6- same as RVP */ PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1), /* 2: GPD_2_LAN_WAKE_N- same as RVP*/ PAD_CFG_NF(GPD2, NONE, DEEP, NF1), /* 21 : LAN_ISOLATE# -New Implementation */ PAD_CFG_GPO(GPP_A21, 1, DEEP), from the logs observed that, Root port got enabled ->> [SPEW ] PCI: 00:00:1c.6: enabled 1 But observed the few Error & warnings in the log with respect to the above configuration [WARN ] Missing root port clock structure definition [ERROR] PCI: 00:00:1c.6 missing read_resources full log details : https://pastebin.com/zWcsEZvL -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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2024-04-03 - coreboot Leadership Meeting Minutes
by coreboot org 06 Apr '24

06 Apr '24

# 2024-04-03 - coreboot Leadership Meeting Minutes ## Attendees David Hendricks, Werner Zeh, Felix Held, Felix Singer, Jay Talbott, Jon Murphy, Jonathon Hall, Julius Werner, Martin Roth, Matt DeVillier, Maximilian Brune, Nicholas Chin, Philip Molloy, Mina Asante, Nico Huber, Linus Lackner. ## Announcements & Events * OCP Regional Summit: Lisbon, Portugal on April 24–25, 2024 [https://www.opencompute.org/summit/regional-summit] * FOSSY conference: August 1-4 2024 in Portland, Oregon, USA [https://sfconservancy.org/fossy/] * **[Community track proposals](https://sfconservancy.org/fossy/community-tracks) are open until April 18, 2024** * COSCUP - Taipei, Taiwan on 2024/08/03 ~ 2024/08/04 [https://coscup.org/2024/en/landing] * OSFC will be in Bochum Germany - September 3-5, 2024 [https://www.osfc.io/] * **[Call for participation](https://talks.osfc.io/osfc-2024/cfp) is open until May 31st, 2024** * OCP Global Summit: San Jose, California on October 15–17, 2024 [https://www.opencompute.org/summit/global-summit] ## Open Action Items * 2024-03-20 * [Open] Martin: Add a note to the gerrit guidelines to email the leadership. * 2024-03-06 * [Open] Martin: To update documentation on gerrit contributing guidelines. * https://doc.coreboot.org/contributing/index.html * 2024-01-10 * [Open] Werner: Push patch based on https://ticket.coreboot.org/issues/522 * Nico: https://review.coreboot.org/q/topic:enforce_region_api * [Open] Daniel: Look at how we want to localize (non console) strings for coreboot. Long term project. ## Minutes ### [Martin] Handle GOP drivers * How do we intend to handle GOP driver init going forward? Do we know what graphics card manufacturers are planning? (when) will we lose legacy option rom support on external graphics cards? Currently the option rom is specified by the PCI specification, so maybe we don’t need to worry. I’m thinking we could look at something modular, like yabel or x86emu currently do for the legacy option roms. * Graphics card manufacturers often support both UEFI and legacy option ROM init. They may get rid of legacy option ROMs at some point... * coreboot may need to implement a wrapper for a few calls needed. * Martin has a list of what needs to be supported for the AMD GOP driver. ### [Martin] [CVE-2024-3094](https://nvd.nist.gov/vuln/detail/CVE-2024-3094) liblzma build compromise * The liblzma vulnerability did not impact coreboot source, but it did affect our build server images. Something similar could be done to coreboot to introduce some sort of vulnerability into the codebase. What do we need to do to help protect the coreboot codebase against similar attacks? * Isolate test targets in makefiles from normal builds? * Move all binaries out of the coreboot tree? * Relocating binaries probably won't help. * Julius: liblzma had a few issues that helped obfuscate the problem, such as using autoconf and automake that generate unreadable Makefiles. * Get rid of release tarballs? * [https://coreboot.org/downloads.html] * The vulnerability was injected into the release tarballs. coreboot has reproducible builds, so is there a purpose for having tarballs? * Werner: Having the source tarballs is useful in his case. * Corporate release processes make it difficult to point at a source code repo. Much easier to just point at a release tarball with everything needed. * Tarballs themselves are not reproducible. This can depend on things like the version of `tar` installed. * [reproducible-builds.org] has some suggestions on how to fix this. ### [Martin] Gitiles is still disabled * It was disabled since a web crawler was hitting it with a lot of requests, causing a lot of traffic and CPU utilization, and ultimately DOS'ing Gerrit. * What do we want to do until it’s re-enabled? * Should we just re-enable it now, blocking user-agents for known web-crawlers and see how things go? * Main advantage is that you click on a hash in Gerrit and it brings you to the source code. * We can't block IP addresses, but we can block user-agents. * FelixS has volunteered to work on this. ### [Werner][https://review.coreboot.org/c/coreboot/+/69159] * TPM patch was merged that breaks timeless builds somehow. .text and another section end up overlapping other sections. * This might need a recent patch to increase bootblock size. * [https://review.coreboot.org/c/coreboot/+/80348] <-- only applies to AMD right now. * Why was this not caught by Jenkins? * It depends on the configuration, and only breaks if TPM is enabled # Next meeting * April 17, 2024. * [coreboot Calendar](https://coreboot.org/calendar.html). # Notice * Decisions shown here are not necessarily final, and are based on the current information available. If there are questions or comments about decisions made, or additional information to present, please put it on the leadership meeting agenda and show up if possible to discuss it. Of course items may also be discussed on the mailing list, but as it's difficult to interpret tone over email, controversial topics frequently do not have good progress in those discussions. For particularly difficult issues, it may be best to try to schedule another meeting. # coreboot leadership meeting minutes [2024-04-03](https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1….

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[coreboot - Bug #533] (New) T440p audio mute button and fan control not working
by frantic from xboot 06 Apr '24

06 Apr '24

Issue #533 has been reported by frantic from xboot. ---------------------------------------- Bug #533: T440p audio mute button and fan control not working https://ticket.coreboot.org/issues/533 * Author: frantic from xboot * Status: New * Priority: Normal * Target version: master * Start date: 2024-03-07 * Affected versions: master * Affected hardware: Lenovo Thinkpad T440p * Affected OS: All Linux distributions ---------------------------------------- In recent coreboot versions, the audio mute button and fan control has stopped working. Whereas you use the same revision from Libreboot, it all works fine and smoothly. This leads me to suspect that someone changed someone without testing, which is real annoying. The audio mute button technically still functions, but the LED no longer turns on/off. Always just off. Fan control no longer works with Thinkfan. /proc/acpi/ibm/fan doesn't exist any more. I've tried "force loading" thinkpad_acpi, but it doesn't work. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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Coreboot - NY NOW 2024
by Constance Brown 04 Apr '24

04 Apr '24

Hello, I trust you're in good health. Are you in the market for an event visitor database. Here's a sneak peek at what we have: NY NOW 2024 : 40714 Contacts If you're interested, I'd be happy to provide you the value & other information. Awaiting your response. Best regards. Constance Brown - Marketing Specialist Unsubscribe<mailto:constance.brown@exposforge.info?subject=Unsubscribe%20588F721D%2DF347%2D40B6%2DAE5F%2DEB5830FB9E2C&body=Please%20don%27t%20change%20the%20email%20content%20and%20send%20this%20email%20to%20unsubscribe.%0D%0A%0D%0Acoreboot@coreboot.org>

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Re: Porting Coreboot to a Mini PC
by Matt DeVillier 04 Apr '24

04 Apr '24

that's still going to cost more than $400. Add a zero and I'll think about it ;-) On Wed, Apr 3, 2024, 7:30 PM Mason Corkern <corkernm(a)berea.edu> wrote: > Yeah, I only want the port, not ongoing support. > > Thanks, > Mason Corkern > ------------------------------ > *From:* Matt DeVillier <matt.devillier(a)gmail.com> > *Sent:* Wednesday, April 3, 2024 8:25 PM > *To:* Mason Corkern <corkernm(a)berea.edu> > *Cc:* coreboot(a)coreboot.org <coreboot(a)coreboot.org> > *Subject:* Re: [coreboot] Porting Coreboot to a Mini PC > > *[EXTERNAL SENDER]* > The minisforum MiniPC you have linked is a completely different device > from the one offered by Purism/Nitrokey; the only thing similar is the form > factor. > > coreboot support has to be added on a per-mainboard basis, so the > Minisforum device you linked would need to be ported by someone who > understands coreboot and x86 firmware (or who has a lot of free time to > learn). And the mainboard on the device would need to be unencumbered by > things like Intel Bootguard (which fortunately IME most devices like that > are, but it's not a guarantee). > > If you want not just a coreboot port, but ongoing support, it's going to > cost you a heck of a lot more than the $400 you think Purism/Nitrokey are > "overcharging" by. And I say that as the developer who did the initial port > on the Purism Librem Mini/Mini v2 boards. > > -Matt > (speaking on behalf of myself, not any present or past employer) > > On Wed, Apr 3, 2024 at 5:43 PM Mason Corkern <corkernm(a)berea.edu> wrote: > > Greetings, > > I recently purchased a Mini PC from mini forums, a company based in Hong > Kong [1]. I want to replace their custom BIOS with Coreboot since it's > FOSS. Prisim and Nitro has been able to install Coreboot, but they said > they did a custom port for the motherboard/cpu and they overcharge by $400 > and justify it due to the R&D spent on porting Coreboot to the minipc [2]. > Has anyone tried porting Coreboot for similar boars and/or made a tutorial? > I couldn't find it when I googled around and looked in docs. > > > > 1. Minisforum NAB6/NPB7 Intel i7-12650H/Intel i7-13700H > <https://store.minisforum.com/products/minisforum-nab6?variant=44164535288053> > 2. Purism– Librem Mini <https://puri.sm/products/librem-mini/> and NitroPC > 1 | shop.nitrokey.com <https://shop.nitrokey.com/shop/nitropc-1-132>. > 3. > > Thanks, > Mason Corkern > _______________________________________________ > coreboot mailing list -- coreboot(a)coreboot.org > To unsubscribe send an email to coreboot-leave(a)coreboot.org > >

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Porting Coreboot to a Mini PC
by Mason Corkern 04 Apr '24

04 Apr '24

Greetings, I recently purchased a Mini PC from mini forums, a company based in Hong Kong [1]. I want to replace their custom BIOS with Coreboot since it's FOSS. Prisim and Nitro has been able to install Coreboot, but they said they did a custom port for the motherboard/cpu and they overcharge by $400 and justify it due to the R&D spent on porting Coreboot to the minipc [2]. Has anyone tried porting Coreboot for similar boars and/or made a tutorial? I couldn't find it when I googled around and looked in docs. 1. Minisforum NAB6/NPB7 Intel i7-12650H/Intel i7-13700H<https://store.minisforum.com/products/minisforum-nab6?variant=44164535288053> 2. Purism– Librem Mini<https://puri.sm/products/librem-mini/> and NitroPC 1 | shop.nitrokey.com<https://shop.nitrokey.com/shop/nitropc-1-132>. 3. Thanks, Mason Corkern

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Board revision dependent settings in device tree/override tree?
by Paul Menzel 03 Apr '24

03 Apr '24

Dear coreboot folks, Change-set *mb/google/nissa/var/craaskov: Disable external fivr* [1] moves the settings for the external fully integrated voltage regulator (FIVR) out of device tree/override tree to only apply it to board revision with an external FIVR. Is there a way to support conditions in device tree? Kind regards, Paul [1]: https://review.coreboot.org/c/coreboot/+/81607

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coreboot Meetings Announcement And Agenda Call
by mina＠coreboot.org 29 Mar '24

29 Mar '24

Dear community, Kindly note that the upcoming coreboot leadership meeting is scheduled for Wednesday, April 3, 2024.[1] Please take a moment to update the current agenda items with matters you wish to see addressed during the meeting. [2] [1](https://www.coreboot.org/calendar.html). [2](https://docs.google.com/document/d/1NRXqXcLBp5pFkHiJbrLdv3Spqh1Hu086HYkK….

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 24 Mar '24

24 Mar '24

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1540835: Null pointer dereferences (REVERSE_INULL) /util/amdfwtool/amdfwtool.c: 533 in fill_dir_header() ________________________________________________________________________________________________________ *** CID 1540835: Null pointer dereferences (REVERSE_INULL) /util/amdfwtool/amdfwtool.c: 533 in fill_dir_header() 527 psp_directory_table *dir = directory; 528 bios_directory_table *bdir = directory; 529 /* The cookies have same offsets. */ 530 uint32_t cookie = ((psp_directory_table *)directory)->header.cookie; 531 uint32_t table_size = 0; 532 >>> CID 1540835: Null pointer dereferences (REVERSE_INULL) >>> Null-checking "directory" suggests that it may be null, but it has already been dereferenced on all paths leading to the check. 533 if (ctx == NULL || directory == NULL) { 534 fprintf(stderr, "Calling %s with NULL pointers\n", __func__); 535 return; 536 } 537 538 /* The table size needs to be 0x1000 aligned. So align the end of table. */ ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=u001.AxU2LYlgjL6eX23u9ErQy-2…

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