Read my story then tell me what I need to know and do, and if I've
taken on too much.
With my P8Z77-M board committed, I've restarted another decade-old
platform coreboot port.
This time it's the M4A785TD-M EVO, another Asus board, also one where
another variant *was* already supported, but not that exact one.
I said "was" because two years ago we dropped AMD family10 CPUs and a
number of northbridge/southbridge serving them because they have not
gained some important features.
However this board is prime candidate for a port because it's 64-bit
but predates UEFI or PSP; its 1MB SPI flash was picked up by flashrom
with no extra work and the southbridge can take up to 16MB SPI meaning
I COULD fit a miniature Linux system in there. As I bought the board
along with a Phenom II 975 black CPU and DDR3 memory, it has as much
power as P8Z77-M and its i7-3770k and my daily machine the X230
tablet, meaning it is still useful as a daily.
I popped the heatsinks and have visually confirmed the chips I'm
dealing with: RS880 and SB710. Phenom II x4 975 black is a family 10h.
I backed up their codes as present before the purge and would work off
of them. I wonder what held us up back then, was it a software limit
or just lack of attention? My goal is to bring the three pieces up to
current coreboot standards and do everything natively.
For the job I got these manuals:
RS880: Databook, Register programming requirements, RRG, BKDG
SB7x0: RRG, BKDG, Databook
Fam10: BKDG, revision guide
Plus the JEDEC DDR3 specs where info on mode registers are.
So far I've done the bootblock inits of the board and SB710. I made
sure the SB710 code would enable the entire flash regardless of size.
Next I'll want to do CAR setup. The BKDG has specific instructions to
not use MMX or SSE instructions during CAR. Can we compile only some
units without SSE?
What would be my next big hurdle, with a goal of coming up with a
native raminit like ivybridge?
Is it time for a reality check before I dive too deep and start to
neglect Z77, or worse, P2B?