coreboot December 2022

coreboot@coreboot.org

28 participants
38 discussions

[coreboot - Bug #443] (New) acpica distfile changed
by Fabian Groffen 15 Jan '23

15 Jan '23

Issue #443 has been reported by Fabian Groffen. ---------------------------------------- Bug #443: acpica distfile changed https://ticket.coreboot.org/issues/443 * Author: Fabian Groffen * Status: New * Priority: Normal * Target version: none * Start date: 2022-12-04 ---------------------------------------- commit 58c79bc2537e408db2a8b5ce7723ed6dd0145652 (HEAD -> acpica-distfile-fix) Author: Fabian Groffen <grobian(a)gentoo.org> Date: Sun Dec 4 21:13:28 2022 +0100 crossgcc: fix distfile for acpica For some reason this distfile was changed into something odd. But update it. Signed-off-by: Fabian Groffen <grobian(a)gentoo.org> diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 0d349f2dfe..d9f7b73766 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -52,7 +52,7 @@ MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz" MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz" GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz" BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz" -IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz" +IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar_0.gz" # CLANG toolchain archive locations LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERS…" CLANG_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERS…" diff --git a/util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20221020.tar_0.gz.cksum similarity index 100% rename from util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum rename to util/crossgcc/sum/acpica-unix2-20221020.tar_0.gz.cksum -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #441] (New) [CRIT ] intel_me_path: mbp is not ready! & mei_me 0000:00:16.0: initialization failed.
by U dent 15 Jan '23

15 Jan '23

Issue #441 has been reported by U dent. ---------------------------------------- Bug #441: [CRIT ] intel_me_path: mbp is not ready! & mei_me 0000:00:16.0: initialization failed. https://ticket.coreboot.org/issues/441 * Author: U dent * Status: New * Priority: Normal * Category: board support * Target version: master * Start date: 2022-11-27 * Affected versions: master * Affected hardware: ASROCK H81M-HDS * Affected OS: debian 11.5 ---------------------------------------- **short journalctl -b** > Nov 27 21:19:37 debian kernel: mei_me 0000:00:16.0: H_RST is set = 0x80000015 > Nov 27 21:19:39 debian kernel: mei_me 0000:00:16.0: wait hw ready failed > Nov 27 21:19:39 debian kernel: mei_me 0000:00:16.0: hw_start failed ret = -62 > Nov 27 21:19:39 debian kernel: mei_me 0000:00:16.0: reset: reached maximal consecutive resets: disabling the device > Nov 27 21:19:39 debian kernel: mei_me 0000:00:16.0: reset failed ret = -19 > Nov 27 21:19:39 debian kernel: mei_me 0000:00:16.0: link layer initialization failed. > Nov 27 21:19:39 debian kernel: mei_me 0000:00:16.0: init hw failure. > Nov 27 21:19:39 debian kernel: mei_me 0000:00:16.0: initialization failed.` **short cbmem -1** > [CRIT ] intel_me_path: mbp is not ready! > [NOTE ] ME: BIOS path: Error > [ERROR] ME: MBP not ready **also notice** > Nov 27 21:26:57 debian kernel: usb usb1-port9: over-current condition > Nov 27 21:26:57 debian kernel: usb usb1-port10: over-current condition ---Files-------------------------------- CBMEM-LOG (45.8 KB) defconfig (768 Bytes) journalctl_b.txt (83.9 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #432] (New) t440p reboots on suspend
by Josh R 15 Jan '23

15 Jan '23

Issue #432 has been reported by Josh R. ---------------------------------------- Bug #432: t440p reboots on suspend https://ticket.coreboot.org/issues/432 * Author: Josh R * Status: New * Priority: Normal * Target version: none * Start date: 2022-10-21 * Affected versions: 4.15 * Related links: https://ticket.coreboot.org/issues/412 * Affected hardware: Lenovo t440p * Affected OS: Ubuntu 22.04 (Pop OS) ---------------------------------------- Per request, adding new ticket for an issue with my t440p where attempting to resume on suspend results in a reboot (or at least, not resuming from DRAM). My t440p already has coreboot installed (via osbmk). Following instructions from issue #412, I have attempted the following: `sudo flashrom -p internal --ifd -i bios -w the_full_12MiB_osbmk.rom --noverify-all` ...but that did not seem to do the trick (still "restarts" without resuming from RAM). Note that I am using the "full" 12MB osbmk rom (not split by 4MiB and 8MiB, as that seemed intended for the hardware flashing instructions). coreboot version looks like 4.15.204, and flashrom version 1.2-640. If it helps, attached cbmem -1 output with a "normal boot" followed by a later resume from suspend (that resulted in a restart). Thanks in advance. I guess you don't realize how much you use suspend until it doesn't work anymore :) ---Files-------------------------------- cbmem.20221019195923.normal_boot.log (36.2 KB) cbmem.20221019200724.from_suspend.log (36.3 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Support #387] (New) Support Framework Laptop
by Jun Aruga 15 Jan '23

15 Jan '23

Issue #387 has been reported by Jun Aruga. ---------------------------------------- Support #387: Support Framework Laptop https://ticket.coreboot.org/issues/387 * Author: Jun Aruga * Status: New * Priority: Normal * Category: board support * Target version: none * Start date: 2022-06-05 * Affected hardware: Framework Laptop ---------------------------------------- Dear coreboot developers, I am a user of Framework Laptop[1][2]. Thank you for working to make coreboot work on Framework Laptop! This ticket is to track the task, as I didn't see any other issue tickets about Framework Laptop here. According to the Framework founder's comment[3] below, Framework provided Framework Laptops to the coreboot community. > We've handed three systems that can boot unsigned bootloaders to folks in the coreboot community. Our plan in the near term is to help them create a shim loader that can be signed to run on any Framework Laptop, which then enables anyone to do further coreboot development. Then I saw Matthew's try to make the coreboot work on Framework Laptop,[4] but unfortunately it didn't work at that time.[5] How is the current status? What prevents coreboot from working on the Framework Laptop? How can we, people in the Framework community, help you? As a reference, there is a coreboot specific thread on the Framework community forum.[6] ## References * [1] https://frame.work/ * [2] Framework Computer - Wikipedia - https://en.wikipedia.org/wiki/Framework_Computer * [3] Framework Laptop Mainboard, Hacker News, April 20, 2022 - https://news.ycombinator.com/item?id=31097434 * [4] Matthew tries to port Coreboot to the Framework laptop - February 27, 2022 - https://www.youtube.com/watch?v=Jf_6xW-8tfQ * [5] Matthew Garrett on Twitter, February 27, 2022 - https://twitter.com/mjg59/status/1497788538212917250 * [6] Free the EC! and Coreboot Only - https://community.frame.work/t/free-the-ec-and-coreboot-only/791 -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Cleanup #421] (New) Change API of functions taking hash as an argument
by Krystian Hebel 13 Jan '23

13 Jan '23

Issue #421 has been reported by Krystian Hebel. ---------------------------------------- Cleanup #421: Change API of functions taking hash as an argument https://ticket.coreboot.org/issues/421 * Author: Krystian Hebel * Status: New * Priority: Normal * Target version: none * Start date: 2022-10-12 ---------------------------------------- All existing functions that take a digest as an input assume that only one hashing algorithm is used at a time. Crypto agile format entry can (and should) log every used PCR bank in one entry for a given measurement. To make it work, some of the arguments must be changed, e.g.: - pass number of algorithms used; - instead of algorithm ID, pass a pointer to array of such IDs, with size equal to above; - instead of hash, pass a pointer to array of hashes, with size and order as above. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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memcpy: detected field-spanning write (size 168) of single field "&device->entry" at drivers/firmware/google/coreboot_table.c:103 (size 8)
by Paul Menzel 03 Jan '23

03 Jan '23

Dear Linux folks, Running Linux v6.2-rc1+ on a motherboard using coreboot as firmware, the warning below is shown. ``` [ 1.630244] ------------[ cut here ]------------ [ 1.630249] memcpy: detected field-spanning write (size 168) of single field "&device->entry" at drivers/firmware/google/coreboot_table.c:103 (size 8) [ 1.630299] WARNING: CPU: 1 PID: 150 at drivers/firmware/google/coreboot_table.c:103 coreboot_table_probe+0x1ea/0x210 [coreboot_table] [ 1.630307] Modules linked in: coreboot_table(+) sg binfmt_misc fuse ipv6 autofs4 [ 1.630316] CPU: 1 PID: 150 Comm: systemd-udevd Not tainted 6.2.0-rc1-00097-gaebfba447cae #407 [ 1.630318] Hardware name: ASUS F2A85-M_PRO/F2A85-M_PRO, BIOS 4.18-4-gb3dd5af9c5 12/28/2022 [ 1.630320] RIP: 0010:coreboot_table_probe+0x1ea/0x210 [coreboot_table] [ 1.630326] Code: 08 00 00 00 4c 89 c6 4c 89 04 24 48 c7 c2 50 81 60 c0 48 c7 c7 98 81 60 c0 4c 89 4c 24 08 c6 05 ab 1e 00 00 01 e8 e1 ca 47 d3 <0f> 0b 4c 8b 4c 24 08 4c 8b 04 24 e9 35 ff ff ff 41 be ea ff ff ff [ 1.630329] RSP: 0018:ffffb409c046fc30 EFLAGS: 00010286 [ 1.630332] RAX: 0000000000000000 RBX: ffffb409c0175018 RCX: 0000000000000000 [ 1.630334] RDX: 0000000000000001 RSI: ffffffff94222bcd RDI: 00000000ffffffff [ 1.630336] RBP: ffff937a44a06c00 R08: 0000000000000000 R09: 00000000ffffdfff [ 1.630338] R10: ffffb409c046fad8 R11: ffffffff9452a948 R12: 0000000000000000 [ 1.630339] R13: ffffb409c0175000 R14: 0000000000000000 R15: ffff937a40beb410 [ 1.630341] FS: 0000000000000000(0000) GS:ffff937abb500000(0063) knlGS:00000000f7f43800 [ 1.630343] CS: 0010 DS: 002b ES: 002b CR0: 0000000080050033 [ 1.630345] CR2: 00000000f7e3c2cf CR3: 00000001046de000 CR4: 00000000000406e0 [ 1.630347] Call Trace: [ 1.630348] <TASK> [ 1.630351] platform_probe+0x3f/0xa0 [ 1.630357] really_probe+0xe1/0x390 [ 1.630361] ? pm_runtime_barrier+0x50/0x90 [ 1.630365] __driver_probe_device+0x78/0x180 [ 1.630369] driver_probe_device+0x1e/0x90 [ 1.630372] __driver_attach+0xd2/0x1c0 [ 1.630375] ? __pfx___driver_attach+0x10/0x10 [ 1.630378] bus_for_each_dev+0x78/0xc0 [ 1.630382] bus_add_driver+0x1a9/0x200 [ 1.630385] driver_register+0x8f/0xf0 [ 1.630387] ? __pfx_init_module+0x10/0x10 [coreboot_table] [ 1.630392] coreboot_table_driver_init+0x2d/0xff0 [coreboot_table] [ 1.630397] do_one_initcall+0x44/0x220 [ 1.630401] ? kmalloc_trace+0x25/0x90 [ 1.630405] do_init_module+0x4c/0x1f0 [ 1.630409] __do_sys_finit_module+0xb4/0x130 [ 1.630413] __do_fast_syscall_32+0x6f/0xf0 [ 1.630418] do_fast_syscall_32+0x2f/0x70 [ 1.630421] entry_SYSCALL_compat_after_hwframe+0x71/0x79 [ 1.630425] RIP: 0023:0xf7f49549 [ 1.630428] Code: 03 74 c0 01 10 05 03 74 b8 01 10 06 03 74 b4 01 10 07 03 74 b0 01 10 08 03 74 d8 01 00 00 00 00 00 51 52 55 89 cd 0f 05 cd 80 <5d> 5a 59 c3 90 90 90 90 8d b4 26 00 00 00 00 8d b4 26 00 00 00 00 [ 1.630430] RSP: 002b:00000000ffa7bbbc EFLAGS: 00200292 ORIG_RAX: 000000000000015e [ 1.630433] RAX: ffffffffffffffda RBX: 0000000000000010 RCX: 00000000f7f28e09 [ 1.630434] RDX: 0000000000000000 RSI: 00000000568cb4c0 RDI: 000000005689fc50 [ 1.630436] RBP: 0000000000000000 R08: 00000000ffa7bbbc R09: 0000000000000000 [ 1.630437] R10: 0000000000000000 R11: 0000000000200292 R12: 0000000000000000 [ 1.630439] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000 [ 1.630442] </TASK> [ 1.630443] ---[ end trace 0000000000000000 ]--- ``` Another user reported this with Linux 6.1.1 in the Arch Linux forum [1]. Kind regards, Paul [1]: https://bbs.archlinux.org/viewtopic.php?id=282245 "6.1.1-arch1-1 - dmesg"

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Trouble building coreboot early stages
by Gabriel Malaspina 02 Jan '23

02 Jan '23

Hello, I'd like to build coreboot for HP Elitebook 8570w but I keep running into trouble. I'm trying to build /coreinfo/, following the 1st part of the tutorial <https://doc.coreboot.org/tutorial/part1.html> to the letter, but it simply doesn't work. Initially I'd get an error involving /libpayload/; I got it compiled and installed following instructions in /README/ and now I'm getting the following: ... ... AR /home/gabriel/coreboot/payloads/coreinfo/libpayload/libpayload.a CC arch/x86/head.head.o.o CP /home/gabriel/coreboot/payloads/coreinfo/libpayload/head.o LPGCC coreinfo.bin /home/gabriel/coreboot/util/crossgcc/xgcc/i386-elf/bin/ld.bfd: cannot find -lpayload /home/gabriel/coreboot/util/crossgcc/xgcc/i386-elf/bin/ld.bfd: cannot find libgcc.a: No such file or directory collect2: error: ld returned 1 exit status make: *** [../libpayload/Makefile.payload:93: build/coreinfo.bin] Error 1 make: Leaving directory '/home/gabriel/coreboot/payloads/coreinfo I'd guess it's a matter of unsatisfied dependencies but I don't understand /make/ files, as of yet at least. Anyone that could point me in any direction? Thanks, Gabriel.

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Re: Cisco Meraki use coreboot in some MX products and will not provide the source code
by Martin Roth 02 Jan '23

02 Jan '23

Also, I think I tracked down the commit that that tree was based on: 5d0601767f vendorcode/amd/agesa/fam10: Build as a static library (2014-12-08) Method: I believe that coreboot's most changed file is /Makefile.inc, so I checked out every revision of that file and compared it to their Makefile.inc. That narrowed it down to somewhere in this range: Commit ID: 5839635add, Lines Different: 35 Commit ID: a234f45601, Lines Different: 0 Commit ID: 24cca75b47, Lines Different: 4 Here's the command: ``` for commit in $(git log --pretty=%h 4.0..origin/master <http://4.0..origin/master> -- Makefile.inc); do git checkout $commit >/dev/null 2>&1; printf "Commit ID: %s, Lines Different: %s\n" "$commit" "$(diff Makefile.inc ../coreboot-mx84/Makefile.inc | wc -l)" ; done ``` Then taking the commit ids before and after the identical Makefile.inc, I did a diff of the entire tree to find the minimum: Commit ID: b713d93525, Lines Different: 1391 Commit ID: a3a722c5fc, Lines Different: 1382 Commit ID: 5d0601767f, Lines Different: 1366 Commit ID: fd1349bb49, Lines Different: 1945 Commit ID: 99a3bba171, Lines Different: 2882 And the command: ``` for commit in $(git log --pretty=%h 24cca75b47..5839635add); do git checkout $commit >/dev/null 2>&1; git reset HEAD --hard >/dev/null 2>&1; printf "Commit ID: %s, Lines Different: %s\n" "$commit" "$(diff -r /work/git/coreboot-https /work/git/coreboot-mx84 | wc -l)" ; done ``` Looking at what's contained in the repo on github, I'd probably delete crossgcc/xgcc and crossgcc/tarballs from git, but that's up to you. Hope this helps. Martin Dec 22, 2022, 14:10 by coreboot(a)coreboot.org: > Hi Hal, > Thanks for bringing this up. I've added it to the agenda of the next coreboot leadership meeting to discuss how we want to handle this. > > I'll reach out to the SFC again to see what we should expect in cases like this. > > Martin > > > Dec 22, 2022, 13:42 by hal.martin(a)gmail.com: > >> Hello, >> >> Meraki provided the coreboot source code for the MX84 on 2022-12-09. >> >> I have uploaded the MX84 coreboot source code provided by Meraki to >> GitHub: https://github.com/halmartin/coreboot-mx84 >> >> The coreboot source code for the MX250 still has not been provided. >> >> Kind regards, >> Hal >> >> On Thu, Jun 30, 2022 at 3:47 AM ron minnich <rminnich(a)gmail.com> wrote: >> >>> >>> I've asked the software freedom conservancy to take a look. >>> >>> On Wed, Jun 29, 2022, 2:48 PM Hal Martin <hal.martin(a)gmail.com> wrote: >>> >>>> >>>> Hello, >>>> >>>> Several Cisco Meraki products (MX84, MX250) are using the coreboot bootloader. Meraki are also distributing coreboot builds for these products via their update mechanism. >>>> >>>> In October 2021, I requested the corresponding coreboot source code for the MX84 from open-source(a)meraki.com. Another individual requested the coreboot source code for the MX250 around the same time. We own the devices in quesiton. >>>> >>>> To date, Meraki have not provided the source code or provided an explanation as to the delay in providing the source code. The last reply I received was in January, and they have not replied to any of my follow up requests. >>>> >>>> As coreboot is GPL licensed software, I wanted to inform the coreboot community that I believe Cisco Meraki are not acting in good faith and are, in my opinion, violating the GPL by not providing the coreboot source code upon request. >>>> >>>> Kind regards, >>>> Hal Martin >>>> _______________________________________________ >>>> coreboot mailing list -- coreboot(a)coreboot.org >>>> To unsubscribe send an email to coreboot-leave(a)coreboot.org >>>> >> _______________________________________________ >> coreboot mailing list -- coreboot(a)coreboot.org >> To unsubscribe send an email to coreboot-leave(a)coreboot.org >> > > _______________________________________________ > coreboot mailing list -- coreboot(a)coreboot.org > To unsubscribe send an email to coreboot-leave(a)coreboot.org >

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Possible modification ACPI uefi bios
by José Domingo Torres Montoya 02 Jan '23

02 Jan '23

Hi, thank you in advance for your excellent work on coreboot for chromebook computers, the UEFI version is working well, but now I need a modification to be able to manage ACPI, I need the computer to always be on, and what if it has Loss of current, when the power supply returns to the Computer, turn it on again without having to press the power button If this modification is possible or already exists, tell me the cost for the feature Thank you again in advance and I look forward to your prompt response. -- www.mrfichas.com <http://www.mrwisp.com> García, Nuevo León. Area metropolitana de Monterrey WhatsApp 8133815779

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Coreboot Unexpected Exception
by Mahmut Olger 28 Dec '22

28 Dec '22

Hello, We are using intel atom C3558 denverton_NS platform. This platform is booting with coreboot4.16. Payload of coreboot is Seabios. Openbsd running in our board. Sometimes occur unexpected exception. You can find all coreboot and exception log above and you can find coreboot .config file. What is cause that exception. How can I solve it. Mahmut ÖLGER Embedded Software Engineer

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coreboot December 2022