coreboot June 2021

coreboot@coreboot.org

36 participants
29 discussions

util/intelmetool: Union Point support?
by Pete Smith 24 Jun '21

24 Jun '21

Hi, I have disabled the Intel ME firmware on a motherboard with Union Point chipset, and wanted to use intelmetool to confirm that the ME indeed has been disabled: # intelmetool -m Can't find ME PCI device I have tried to create a patch that adds Union Point support: ======================================================================= --- a/intelmetool.h +++ b/intelmetool.h @@ -437,6 +437,7 @@ #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE2 0xA1F9 /* IE Lewisburg #2 */ #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE3 0xA1FC /* IE Lewisburg #3 */ #define PCI_DEVICE_ID_INTEL_CANNONLAKE 0xA360 /* Cannon Lake */ +#define PCI_DEVICE_ID_INTEL_UNIONPOINT 0xA2BA /* Union Point */ #define PCI_DEV_HAS_SUPPORTED_ME(x) ( \ ((x) == PCI_DEVICE_ID_INTEL_COUGARPOINT_1) || \ @@ -491,4 +492,5 @@ ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE2) || \ ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE3) || \ ((x) == PCI_DEVICE_ID_INTEL_CANNONLAKE) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT) || \ 0) ======================================================================= However, this does not seem to work: # intelmetool -d -m ME PCI device is hidden RCBA addr: 0x00000000 Can't find ME PCI device I got the information for the patch by running lspci -nn on another completely identical system, as the HECI device is not showing on the one I'm talking about here, after the ME has been disabled. 00:16.0 Communication controller [0780]: Intel Corporation 200 Series PCH CSME HECI #1 [8086:a2ba] Any ideas on what I can do to make intelmetool work with the Union Point chipset? Thanks in advance. Best regards, Pete Smith

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[coreboot - Bug #312] (New) [Tianocore] gcc11: UefiPayloadPkg build fails
by coreboot＠fe80.eu 23 Jun '21

23 Jun '21

Issue #312 has been reported by Patrik Tesarik. ---------------------------------------- Bug #312: [Tianocore] gcc11: UefiPayloadPkg build fails https://ticket.coreboot.org/issues/312 * Author: Patrik Tesarik * Status: New * Priority: Normal * Assignee: Matt DeVillier * Category: * Target version: ---------------------------------------- With gcc11 the build of UefiPayloadPkg fails because the brotli code fails. This bug is fixed 'already' today (after 3 Months) in upstream brotli: https://github.com/google/brotli/pull/893 And the issue was already discussed in upstream EDK2, but it seems to me that the submodule reference(?) not fixed yet. https://bugzilla.tianocore.org/show_bug.cgi?id=3417 However, this ticket should make the maintainer of https://github.com/MrChromebox/edk2 aware that a pull of that brotli fix is trickles down somehow. Not sure what's the right way to go here. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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ApolloLake/GeminiLake Status?
by James Feeney 19 Jun '21

19 Jun '21

Back in 2017 there was some brief discussion of how to compile coreboot for apollolake, with some uncertainty about the IFWI segment. Does anyone know the current status of coreboot support for apollolake/geminilake? In particular, to replace a Chromebook boot rom? The coreboot configuration options are confusing in the sense that the intended outcome of particular settings is not explained. For instance, there is coreboot code compiled addressing the Intel FSP, but there are no FSP files generated in the resulting coreboot.rom. Working from a Chromebook bios upgrade image, it seems that many components might simply be copied from there, but then, there seems to be no tool to extract the complete IFWI segment from an existing bios image, except in pieces that would require reassembly. Is there some way that an existing IFWI segment can be extracted and used in another compiled coreboot image? Or, is there "security" code in the IFWI segment that will prevent a compatible working coreboot rom built in this way? James

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Re: Off Topic: Have spare used parts to give away
by James Feeney 18 Jun '21

18 Jun '21

Hey Clay Are your bricked motherboard and bent Ryzen still looking for a home? Send me an email - james(a)nurealm.net James

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tyan mobo?
by Michael Di Domenico 14 Jun '21

14 Jun '21

what's the likely hood that i can get coreboot to run on a tyan gpu server? this one specifically: https://www.tyan.com/Barebones_FT77DB7109_B7109F77DV14HR-2T-NFZ

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coreboot-4.8.1 ... mce errors
by Sven Semmler 11 Jun '21

11 Jun '21

Hi, this is my first time posting here and it is quite possible that I've overlooked something obvious. In that case please just point me to whatever I should have read and accept my apologies. On my ThinkPad T430 running Coreboot-4.8.1 as part of an Heads install, I see these error messages when turning on the PC: mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank: 7: ee20000000 3110a mce: [Hardware Error]: TSC 0 ADDR fefe78c0 MISC 3880000086 mce: [Hardware Error]: PROCESSOR 0:306a9 TIME 1622589409 SOCKET 0 mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank: 8: ee20000000 3110a mce: [Hardware Error]: TSC 0 ADDR fefe7880 MISC 3880000086 mce: [Hardware Error]: PROCESSOR 0:306a9 TIME 1622589409 SOCKET 0 APIC 0 microcode 1f I do not think it is an issue with the actual RAM: [i7-3520M] [2x8GB Silicon Power Hynix] ... no error [i7-3632QM] [2x8GB Silicon Power Hynix] ... mce errors [i7-3520M] [2x8GB Crucial] ... no error [i7-3740QM] [2x8GB Crucial] ... mce errors While looking at this (but for other reasons) I replaced the original i7-3520M with a i7-3632QM and then went back to the original before ultimately settling with a i7-3740QM. I also went through three different sets of RAM, one of them obviously corrupt so I didn't even include it above. All this is to say that the above and some searching leads me to think this might be more of a software / timing issue maybe -- but I am far out of my depth. Hence my asking here for ideas and pointers what to do next. Thanks & Cheers, /Sven -- public key: https://www.svensemmler.org/2A632C537D744BC7.asc fingerprint: DA59 75C9 ABC4 0C83 3B2F 620B 2A63 2C53 7D74 4BC7

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 11 Jun '21

11 Jun '21

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1457506: Null pointer dereferences (REVERSE_INULL) /src/soc/amd/common/block/acpi/bert.c: 19 in acpi_soc_get_bert_region() ________________________________________________________________________________________________________ *** CID 1457506: Null pointer dereferences (REVERSE_INULL) /src/soc/amd/common/block/acpi/bert.c: 19 in acpi_soc_get_bert_region() 13 * BERT: [Firmware Bug]: table invalid. 14 */ 15 if (!bert_should_generate_acpi_table()) 16 return CB_ERR; 17 18 bert_errors_region(region, length); >>> CID 1457506: Null pointer dereferences (REVERSE_INULL) >>> Null-checking "region" suggests that it may be null, but it has already been dereferenced on all paths leading to the check. 19 if (!region) { 20 printk(BIOS_ERR, "Error: Can't find BERT storage area\n"); 21 return CB_ERR; 22 } 23 24 return CB_SUCCESS; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P…

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coreboot not starting on denverton_ns
by Sumo 10 Jun '21

10 Jun '21

Hi, Coreboot is not starting on denverton due to this commit: * 0f068a600e drivers/intel/fsp2_0: Fix the FSP-T position (found this by doing a manual git bisect using an old commit as reference, everything was working good around november 2020) Basically it crashes, nothing is shown in the console output. Any advice? Kind regards, Sumo

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ASUS F2A85-M PRO VGA BIOS binary extraction
by se7enge 09 Jun '21

09 Jun '21

Dear Coreboot Team, I am about to embark on a mission to install coreboot on an ASUS F2A85-M PRO (w/ AMD A10-6800k) desktop machine. Admittedly, I don't have much experience in this field and am not extremely technical; but I am willing to learn and put in the effort needed. My main question to you at this time is regarding the extraction of the VGA BIOS binary, in order to make the integrated GPU function as intended, and how one goes about doing it. I have downloaded the available .CAP (BIOS image?) file from the official Asus support page (https://www.asus.com/supportonly/F2A85-M%20PRO/HelpDesk_BIOS/) and I can see that on your own documentation page for the ASUS F2A85-M (https://doc.coreboot.org/mainboard/asus/f2a85-m.html) you have recommended that one should use 'MMTool Aptio' in order to load the image and extract the VGA binary. However, I have struggled to find any official download or support page for this tool and it does not appear to be in my official distro repository or the AUR either. I am therefore seemingly unable to get a hold of it and follow your documentation. Please could you advise on the best way to solve this problem so that I may successfully extract the needed binary and continue on to compile the coreboot ROM. Any support is much appreciated :) Kind regards, se7enge

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Off Topic: Have spare used parts to give away
by Clay Daniels 09 Jun '21

09 Jun '21

Now that I have rebuilt my machine after a bad flash which was my own fault, I have a few used parts that can be reused with some repair. I have a MSI X570-A Pro motherboard that needs re-flashing or "unbricking", and a AMD Ryzen 7 3700X processor that has bent pins that I think can be straightened. I was going to re-use the processor, but getting it loose from the cooling assembly did not go well. I also have the new fan & cooling assembly, with some extra thermal grease. Now that I've got my home-built machine up & running again, I'm not too proud to admit my mistakes, and wonder if at least the nice Ryzen 7 processor can find a new home. Clay Daniels Fort Worth, Texas

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coreboot June 2021