coreboot March 2020

coreboot@coreboot.org

34 participants
46 discussions

About porting coreboot
by Alif Ilhan 18 Mar '20

18 Mar '20

Hello. Can you read out all the logs and comment about porting coreboot to my netbook? I have a netbook HP Mini 110-4100 with Atom N2600 cpu. I need assistance i porting coreboot. From the logs I could identify that I have NM10 chipset. I have attached all the logs for your reference. Thanks

1 0

Trying to debug T440p's display problem, compared it with T420.
by Dalao 17 Mar '20

17 Mar '20

I'm trying to debug T440p's display problem, tested many times and also compared it with T420. Here are the results: 1, Run VGA Option ROMs+Legacy VGA text mode+VGA BIOS+SeaBIOS: T420: Everything works fine Can see SeaBIOS menu?: y Can see Linux/Windows bootloader? (the Manjaro's start screen and the Windows 10's spinning circle): y Can boot in Linux?: y Can boot in Windows?: y T440p: Can see SeaBIOS menu?: y Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: n 2, libgfxinit+Legacy VGA text mode+SeaBIOS: T420: Can see SeaBIOS menu?: y Can see Linux/Windows bootloader?: y Can boot in Linux?: y Can boot in Windows?: n T440p: Can see SeaBIOS menu?: y Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: n 3, libgfxinit+Legacy VGA text mode+SeaBIOS: T420: Can see SeaBIOS menu?: y Can see Linux/Windows bootloader?: y Can boot in Linux?: y Can boot in Windows?: n T440p: Can see SeaBIOS menu?: y Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: n 4, libgfxinit+high resolution framebuffer+SeaBIOS: T420: Can see SeaBIOS menu?: y Can see Linux/Windows bootloader?: y Can boot in Linux?: y Can boot in Windows?: n T440p: Can see SeaBIOS menu?: y Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: n 5, libgfxinit+Legacy VGA text mode+VGA BIOS+SeaBIOS: T420: Can see SeaBIOS menu?: n Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: n T440p: Can see SeaBIOS menu?: n Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: n 6, libgfxinit+high resolution framebuffer+VGA BIOS+SeaBIOS: T420: Can see SeaBIOS menu?: n Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: y T440p: Can see SeaBIOS menu?: n Can see Linux/Windows bootloader?: n Can boot in Linux?: y Can boot in Windows?: n So the conclusion is: Under the first setting everything works fine for the T420. But the current T440p's port always can't display Linux/Windows's bootloader, and in the end it can't boot in Windows by all means. Has anyone using the T440p successfully boot in Windows under SeaBIOS? Is this a problem with my hardware or a general problem? Is it in order to boot Windows the VGA BIOS is a must? I was suprised under the 6th setting T420 can boot in Windows, but add the VGA BIOS while using the libgfxinit make the SeaBIOS menu can't be displayed. Could this be fixed? Lastly, I want to debug future. I heard it might be hard to debug VGA BIOS or Windows... What logs should I get and how to get them? Using "sudo cbmem -c" the log ends after SeaBIOS booted the disk. Using "dmesg | grep VGA" there are not much infomation.

2 3

teensy_debugdev: Can we make this USB EHCI debug jig work?
by Keith Hui 17 Mar '20

17 Mar '20

Hi guys, Now is the time to get some coreboot work done. I found out about this code during a search: https://github.com/avivgr/teensy_debugdev It is to be programmed into an ATMega32u4 device that turns it into a USB debug dongle and picks up serial chatter to be sent out via the serial pins that can then be picked up by a TTL serial device of your choice. Based on the USB VID:PID it is emulating a Net20DC. It goes fine on to an Arduino Micro (that I just bought today for this purpose) using another Arduino as the programmer. When I plug it into my laptop It detects as a debug cable as expected, but when I plug it into my p8z77-m with coreboot it isn't aware that I plugged it in when I did, into any port. My coreboot build already has USB EHCI debug dongle enabled and output turned on. Needless to say I got nothing over this channel. Did I miss something? How can we make this work? Thanks Keith

2 1

About support for my netbook
by Alif Ilhan 15 Mar '20

15 Mar '20

Hello. Can you read all the logs I have attached and comment them out? I have a HP Mini 110-4100 with Atom N2600 cpu. According to logs it is made sure that I have the NM10 chipset. How should I proceed to port coreboot to my netbook? I have attached all the logs except the flashrom logs. Thanks

1 0

Re: How to get a working snapshot of coreboot, submodules, seabios... everything for T440p?
by Dalao 15 Mar '20

15 Mar '20

Since the two CPU's log are different, I assume it might related with microcode? So I extracted the three microcode from it's original BIOS and placed in coreboot's folder. But it becomes even wired... The engineering sample Haswell 4700QM CPU which was stuck at romstage, now stuck at bootblock?! bootblock is a stage before romstage is it? The log does not contains more information to find the extract problem. How to make the log to show more information? coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... Mar 14, 2020, 08:24 by coreboot(a)coreboot.org: > Hi All, > > So you guys are booting ok with the coreboot's latest master? I was thinking some later commits broke the boot on T440p... > > > > I would suggest enabling SPI flash console, which writes logs to the SPI flash chip. Build, flash, and try booting. Then, power off and read the flash chip back. There should be a log somewhere inside the CBFS. > > Thanks, I have now enabled the "SPI Flash console output". and the config file is here: > https://pastebin.com/Xg5FmJ6q> I get the following logs: > > When I use a normal (not engineering sample) CPU Celerom 2950M, the symptoms are: The power button led is on, keyboard led on for a second and then off, fan is **always** on, screen is not on. > The logs I get are: > > coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... > > > coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... > > > coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... > > > coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... > > > coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8"’.bo: blotk ocmeti"†W26ò÷6öÆâ“¢V÷ > > coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... > > > coreboot-4.11-1595-g22d5b07160 Fri Mar 13 18:31:17 UTC 2020 bootblock starting (log level: 8)... > > > > When I use a engineering sample Haswell 4700QM CPU with the code QDEN, the symptoms are: The power button led is on, keyboard led on for a second and then off, **fan on for a or two second and then off**, screen is not on. > The logs I get are: > > coreboot-4.11-1585-g6f785b0f62-dirty Wed Mar 11 19:58:06 UTC 2020 romstage starting (log level: 7)... > > coreboot-4.11-1585-g6f785b0f62-dirty Wed Mar 11 19:58:06 UTC 2020 romstage starting (log level: 8)... > > > coreboot-4.11-1585-g6f785b0f62-dirty Wed Mar 11 19:58:06 UTC 2020 romstage starting (log level: 8)... > > > coreboot-4.11-1585-g6f785b0f62-dirty Wed Mar 11 19:58:06 UTC 2020 romstage starting (log level: 8)"ââæÒ&öw7F–RBÖW6R†W‚2÷66 > > coreboot-4.11-1585-g6f785b0f62-dirty Wed Mar 11 19:58:06 UTC 2020 romstage starting (log level: 8)... > > > I only have these two CPUs at hand to test, and they both works under stock bios. > > I also uploaded my full build process log and commands used. Really no idea why it can't boot... > https://pastebin.com/jbnnE5Jx > > > Ideally, just selecting USE_BLOBS (needed for microcode), selecting the mainboard and adding the mrc.bin should result in a bootable build. It will print a large warning, though > I also tried this, the log is the same as above. > > > Okay, that matches with the mrc.bin of peppy. The one I use (from wolf) has a different hash, no idea as to why. > I tried both peppy's and wolf's mrc.bin, the result is the same. > > BTW, I noticed some strage issues randomly when I flash back to me_cleaned stock bios. Sometimes it has 5 + 5 beeps, but if I reboot a few times, it will disappear. > > As there are so many discussions about ME, I was convinced with the impression that using me_cleaner is good. I had already used me_cleaner with the arg -S on vendor firmware, and the resulting t440p_original_bios_with_me_cleaned.bin works ok, intelmetool says the "ME: Current Working State : Initializing" and there is no 30 minute shutdown. So everything seems fine for the vendor bios with me_cleaned, so I assembled the laptop with the me_cleaned 8MB vendor bios. > > There does somethings different at the 0x510000 section between the t440p_original_bios_with_me_cleaned with coreboot.rom. What's this and does this matters? > https://www.reddit.com/r/coreboot/comments/fhuiui/what_is_the_section_in_t4… > > Anyway, if in the end it doesn't work. I will disassemble the laptop again and test against me uncleared bios. > > Mar 14, 2020, 03:56 by benjamin.doron00(a)gmail.com: > >> Hi, >> > You are using me_cleaner. >> >> Some of those issues remind me of ones I noticed when using me_cleaner (vendor firmware too only worked with the soft-disable-only flag). I'd be curious to know what ME_CLEANER_ARGS is set to. >> >> I think it's somewhat common knowledge that removing the MFS/EFFS partition is a bad idea. Per this, I'm extending the above to assume that whitelisting the partition could work. >> >> On Fri., Mar. 13, 2020, 1:07 p.m. Angel Pons, <>> th3fanbus(a)gmail.com>> > wrote: >> >>> Hi Dalao, >>> >>> On Fri, Mar 13, 2020 at 3:36 PM Dalao via coreboot >>> <>>> coreboot(a)coreboot.org>>> > wrote: >>> > >>> > I'm trying to build coreboot for T440p and still can't boot. I have tried the official repo's latest master branch, it can't boot. The power button led is on, keyboard led on for a second and then off, fan is on, but the screen is not. I don't have a debug device. Ordered a FT232H but it's on the way. I don't know what's the problem. So I looked around trying to find a working one. I also tried the official repo's 4.11_branch, it's the same problem. >>> >>> I would suggest enabling SPI flash console, which writes logs to the >>> SPI flash chip. Build, flash, and try booting. Then, power off and >>> read the flash chip back. There should be a log somewhere inside the >>> CBFS. >>> >>> > I also tried different configs use LIBGFXINIT or use VGAROM, and Tianocore or Seabios payload. Still the same problem. The most recent config is: >>> > >>> https://pastebin.com/7vnji9i2 >>> >>> You are using me_cleaner. Try not using it, as it can break things. >>> Ideally, just selecting USE_BLOBS (needed for microcode), selecting >>> the mainboard and adding the mrc.bin should result in a bootable >>> build. It will print a large warning, though: since the IFD/ME/GbE >>> regions were left empty, flashing the result as-is will not work. On >>> the t440p with two flash chips, you only need to flash the last 4 MiB >>> of the 12 MiB coreboot.rom into the 4 MiB chip. >>> >>> libgfxinit should just work. The VBIOS is less likely to work fine on >>> the first try, as extracting it is more error-prone. >>> >>> > The sha1sum of the blobs I obtained are: >>> > $ sha1sum mrc.bin >>> > d18de1e3d52c0815b82ea406ca07897c56c65696 mrc.bin >>> >>> Okay, that matches with the mrc.bin of peppy. The one I use (from >>> wolf) has a different hash, no idea as to why. >>> >>> > $ sha1sum pci8086,0416.rom (obtained through linux kernel) >>> > 4074e1fa2f788f91d3612b6fe861c9c3faf5560a pci8086,0416.rom >>> > >>> > I also tried archfan's repo for T440p but still can't build. It has some issues with submodules >>> https://github.com/archfan/coreboot/issues/12 >>> > >>> > I flashed back backuped original bios, and it can boot. I assume it's still a software issue with my coreboot build. How to get a working snapshot of coreboot, submodules, and seabios/tianocore at the time when the T440p can work? >>> >>> That's good to hear. >>> >>> > _______________________________________________ >>> > coreboot mailing list -- >>> coreboot(a)coreboot.org >>> > To unsubscribe send an email to >>> coreboot-leave(a)coreboot.org >>> >>> Best regards, >>> >>> Angel Pons >>> _______________________________________________ >>> coreboot mailing list -- >>> coreboot(a)coreboot.org >>> To unsubscribe send an email to >>> coreboot-leave(a)coreboot.org >>> > >

3 9

Re: Some problems with graphic display when using coreboot + seabios.
by Dalao 15 Mar '20

15 Mar '20

> add the VGA BIOS. set the PCI IDs correctly. Set coreboot display init to none, and let SeaBIOS run the VBIOS. Thanks, how to let SeaBIOS run the VBIOS? Do I need to set anything? The VGA BIOS and the PCI IDs are set like this: [*] Add a VGA BIOS image │ (pci8086,0416.rom) VGA BIOS path and filename │ (8086,0416) VGA device PCI IDs The 8086,0416 is set by the T440p's port maker I assume it should be right. A this is my config: CONFIG_CCACHE=y CONFIG_USE_OPTION_TABLE=y CONFIG_USE_BLOBS=y CONFIG_VENDOR_LENOVO=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_VGA_BIOS=y CONFIG_CBFS_SIZE=0x200000 CONFIG_IFD_BIN_PATH="/home/dalao/T440pCorebooting/ifd.bin" CONFIG_ME_BIN_PATH="/home/dalao/T440pCorebooting/me.bin" CONFIG_GBE_BIN_PATH="/home/dalao/T440pCorebooting/gbe.bin" CONFIG_HAVE_IFD_BIN=y CONFIG_BOARD_LENOVO_THINKPAD_T440P=y CONFIG_DRIVERS_PS2_KEYBOARD=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_HAVE_MRC=y CONFIG_MRC_FILE="/home/dalao/T440pCorebooting/mrc.bin" CONFIG_PCIEXP_CLK_PM=y CONFIG_HAVE_ME_BIN=y CONFIG_USE_ME_CLEANER=y CONFIG_HAVE_GBE_BIN=y But i still can't see the archlinux's start screen... Mar 15, 2020, 10:08 by matt.devillier(a)gmail.com: > On Sat, Mar 14, 2020 at 8:33 PM Dalao via coreboot > <coreboot(a)coreboot.org> wrote: > >> >> >> I have just corebooted T440p. Then I noticed some graphic display problems... >> >> Firstly I "Use libgfxinit" with "Legacy VGA text mode", insert a usb disk with archlinux's latest install image iso. I can see a text mode of archlinux's start screen. >> >> https://imgur.com/0QqQgJn >> >> But when I hit enter, it shows some log till "Triggering uevents" and then there is no display... >> >> https://imgur.com/CHI9jeE >> >> Then I tried "Use libgfxinit" with "Linear "high-resolution" framebuffer". I can see the graphic mode of archlinux's start screen, but again after I hit enter and see some logs, there is no display... Also, the display is not ideal, just at the top left corner not full screen. >> >> https://imgur.com/dvYLERu >> >> Also, under this setting, the nvramcui's display becomes bad. >> >> https://imgur.com/7YG0kOX >> > > unfortunately, many legacy bootloaders seem to assume a full array of > VESA video modes will be available, and fail less than gracefully when > that's not the case. With libgfxinit there is no ability to change > video modes -- all that's available is either the native panel > resolution (high resolution framebuffer) or VGA text mode. > >> Next I included pci8086,0416.rom vbios and tried "Run VGA Option ROMs" with "Legacy VGA text mode". This time, I can't see the archlinux start screen as shown above, there is no display at the beginning. But I can hit the enter blindly. Then after a while I can see archlinux is booting and the first line I can see is "Probing EDD (edd=off to disable)...ok" the archlinux starts ok. >> >> Lastly I also tried "Run VGA Option ROMs" with "Set framebuffer graphics resolution" with the default "framebuffer graphics resolution (1024x768 16.8M-color (8:8:8))" (although my T440p's resolution is 1920x1080). Also the Framebuffer mode is changed to "VESA framebuffer". I still can't see archlinux's start screen... >> >> >> How to make everything work like the vendor BIOS? i.e., I can see both the archlinux's start screen and it's booting. >> > > add the VGA BIOS. set the PCI IDs correctly. Set coreboot display init > to none, and let SeaBIOS run the VBIOS. > >> How to fix the nvramcui under "high-resolution" framebuffer"? >> > > will work properly with above settings > >> Also, as for now it appears seabios can't boot UEFI media. Tianocore by default can't boot Linux/Windows installed by legacy method (installed when using seabios). my goal is to add UEFI support through tianocore as seabios payload (or through tianocore's CSM compatibility support module? ). So that it can boot both UEFI installed Windows or legacy installed Windows like the vendor bios can do. How to achieve this? >> > > SeaBIOS is a legacy BIOS implementation, so no it can't boot UEFI boot > media. Likewise, Tianocore is a pure UEFI implementation, and doesn't > boot legacy boot media / legacy installed OSes. There should be a way > to use SeaBIOS as a CSM for Tianocore, but currently it's not working > / not implemented (I tried briefly awhile back but didn't have any > luck). > > Personally, given that it's 2020, I'd not bother with legacy-installed > OSes (or SeaBIOS) outside of use with emulation or if a special use > case demands it. Esp given that it's easy enough to migrate Windows > from legacy to UEFI. > >> >> _______________________________________________ >> coreboot mailing list -- coreboot(a)coreboot.org >> To unsubscribe send an email to coreboot-leave(a)coreboot.org >> > _______________________________________________ > coreboot mailing list -- coreboot(a)coreboot.org > To unsubscribe send an email to coreboot-leave(a)coreboot.org >

1 0

Some problems with graphic display when using coreboot + seabios.
by Dalao 15 Mar '20

15 Mar '20

I have just corebooted T440p. Then I noticed some graphic display problems... Firstly I "Use libgfxinit" with "Legacy VGA text mode", insert a usb disk with archlinux's latest install image iso. I can see a text mode of archlinux's start screen. https://imgur.com/0QqQgJn But when I hit enter, it shows some log till "Triggering uevents" and then there is no display... https://imgur.com/CHI9jeE Then I tried "Use libgfxinit" with "Linear "high-resolution" framebuffer". I can see the graphic mode of archlinux's start screen, but again after I hit enter and see some logs, there is no display... Also, the display is not ideal, just at the top left corner not full screen. https://imgur.com/dvYLERu Also, under this setting, the nvramcui's display becomes bad. https://imgur.com/7YG0kOX Next I included pci8086,0416.rom vbios and tried "Run VGA Option ROMs" with "Legacy VGA text mode". This time, I can't see the archlinux start screen as shown above, there is no display at the beginning. But I can hit the enter blindly. Then after a while I can see archlinux is booting and the first line I can see is "Probing EDD (edd=off to disable)...ok" the archlinux starts ok. Lastly I also tried "Run VGA Option ROMs" with "Set framebuffer graphics resolution" with the default "framebuffer graphics resolution (1024x768 16.8M-color (8:8:8))" (although my T440p's resolution is 1920x1080). Also the Framebuffer mode is changed to "VESA framebuffer". I still can't see archlinux's start screen... How to make everything work like the vendor BIOS? i.e., I can see both the archlinux's start screen and it's booting. How to fix the nvramcui under "high-resolution" framebuffer"? Also, as for now it appears seabios can't boot UEFI media. Tianocore by default can't boot Linux/Windows installed by legacy method (installed when using seabios). my goal is to add UEFI support through tianocore as seabios payload (or through tianocore's CSM compatibility support module? ). So that it can boot both UEFI installed Windows or legacy installed Windows like the vendor bios can do. How to achieve this?

2 1

Intel ME
by Gregg Levine 15 Mar '20

15 Mar '20

Hello! Would one of you good people take the time to explain what the Management Engine that Intel thinks our system needs and of course does? And did AMD make the mistake of thinking the same thing? Apologies in advance if we have people from both companies on this list. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again."

2 1

How to get a working snapshot of coreboot, submodules, seabios... everything for T440p?
by Dalao 14 Mar '20

14 Mar '20

I'm trying to build coreboot for T440p and still can't boot. I have tried the official repo's latest master branch, it can't boot. The power button led is on, keyboard led on for a second and then off, fan is on, but the screen is not. I don't have a debug device. Ordered a FT232H but it's on the way. I don't know what's the problem. So I looked around trying to find a working one. I also tried the official repo's 4.11_branch, it's the same problem. I also tried different configs use LIBGFXINIT or use VGAROM, and Tianocore or Seabios payload. Still the same problem. The most recent config is: https://pastebin.com/7vnji9i2 The sha1sum of the blobs I obtained are: $ sha1sum mrc.bin d18de1e3d52c0815b82ea406ca07897c56c65696 mrc.bin $ sha1sum pci8086,0416.rom (obtained through linux kernel) 4074e1fa2f788f91d3612b6fe861c9c3faf5560a pci8086,0416.rom I also tried archfan's repo for T440p but still can't build. It has some issues with submodules https://github.com/archfan/coreboot/issues/12 I flashed back backuped original bios, and it can boot. I assume it's still a software issue with my coreboot build. How to get a working snapshot of coreboot, submodules, and seabios/tianocore at the time when the T440p can work?

3 3

About porting coreboot
by Alif Ilhan 13 Mar '20

13 Mar '20

Hello. Is it possible to port coreboot to a new motherboard without intel fsp packages? I have a cedarview chipset in my hp mini 110-4100 netbook (atom n2600) and I want to port coreboot to it. What are the alternatives to the Intel FSP? Can I use SeaBios, Tianocore etc.?

1 0

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot March 2020