coreboot December 2017

coreboot@coreboot.org

68 participants
177 discussions

Coreboot Bios Compatibility
by Raziel in Shambles 04 Dec '17

04 Dec '17

Hello, i'd like to know if it is possible to flash the coreboot bios to my mobo. If so might i also burden you for a brief tutorial, aside from the one provided on coreboot.org, on how to actually build this bios (f.e. does it need to be i386 or x64, howto configure the payload, is overclocking a possibility etc.). thx in advance Step 1: see Step 5 Step 2: see attach Step 3: see attach Step 4: see attach Step 5: https://www.gigabyte.com/Motherboard/GA-MA790GP-DS4H-rev-10#sp

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Re: [coreboot] Early debugging
by Igor Skochinsky 04 Dec '17

04 Dec '17

Hi Gergely, >Понедельник, 4 декабря 2017, 13:45 +01:00 от Gergely Kiss <mail.gery(a)gmail.com>: > >Hi, > >I'm working on porting Coreboot to the ASUS AM1I-A motherboard and I'm a bit stuck. > >I could successfully build Coreboot but after flashing the ROM, my board looks to be bricked... > >Once powering on the board, the CPU fan spins up but then nothing happens, I can't see any output on the serial console (the connection was tested prior to flashing by running a getty on the COM port and it was working fine). > >The board is not fried as I can load back the vendor firmware and it boots up absolutely fine. > >I'd like to find out why Coreboot would not start but don't know what tool would be the most suitable for debugging. > >The chipset and the CPU is already supported by Coreboot but the SuperIO chip is not. It looks to me the serial interfaces of ITE chips work the same for all models so I believe using the common code for ITE SIO chips should work but I'm unsure (no datasheet available). >Shall I use a PCIe serial interface card or rather try EHCI debugging? I'm afraid in case the boot process halts at some early stage (like before romstage) then I won't see any useful output using any of those. > >Using a POST card would be a better approach I think but my board has a single PCIe 4x slot which seems to be unsupported by POST cards I could find on the web (except one from a Chinese vendor but it costs about $1k which is way too expensive) The 20-pin TPM connector on this board[1] looks really close to the legacy LPC one[2], so maybe try a POST card with LPC support? [1]: http://dlcdnet.asus.com/pub/ASUS/mb/SocketAM1/AM1I-A/E8963_AM1I-A.pdf [2]: https://www.usbid.com/datasheets/usbid/2000/2000-q1/lpc_mod_spec72.pdf > >Here's my WIP code for reference: > >https://github.com/kissg1988/coreboot/tree/master/src/mainboard/asus/am1i-a > >Any idea how to proceed? > >Thanks, >Gergely > >-- >coreboot mailing list: coreboot(a)coreboot.org >https://mail.coreboot.org/mailman/listinfo/coreboot WBR, Igor mailto:skochinsky@mail.ru

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Early debugging
by Gergely Kiss 04 Dec '17

04 Dec '17

Hi, I'm working on porting Coreboot to the ASUS AM1I-A motherboard and I'm a bit stuck. I could successfully build Coreboot but after flashing the ROM, my board looks to be bricked... Once powering on the board, the CPU fan spins up but then nothing happens, I can't see any output on the serial console (the connection was tested prior to flashing by running a getty on the COM port and it was working fine). The board is not fried as I can load back the vendor firmware and it boots up absolutely fine. I'd like to find out why Coreboot would not start but don't know what tool would be the most suitable for debugging. The chipset and the CPU is already supported by Coreboot but the SuperIO chip is not. It looks to me the serial interfaces of ITE chips work the same for all models so I believe using the common code for ITE SIO chips should work but I'm unsure (no datasheet available). Shall I use a PCIe serial interface card or rather try EHCI debugging? I'm afraid in case the boot process halts at some early stage (like before romstage) then I won't see any useful output using any of those. Using a POST card would be a better approach I think but my board has a single PCIe 4x slot which seems to be unsupported by POST cards I could find on the web (except one from a Chinese vendor but it costs about $1k which is way too expensive). Here's my WIP code for reference: https://github.com/kissg1988/coreboot/tree/master/src/mainboard/asus/am1i-a Any idea how to proceed? Thanks, Gergely

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Re: [coreboot] freebsd
by Zoran Stojsavljevic 04 Dec '17

04 Dec '17

According to this picture: https://upload.wikimedia.org/wikipedia/commons/7/77/Unix_history-simple.svg Seems that FreeBSD takes much slower development than Linux. Thus it is much more stable, it seems. Since my best take on it is that there are 10x or maybe even 100x developers on Linux. I see that it has 3.3-11.x mark from 1999. Since then, Linux went from 2.2 kernels to currently 4.14. It is an interesting decision... I should think about FreeBSD as well. Zoran On Sun, Dec 3, 2017 at 4:51 PM, Ivan Ivanov <qmastery16(a)gmail.com> wrote: > Yes, FreeBSD is my primary OS at my coreboot'ed machine at the moment. > I got a bit disappointed at Linux recent developments and decided to switch > > Best regards, > Ivan Ivanov > > 2017-12-03 14:35 GMT+03:00 ingegneriaforense(a)alice.it > <ingegneriaforense(a)alice.it>: > > Hello guys, > > > > I apologize with you for the strange question. > > > > Can you tell me if some of you uses coreboot with the Freebsd Operating > > system on its machine ? > > > > Thanks in advance. > > > > Vincenzo. > > > > > > Forensic Consultant > > Tribunale di Lecce > > > > Studio: Strada di Garibaldi - Contrada Paradisi > > 73010 Lequile (LE) > > > > cell: 339.7968555 > > skype: vincenzo.di_salvo > > > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > https://mail.coreboot.org/mailman/listinfo/coreboot > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot >

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freebsd
by Vincenzo Di Salvo 04 Dec '17

04 Dec '17

Hello guys, thanks very much for your replies. I've contacted you because are several months that i use coreboot mailing list and I've seen that you are a very active list, where is it possible send a question and receive a prompt replais and technical tips. It is very difficult find a so proud and fervent people that are so solid knowdlege in all the fields of the computer science. Other lists are very slow and only offer half replies. Obviously i'll do attention to pose questions inherent to coreboot so to avoid problems. Thanks very much. I contact you soon about freebsd, because linux is not a good solution to solve my goal. and probably will be the time that I also will use coreboot on my machines. Best Regards. Vincenzo. --- Questa email è stata esaminata alla ricerca di virus da AVG. http://www.avg.com

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freebsd
by ingegneriaforense＠alice.it 04 Dec '17

04 Dec '17

Hello guys, I apologize with you for the strange question. Can you tell me if some of you uses coreboot with the Freebsd Operating system on its machine ? Thanks in advance. Vincenzo. Forensic Consultant Tribunale di Lecce Studio: Strada di Garibaldi - Contrada Paradisi 73010 Lequile (LE) cell: 339.7968555 skype: vincenzo.di_salvo

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Re: [coreboot] SeaBIOS boot order / can't boot from USB
by Hal Martin 03 Dec '17

03 Dec '17

Hi Matt, I created a bootorder file and added it to cbfs, but initially had issues with USB not being properly initialized during boot. >From the cbmem log: boot order: 1: /pci@i0cf8/usb@14/usb-*@0 2: /pci@i0cf8/usb@14/usb-*@1 ... (snip) 48: /pci@i0cf8/usb@1d/hub@1/usb-*@7 49: /pci@i0cf8/*@1f,2/drive@0/disk@0 ... (snip) SeaBIOS (version rel-1.10.2-0-g5f4c7b1) XHCI init on dev 00:14.0: regs @ 0xe0720000, 8 ports, 32 slots, 32 byte contexts XHCI protocol USB 2.00, 4 ports (offset 1), def 3001 XHCI protocol USB 3.00, 4 ports (offset 5), def 1000 XHCI extcap 0xc1 @ 0xe0728040 XHCI extcap 0xc0 @ 0xe0728070 XHCI extcap 0x1 @ 0xe0728330 EHCI init on dev 00:1a.0 (regs=0xe073f020) EHCI init on dev 00:1d.0 (regs=0xe0740020) ... (snip) XHCI no devices found Initialized USB HUB (0 ports used) ehci_wait_td error - status=80e42 Initialized USB HUB (0 ports used) Initialized USB HUB (0 ports used) All threads complete. Googling "ehci_wait_td error - status=80e42" returns threads from years ago with people asking if it's a bug in SeaBIOS or coreboot. I noticed that I was running SeaBIOS 1.10 and that 1.11 is now available. I updated SeaBIOS to 1.11 and reflashed, and now I am able to boot from USB successfully. So thanks again for the tip on the bootorder file. If anyone else is having difficulties booting from USB and you're running SeaBIOS 1.10, consider upgrading to SeaBIOS 1.11. Thankfully updating resolved the USB initializing issue I was facing. -Hal On Sat, Dec 2, 2017 at 7:29 PM, Matt DeVillier <matt.devillier(a)gmail.com> wrote: > yes, just enumerate all ports/hubs. here's mine: > > https://github.com/MattDevo/coreboot/blob/master/cbfs/bootorder.usb > > if there's an impact on boot time its imperceptible. What can slow things > down are connected devices which don't initialize/respond to queries within > the USB spec, but this is regardless of their presence in the bootorder file > > > On Sat, Dec 2, 2017 at 12:16 PM, Hal Martin <hal.martin(a)gmail.com> wrote: > >> Hi Matt, >> >> That's a great tip, thanks for the link! >> >> Looking at the file, it seems I would just specify every USB port from >> the PCH EHCI/xHCI controllers. >> >> Do you know if this slows down boot noticeably if there are USB devices >> attached which aren't bootable (e.g. keyboard)? Or the case where there are >> potentially bootable devices (e.g. mass storage) but which lack a >> bootloader in the MBR? >> >> I'll be back with results once I've done some testing. >> >> Thanks again, >> Hal >> >> On Sat, Dec 2, 2017 at 7:08 PM, Matt DeVillier <matt.devillier(a)gmail.com> >> wrote: >> >>> >>> Hal, >>> >>> your USB controllers are at 14.0 and 1d.0, so your bootorder file needs >>> to enumerate all devices attached to said controllers. I'm not sure how >>> many devices can be attached to each for IvyBridge, but here's the >>> bootorder file Google uses for reference: >>> >>> https://chromium.googlesource.com/chromiumos/third_party/sea >>> bios/+/firmware-eve-9584.B/chromeos/bootorder >>> >>> HTH, >>> Matt >>> >>> On Sat, Dec 2, 2017 at 2:09 AM, Hal Martin <hal.martin(a)gmail.com> wrote: >>> >>>> Hi all, >>>> >>>> I'd like to learn more about SeaBIOS boot order, but unfortunately I >>>> wasn't able to find the answer to my question on the wiki page: >>>> https://www.coreboot.org/SeaBIOS#Configuring_boot_order >>>> >>>> I would like to add a bootscript for SeaBIOS to search for USB boot >>>> devices before falling back to the hdd or PXE. >>>> >>>> If I have USB bootable media plugged in, SeaBIOS seems to immediately >>>> boot from the hdd. I'm not able to boot from USB unless I physically unplug >>>> the SATA connection. >>>> >>>> When I look at the console log in cbmem, I don't see SeaBIOS searching >>>> the USB controller at all. >>>> >>>> It's an Ivy Bridge platform. >>>> >>>> SeaBIOS log from cbmem: >>>> Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 >>>> Searching bootorder for: /pci@i0cf8/pci-bridge@1c,3/*@0 >>>> Press ESC for boot menu. >>>> >>>> lspci: >>>> 00:00.0 Host bridge [0600]: Intel Corporation 3rd Gen Core processor >>>> DRAM Controller [8086:0154] (rev 09) >>>> 00:01.0 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen >>>> Core processor PCI Express Root Port [8086:0151] (rev 09) (prog-if 00 >>>> [Normal decode]) >>>> 00:01.1 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen >>>> Core processor PCI Express Root Port [8086:0155] (rev 09) (prog-if 00 >>>> [Normal decode]) >>>> 00:02.0 VGA compatible controller [0300]: Intel Corporation 3rd Gen >>>> Core processor Graphics Controller [8086:0166] (rev 09) (prog-if 00 [VGA >>>> controller]) >>>> 00:14.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series >>>> Chipset Family USB xHCI Host Controller [8086:1e31] (rev 04) (prog-if 30 >>>> [XHCI]) >>>> 00:19.0 Ethernet controller [0200]: Intel Corporation 82579LM Gigabit >>>> Network Connection (Lewisville) [8086:1502] (rev 04) >>>> 00:1a.0 USB controller [0c03]: Intel Corporation 7 Series/C216 Chipset >>>> Family USB Enhanced Host Controller #2 [8086:1e2d] (rev 04) (prog-if 20 >>>> [EHCI]) >>>> 00:1b.0 Audio device [0403]: Intel Corporation 7 Series/C216 Chipset >>>> Family High Definition Audio Controller [8086:1e20] (rev 04) >>>> 00:1c.0 PCI bridge [0604]: Intel Corporation 7 Series/C216 Chipset >>>> Family PCI Express Root Port 1 [8086:1e10] (rev c4) (prog-if 00 [Normal >>>> decode]) >>>> 00:1c.4 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series >>>> Chipset Family PCI Express Root Port 5 [8086:1e18] (rev c4) (prog-if 00 >>>> [Normal decode]) >>>> 00:1d.0 USB controller [0c03]: Intel Corporation 7 Series/C216 Chipset >>>> Family USB Enhanced Host Controller #1 [8086:1e26] (rev 04) (prog-if 20 >>>> [EHCI]) >>>> 00:1f.0 ISA bridge [0601]: Intel Corporation HM76 Express Chipset LPC >>>> Controller [8086:1e59] (rev 04) >>>> 00:1f.2 SATA controller [0106]: Intel Corporation 7 Series Chipset >>>> Family 6-port SATA Controller [AHCI mode] [8086:1e03] (rev 04) (prog-if 01 >>>> [AHCI 1.0]) >>>> 00:1f.3 SMBus [0c05]: Intel Corporation 7 Series/C216 Chipset Family >>>> SMBus Controller [8086:1e22] (rev 04) >>>> 00:1f.6 Signal processing controller [1180]: Intel Corporation 7 >>>> Series/C210 Series Chipset Family Thermal Management Controller [8086:1e24] >>>> (rev 04) >>>> >>>> Any suggestions? >>>> >>>> Thanks, >>>> Hal >>>> >>>> -- >>>> coreboot mailing list: coreboot(a)coreboot.org >>>> https://mail.coreboot.org/mailman/listinfo/coreboot >>>> >>> >>> >> >

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[RFC] Revive LinuxBIOS as new project for Linux in flash ROM chip
by Paul Menzel 02 Dec '17

02 Dec '17

Dear coreboot folks, As you all heard of NERF [1], Heads [2] and u-root [3], they try to get the Linux kernel into the flash ROM chip also without coreboot, by stripping down the UEFI firmware. Trammell is going to give a talk about it at 34C3 [4], and already uses the word *LinuxBIOS* there, which is great in my opinion. The only downside is, that LinuxBIOS is, as you all know, the former project name of coreboot. So is everybody fine with reviving that name to figure out a way to put Linux into the flash ROM chip regarding if coreboot, UEFI parts or something else is used. Then I’d kindly ask, that the name would be revived, and an appropriate Web site, mailing lists, and IRC channel are created. Could it be hosted on the coreboot infrastructure? Ron, Trammell, would that be ok with you? Thanks, Paul [1] https://trmm.net/NERF [2] https://trmm.net/Heads [3] http://u-root.tk/ [4] https://twitter.com/qrs/status/932655856520491009

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Re: [coreboot] SeaBIOS boot order / can't boot from USB
by Matt DeVillier 02 Dec '17

02 Dec '17

yes, just enumerate all ports/hubs. here's mine: https://github.com/MattDevo/coreboot/blob/master/cbfs/bootorder.usb if there's an impact on boot time its imperceptible. What can slow things down are connected devices which don't initialize/respond to queries within the USB spec, but this is regardless of their presence in the bootorder file On Sat, Dec 2, 2017 at 12:16 PM, Hal Martin <hal.martin(a)gmail.com> wrote: > Hi Matt, > > That's a great tip, thanks for the link! > > Looking at the file, it seems I would just specify every USB port from the > PCH EHCI/xHCI controllers. > > Do you know if this slows down boot noticeably if there are USB devices > attached which aren't bootable (e.g. keyboard)? Or the case where there are > potentially bootable devices (e.g. mass storage) but which lack a > bootloader in the MBR? > > I'll be back with results once I've done some testing. > > Thanks again, > Hal > > On Sat, Dec 2, 2017 at 7:08 PM, Matt DeVillier <matt.devillier(a)gmail.com> > wrote: > >> >> Hal, >> >> your USB controllers are at 14.0 and 1d.0, so your bootorder file needs >> to enumerate all devices attached to said controllers. I'm not sure how >> many devices can be attached to each for IvyBridge, but here's the >> bootorder file Google uses for reference: >> >> https://chromium.googlesource.com/chromiumos/third_party/sea >> bios/+/firmware-eve-9584.B/chromeos/bootorder >> >> HTH, >> Matt >> >> On Sat, Dec 2, 2017 at 2:09 AM, Hal Martin <hal.martin(a)gmail.com> wrote: >> >>> Hi all, >>> >>> I'd like to learn more about SeaBIOS boot order, but unfortunately I >>> wasn't able to find the answer to my question on the wiki page: >>> https://www.coreboot.org/SeaBIOS#Configuring_boot_order >>> >>> I would like to add a bootscript for SeaBIOS to search for USB boot >>> devices before falling back to the hdd or PXE. >>> >>> If I have USB bootable media plugged in, SeaBIOS seems to immediately >>> boot from the hdd. I'm not able to boot from USB unless I physically unplug >>> the SATA connection. >>> >>> When I look at the console log in cbmem, I don't see SeaBIOS searching >>> the USB controller at all. >>> >>> It's an Ivy Bridge platform. >>> >>> SeaBIOS log from cbmem: >>> Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 >>> Searching bootorder for: /pci@i0cf8/pci-bridge@1c,3/*@0 >>> Press ESC for boot menu. >>> >>> lspci: >>> 00:00.0 Host bridge [0600]: Intel Corporation 3rd Gen Core processor >>> DRAM Controller [8086:0154] (rev 09) >>> 00:01.0 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen >>> Core processor PCI Express Root Port [8086:0151] (rev 09) (prog-if 00 >>> [Normal decode]) >>> 00:01.1 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen >>> Core processor PCI Express Root Port [8086:0155] (rev 09) (prog-if 00 >>> [Normal decode]) >>> 00:02.0 VGA compatible controller [0300]: Intel Corporation 3rd Gen Core >>> processor Graphics Controller [8086:0166] (rev 09) (prog-if 00 [VGA >>> controller]) >>> 00:14.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series >>> Chipset Family USB xHCI Host Controller [8086:1e31] (rev 04) (prog-if 30 >>> [XHCI]) >>> 00:19.0 Ethernet controller [0200]: Intel Corporation 82579LM Gigabit >>> Network Connection (Lewisville) [8086:1502] (rev 04) >>> 00:1a.0 USB controller [0c03]: Intel Corporation 7 Series/C216 Chipset >>> Family USB Enhanced Host Controller #2 [8086:1e2d] (rev 04) (prog-if 20 >>> [EHCI]) >>> 00:1b.0 Audio device [0403]: Intel Corporation 7 Series/C216 Chipset >>> Family High Definition Audio Controller [8086:1e20] (rev 04) >>> 00:1c.0 PCI bridge [0604]: Intel Corporation 7 Series/C216 Chipset >>> Family PCI Express Root Port 1 [8086:1e10] (rev c4) (prog-if 00 [Normal >>> decode]) >>> 00:1c.4 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series >>> Chipset Family PCI Express Root Port 5 [8086:1e18] (rev c4) (prog-if 00 >>> [Normal decode]) >>> 00:1d.0 USB controller [0c03]: Intel Corporation 7 Series/C216 Chipset >>> Family USB Enhanced Host Controller #1 [8086:1e26] (rev 04) (prog-if 20 >>> [EHCI]) >>> 00:1f.0 ISA bridge [0601]: Intel Corporation HM76 Express Chipset LPC >>> Controller [8086:1e59] (rev 04) >>> 00:1f.2 SATA controller [0106]: Intel Corporation 7 Series Chipset >>> Family 6-port SATA Controller [AHCI mode] [8086:1e03] (rev 04) (prog-if 01 >>> [AHCI 1.0]) >>> 00:1f.3 SMBus [0c05]: Intel Corporation 7 Series/C216 Chipset Family >>> SMBus Controller [8086:1e22] (rev 04) >>> 00:1f.6 Signal processing controller [1180]: Intel Corporation 7 >>> Series/C210 Series Chipset Family Thermal Management Controller [8086:1e24] >>> (rev 04) >>> >>> Any suggestions? >>> >>> Thanks, >>> Hal >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> https://mail.coreboot.org/mailman/listinfo/coreboot >>> >> >> >

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Re: [coreboot] SeaBIOS boot order / can't boot from USB
by Matt DeVillier 02 Dec '17

02 Dec '17

Hal, your USB controllers are at 14.0 and 1d.0, so your bootorder file needs to enumerate all devices attached to said controllers. I'm not sure how many devices can be attached to each for IvyBridge, but here's the bootorder file Google uses for reference: https://chromium.googlesource.com/chromiumos/third_party/seabios/+/firmware… HTH, Matt On Sat, Dec 2, 2017 at 2:09 AM, Hal Martin <hal.martin(a)gmail.com> wrote: > Hi all, > > I'd like to learn more about SeaBIOS boot order, but unfortunately I > wasn't able to find the answer to my question on the wiki page: > https://www.coreboot.org/SeaBIOS#Configuring_boot_order > > I would like to add a bootscript for SeaBIOS to search for USB boot > devices before falling back to the hdd or PXE. > > If I have USB bootable media plugged in, SeaBIOS seems to immediately boot > from the hdd. I'm not able to boot from USB unless I physically unplug the > SATA connection. > > When I look at the console log in cbmem, I don't see SeaBIOS searching the > USB controller at all. > > It's an Ivy Bridge platform. > > SeaBIOS log from cbmem: > Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 > Searching bootorder for: /pci@i0cf8/pci-bridge@1c,3/*@0 > Press ESC for boot menu. > > lspci: > 00:00.0 Host bridge [0600]: Intel Corporation 3rd Gen Core processor DRAM > Controller [8086:0154] (rev 09) > 00:01.0 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen Core > processor PCI Express Root Port [8086:0151] (rev 09) (prog-if 00 [Normal > decode]) > 00:01.1 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v2/3rd Gen Core > processor PCI Express Root Port [8086:0155] (rev 09) (prog-if 00 [Normal > decode]) > 00:02.0 VGA compatible controller [0300]: Intel Corporation 3rd Gen Core > processor Graphics Controller [8086:0166] (rev 09) (prog-if 00 [VGA > controller]) > 00:14.0 USB controller [0c03]: Intel Corporation 7 Series/C210 Series > Chipset Family USB xHCI Host Controller [8086:1e31] (rev 04) (prog-if 30 > [XHCI]) > 00:19.0 Ethernet controller [0200]: Intel Corporation 82579LM Gigabit > Network Connection (Lewisville) [8086:1502] (rev 04) > 00:1a.0 USB controller [0c03]: Intel Corporation 7 Series/C216 Chipset > Family USB Enhanced Host Controller #2 [8086:1e2d] (rev 04) (prog-if 20 > [EHCI]) > 00:1b.0 Audio device [0403]: Intel Corporation 7 Series/C216 Chipset > Family High Definition Audio Controller [8086:1e20] (rev 04) > 00:1c.0 PCI bridge [0604]: Intel Corporation 7 Series/C216 Chipset Family > PCI Express Root Port 1 [8086:1e10] (rev c4) (prog-if 00 [Normal decode]) > 00:1c.4 PCI bridge [0604]: Intel Corporation 7 Series/C210 Series Chipset > Family PCI Express Root Port 5 [8086:1e18] (rev c4) (prog-if 00 [Normal > decode]) > 00:1d.0 USB controller [0c03]: Intel Corporation 7 Series/C216 Chipset > Family USB Enhanced Host Controller #1 [8086:1e26] (rev 04) (prog-if 20 > [EHCI]) > 00:1f.0 ISA bridge [0601]: Intel Corporation HM76 Express Chipset LPC > Controller [8086:1e59] (rev 04) > 00:1f.2 SATA controller [0106]: Intel Corporation 7 Series Chipset Family > 6-port SATA Controller [AHCI mode] [8086:1e03] (rev 04) (prog-if 01 [AHCI > 1.0]) > 00:1f.3 SMBus [0c05]: Intel Corporation 7 Series/C216 Chipset Family SMBus > Controller [8086:1e22] (rev 04) > 00:1f.6 Signal processing controller [1180]: Intel Corporation 7 > Series/C210 Series Chipset Family Thermal Management Controller [8086:1e24] > (rev 04) > > Any suggestions? > > Thanks, > Hal > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot >

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coreboot December 2017