coreboot October 2014

coreboot@coreboot.org

43 participants
111 discussions

More Fn+key on X60T
by Garreau, Alexandre 29 Oct '14

29 Oct '14

I noticed some Fn+key present with previous BIOS still are unimplemented with coreboot in Lenovo Thinkpad X60T: Fn+Space (zoom?), Fn+F9 (eject??), Fn+PgUp (ThinkLed??), Fn+Print (“SysRq”), Fn+Pause (“Break”). That’s unfortunate since it means less functions usable to remap. For instance I was remapping CapsLock to “Win” key (to get symmetric Alt and AltGr and still have a modifier separate from Alt for i3), and I’d like to keep it in a less accessible place (I really use rarely, but sometimes I do), analogously to Num Lock key, hence I was thinking to Fn+Pause or Fn+Print, but these not being defined, they return no keycode and I can’t map anything with Fn. Could it be possible in a next release? Thanks for work on coreboot ^^ it’s great! :D

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Re: [coreboot] sourcing 128MB flash chips for an X60 with coreboot
by Kyösti Mälkki 29 Oct '14

29 Oct '14

On 10/29/2014 12:38 AM, Charles Devereaux via coreboot wrote: > Hello > > No, I used Scott's link to get 2x only - I will let you know about the > results! > > With 128 MB ie 16 megs, I should be able to fit a kernel, some modules, and > a busybox with some other basic tools. > For the i82801gx part in x60, I am not sure if it will support 16MB SPI parts as datasheet specifies decode registers for the top 8MB only. Or was there already a proof-of-concept it works? FWH_DEC_EN1—Firmware Hub Decode Enable Register. Regards, Kyösti

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Re: [coreboot] sourcing 128MB flash chips for an X60 with coreboot
by Alvaro [Andor] 29 Oct '14

29 Oct '14

Hi, So you mean 128 megabit (Mb) - 16 megabyte (MB). Check this, it may fit you (100 pieces in a lot!!! :) ): http://www.aliexpress.com/item/W25Q128FVSSIG-25Q128FVSG-New-authentic-W25Q1… 100 is a lot, but you can share them in the list later. I bought a 10 or 15 lot and then sent some spare to somebody I can't remember on the list. The ones in eBay are super expensive so you can save some people a lot of money. Check around and you might have luck. Maybe even better if you go to the manufacturers data sheet and look if they exist with that package, and then look for the exact model. About including the kernel in the bios chip, I did 2 or 3 tests, and the kernel load after grub was super slow, but I didn't test enough to say if it was the chip fault or it needed to be done in a different way. Good luck! El 28/10/14 17:38, Charles Devereaux via coreboot escribió: > Hello > > No, I used Scott's link to get 2x only - I will let you know about the > results! > > With 128 MB ie 16 megs, I should be able to fit a kernel, some > modules, and a busybox with some other basic tools. > > Among other things, I wonder if it can improve the boot speed (I > believe it will make it worse, because a disk has a better read speed > but I want to be sure) > > Thanks, > Charles > > On Sun, Oct 26, 2014 at 5:15 PM, Alvaro [Andor] via coreboot > <coreboot(a)coreboot.org <mailto:coreboot@coreboot.org>> wrote: > > Last time I bought "high capacity" chips (but not that high, I > think it was 8 or 16MB), I did it on AliExpress. Minimum batch of > ten. Have you tried there? > > > El 25/10/14 18:28, Charles Devereaux via coreboot escribió: >> Hello >> >> I would like to replace the flash chip with something larger, to >> add a minimal linux distribution and test some security ideas. >> >> I selected a few chips based on flashrom support, but I can't >> find any of them on my usual websites. >> On ebay, I can't find them in SOIC8 package. Yet IIRC, someone >> did that with a x60 running coreboot (just can't find the URL at >> the moment). Hopefully that person is even on the list! >> >> Would you have a recommended source to get 2 or 3 of them? >> >> ideally: M25P128 >> >> possible: >> MX25L128 05D >> N25Q128.3E >> W25Q128.V >> >> (because non-volatile write bit chips are produced by Macronix >> and Winbond) >> >> Thanks >> Charles >> >> > > > -- > coreboot mailing list: coreboot(a)coreboot.org > <mailto:coreboot@coreboot.org> > http://www.coreboot.org/mailman/listinfo/coreboot > > > >

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Re: [coreboot] sourcing 128MB flash chips for an X60 with coreboot
by Alvaro [Andor] 28 Oct '14

28 Oct '14

Last time I bought "high capacity" chips (but not that high, I think it was 8 or 16MB), I did it on AliExpress. Minimum batch of ten. Have you tried there? El 25/10/14 18:28, Charles Devereaux via coreboot escribió: > Hello > > I would like to replace the flash chip with something larger, to add a > minimal linux distribution and test some security ideas. > > I selected a few chips based on flashrom support, but I can't find any > of them on my usual websites. > On ebay, I can't find them in SOIC8 package. Yet IIRC, someone did > that with a x60 running coreboot (just can't find the URL at the > moment). Hopefully that person is even on the list! > > Would you have a recommended source to get 2 or 3 of them? > > ideally: M25P128 > > possible: > MX25L128 05D > N25Q128.3E > W25Q128.V > > (because non-volatile write bit chips are produced by Macronix > and Winbond) > > Thanks > Charles > >

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[HELP]Intel Mohon Peak CRB with coreboot failed to startup
by maypark01＠163.com 28 Oct '14

28 Oct '14

Hi All, I tried to use coreboot to bringup Mohon Peak CRB with these 2 package from Intel (doc no. are 526100 & 526101). one is 526100_RANGELEY_CB_POSTGOLD_001_20131218.tar.gz, and the other is 526101_RANGELEY_FSP_POSTGOLD_002_20140402.zip. I followed the guide within the package, successfully built a coreboot.rom, using dediprog to flash the board, then power on is ok, but the post code stopped at C0 which means 'POST_SECUROM_SECBOOT_START' defined in file './src/include/console/post_codes.h' #define POST_SECUROM_SECBOOT_START (0x0C0) #define POST_SECUROM_BOOTSRCSETUP (0x0C1) #define POST_SECUROM_REMAP_FAIL (0x0C2) -#define POST_SECUROM_BOOTSRCSETUP_FAIL (0x0C3) +#define POST_SECUROM_BOOTSRCSETUP_FAIL (0x0C3) #define POST_SECUROM_DCACHESETUP (0x0C4) -#define POST_SECUROM_DCACHESETUP_FAIL (0x0C5) +#define POST_SECUROM_DCACHESETUP_FAIL (0x0C5) #define POST_SECUROM_ICACHESETUP (0x0C6) -#define POST_SECUROM_DESCRIPTORSETUP (0x0C7) -#define POST_SECUROM_DCACHESETUPBIOS (0x0C8) +#define POST_SECUROM_DESCRIPTORSETUP (0x0C7) +#define POST_SECUROM_DCACHESETUPBIOS (0x0C8) #define POST_SECUROM_PLATFORMSETUP (0x0C9) #define POST_SECUROM_SIGCHECKBIOS (0x0CA) -#define POST_SECUROM_ICACHESETUPBIOS (0x0CB) -#define POST_SECUROM_PASS (0x0CC) -#define POST_SECUROM_FAIL is there anybody see this before, what does this postcode mean? Thanks maypark01(a)163.com

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Re: [coreboot] Add Macronix MX25U6435F and MX25L6495F support
by Paul Menzel 27 Oct '14

27 Oct '14

Dear Alex, Am Montag, den 20.10.2014, 15:49 +0800 schrieb alexlu6(a)mxic.com.tw: > Please help to update the new Macronix SPI Flash support > in the ~coreboot/src/driver/spi/macronix.c . thanks a lot for your contribution. Idwer Vollering submitted it for code review [1] and, after review, it was submitted to the coreboot repository. The coreboot project uses Git for managing the source code and Gerrit for reviewing proposed change sets. Please read the Git Wiki page [2] on how to submit the (hopefully) next patches! We are looking forward to it! Thanks, Paul [1] http://review.coreboot.org/7194/ [2] http://coreboot.org/Git PS: Just a reminder that the note below is of no use when sending it to a mailing list. ;-) > CONFIDENTIALITY NOTE: […]

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Coreboot console_init() doesn't work on Rangeley board?
by Qinqxin Wei 26 Oct '14

26 Oct '14

Hi, I am managing to replace BIOS with coreboot on a Rangeley evaluation board, but the serial console cannot display message after coreboot calls console_init() in src/southbridge/intel/fsp_rangeley/romstage.c. The console is connected to UART0 (0x3f8), which has been verified by BIOS. My configuration of coreboot includes: Mainboard: Intel->Mohon Peak CRB, which is the only choice for Rangeley FSP and microcode: downloaded from Intel FSP (https://downloadcenter.intel.com/Detail_Desc.aspx?agr=Y&DwnldID=23676). Payload: U-boot-x86 (should be irrelevant to payload, since coreboot just enters romstage) I have checked that the UART0 registers should have been initialized. The TX FIFO should also work: after out something to 0x3f8, LSR will change. I have also checked some other registers might related to UART. The UART_CONT (0:1f.0-0x80) is in the default state (0x00000003). The GPIO Use Select is also in default state: GPIOS_13 is 0. Is there any other register can block the UART output? Besides, actually the coreboot finally run deeply. The post code changes from 47->66->67->69->...>72->73->77... and finally stop at 0xE2. But there's no console display so I cannot know where it stops. Regards, Qingxin

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Coreboot on HP Pavilion G4 1317AU ?
by unb able 26 Oct '14

26 Oct '14

The email service somehow screwed up the formatting of my last message. Here is my one more attempt. Please let me know if coreboot would work on my laptop? Model: HP Pavilion G4 1317AU CPU: AMD A4-3330MX APU The motheorboard has following chips: AMD FCH 218-0755046 (Hudson-2 FCH??) Flash chip: Winbond 25Q16BVSIG , 1309 Embedded controller (??): ENE KB3930QF A2 ===================================================================== lspci -tvnn ===================================================================== -[0000:00]-+-00.0 Advanced Micro Devices, Inc. [AMD] Family 12h Processor Root Complex [1022:1705] +-01.0 Advanced Micro Devices, Inc. [AMD/ATI] Sumo [Radeon HD 6480G] [1002:9648] +-01.1 Advanced Micro Devices, Inc. [AMD/ATI] BeaverCreek HDMI Audio [Radeon HD 6500D and 6400G-6600G series] [1002:1714] +-04.0-[01]----00.0 Qualcomm Atheros AR9485 Wireless Network Adapter [168c:0032] +-05.0-[02]----00.0 Realtek Semiconductor Co., Ltd. RTL8101E/RTL8102E PCI Express Fast Ethernet controller [10ec:8136] +-06.0-[03]----00.0 Realtek Semiconductor Co., Ltd. RTS5209 PCI Express Card Reader [10ec:5209] +-11.0 Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7801] +-12.0 Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller [1022:7807] +-12.2 Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller [1022:7808] +-13.0 Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller [1022:7807] +-13.2 Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller [1022:7808] +-14.0 Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:780b] +-14.2 Advanced Micro Devices, Inc. [AMD] FCH Azalia Controller [1022:780d] +-14.3 Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:780e] +-14.4-[04]-- +-16.0 Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller [1022:7807] +-16.2 Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller [1022:7808] +-18.0 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 0 [1022:1700] +-18.1 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 1 [1022:1701] +-18.2 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 2 [1022:1702] +-18.3 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 3 [1022:1703] +-18.4 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 4 [1022:1704] +-18.5 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 6 [1022:1718] +-18.6 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 5 [1022:1716] \-18.7 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 7 [1022:1719] ===================================================================== superiotool -dV ===================================================================== superiotool r4.0-6998-ga296f9e Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x164e... Failed. Returned data: port=0xff, port+1=0xff Probing for Nuvoton Super I/O at 0x164e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x2e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x4e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found. Probing for AMD EC Super I/O at 0xaa... Probing for Server Engines Super I/O at 0x2e... Failed. Returned data: id=0xffff, rev=0xff Probing for Infineon Super I/O at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for Infineon Super I/O at 0x4e... Failed. Returned data: id=0xff, rev=0xff No Super I/O found ===================================================================== flashrom -p internal -V ===================================================================== flashrom v0.9.7-r1711 on Linux 3.16.3-gnu-1 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, GCC 4.8.2, little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 3 usecs, 856M loops per second, delay more than 10% too short (got 78% of expected delay), recalculating... 840M loops per second, delay more than 10% too short (got 77% of expected delay), recalculating... 1089M loops per second, 10 myus = 12 us, 100 myus = 84 us, 1000 myus = 957 us, 10000 myus = 11335 us, 12 myus = 41 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "HP Pavilion g4 Notebook PC" DMI string system-version: "0695130000004610000600000" DMI string baseboard-manufacturer: "Hewlett-Packard" DMI string baseboard-product-name: "3564" DMI string baseboard-version: "21.46" DMI string chassis-type: "Notebook" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed. Thanks in advance, Vick

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Coreboot on HP Pavilion G4 1317AU ?
by unb able 26 Oct '14

26 Oct '14

Hi all, I am wondering if coreboot would work on my laptop. The details of my laptop are as follows: Model: HP Pavilion G4 1317AUCPU: AMD A4-3330MX APU The motheorboard has following chips:AMD FCH 218-0755046 (Hudson-2 FCH??) Flash chip: Winbond 25Q16BVSIG , 1309Embedded controller (??): ENE KB3930QF A2 =====================================================================lspci -tvnn===================================================================== -[0000:00]-+-00.0 Advanced Micro Devices, Inc. [AMD] Family 12h Processor Root Complex [1022:1705] +-01.0 Advanced Micro Devices, Inc. [AMD/ATI] Sumo [Radeon HD 6480G] [1002:9648] +-01.1 Advanced Micro Devices, Inc. [AMD/ATI] BeaverCreek HDMI Audio [Radeon HD 6500D and 6400G-6600G series] [1002:1714] +-04.0-[01]----00.0 Qualcomm Atheros AR9485 Wireless Network Adapter [168c:0032] +-05.0-[02]----00.0 Realtek Semiconductor Co., Ltd. RTL8101E/RTL8102E PCI Express Fast Ethernet controller [10ec:8136] +-06.0-[03]----00.0 Realtek Semiconductor Co., Ltd. RTS5209 PCI Express Card Reader [10ec:5209] +-11.0 Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7801] +-12.0 Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller [1022:7807] +-12.2 Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller [1022:7808] +-13.0 Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller [1022:7807] +-13.2 Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller [1022:7808] +-14.0 Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:780b] +-14.2 Advanced Micro Devices, Inc. [AMD] FCH Azalia Controller [1022:780d] +-14.3 Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:780e] +-14.4-[04]-- +-16.0 Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller [1022:7807] +-16.2 Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller [1022:7808] +-18.0 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 0 [1022:1700] +-18.1 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 1 [1022:1701] +-18.2 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 2 [1022:1702] +-18.3 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 3 [1022:1703] +-18.4 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 4 [1022:1704] +-18.5 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 6 [1022:1718] +-18.6 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 5 [1022:1716] \-18.7 Advanced Micro Devices, Inc. [AMD] Family 12h/14h Processor Function 7 [1022:1719] =====================================================================superiotool -dV=====================================================================superiotool r4.0-6998-ga296f9e Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0xffff, id=0xffff Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=standard) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x20e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x25e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=standard) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8502e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8761e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=it8228e) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8661f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=legacy/it8671f) at 0x370... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x164e... Failed. Returned data: port=0xff, port+1=0xff Probing for Nuvoton Super I/O at 0x164e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x164e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x2e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x2e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for Nuvoton Super I/O at 0x4e... Failed. Returned data: chip_id=0xffff Probing for Nuvoton Super I/O (sid=0xfc) at 0x4e... Failed. Returned data: sid=0xff, id=0xffff, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for VIA Super I/O at 0x3f0... PCI device 1106:0686 not found. Probing for AMD EC Super I/O at 0xaa... Probing for Server Engines Super I/O at 0x2e... Failed. Returned data: id=0xffff, rev=0xff Probing for Infineon Super I/O at 0x2e... Failed. Returned data: id=0xff, rev=0xff Probing for Infineon Super I/O at 0x4e... Failed. Returned data: id=0xff, rev=0xff No Super I/O found =====================================================================flashrom -p internal -V=====================================================================flashrom v0.9.7-r1711 on Linux 3.16.3-gnu-1 (x86_64) flashrom is free software, get the source code at http://www.flashrom.org flashrom was built with libpci 3.2.0, GCC 4.8.2, little endian Command line (3 args): flashrom -p internal -V Calibrating delay loop... OS timer resolution is 3 usecs, 856M loops per second, delay more than 10% too short (got 78% of expected delay), recalculating... 840M loops per second, delay more than 10% too short (got 77% of expected delay), recalculating... 1089M loops per second, 10 myus = 12 us, 100 myus = 84 us, 1000 myus = 957 us, 10000 myus = 11335 us, 12 myus = 41 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "Hewlett-Packard" DMI string system-product-name: "HP Pavilion g4 Notebook PC" DMI string system-version: "0695130000004610000600000" DMI string baseboard-manufacturer: "Hewlett-Packard" DMI string baseboard-product-name: "3564" DMI string baseboard-version: "21.46" DMI string chassis-type: "Notebook" Laptop detected via DMI. ======================================================================== WARNING! You seem to be running flashrom on an unsupported laptop. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and http://www.flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== Aborting. Error: Programmer initialization failed. ===================================================================== ==========================================================================================================================================

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Most Compatible Laptop and miniITX
by corebootlaptop＠yopmail.com 26 Oct '14

26 Oct '14

Which $300 to $500 laptop would be the topmost pick for CoreBoot compatibility? I need CoreBoot to Just Work as I cannot afford the risk or time for development. So the unit needs solid reliable support. The laptop will boot into Linux if you're wondering but I guess CoreBoot also does Windows. Can be new or slightly used. I'm happy to buy one or two generations old. Yet it needs HDMI output to drive a second 27-in. screen (as either (a) added pixel space, "Virtual Xdim Ydim" under X11, or (b) just as primary monitor with laptop's screen off). So video might need to be decent. I don't really care about the size of the laptop screen itself. I prefer AMD and/or Radeon over Intel, but only found one such laptop on the support list. The Pavilion m6 1035dx overheats say the reviews. I'd like to buy off-the-shelf retail. I'd love a CoreBoot guru to scour the offerings on retail websites (BestBuy, Walmart, the usual suspects). But mail-order warehouse vendors (NewEgg, TigerDirect) are OK. The main need is total CoreBoot compatibility. As long as I'm here I may as well ask about miniITX too. If the laptop is too problematic then that's another way I can go. What's the most compatible miniITX on the market? Thanks for everything, CoreBoot! -- http://www.fastmail.fm - Access all of your messages and folders wherever you are

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coreboot October 2014