coreboot October 2014

coreboot@coreboot.org

43 participants
111 discussions

Can anyone grant me the permission to edit corboot wiki?
by WANG FEI 09 Oct '14

09 Oct '14

I'm planning to update few pages on coreboot.org, do I need specify the page(s) I am going to edit? If so, http://www.coreboot.org/TianoCore. -Fei

1 0

Re: [coreboot] [Coreboot] Misalignment with GCC 4.9.1
by Peter Stuge 09 Oct '14

09 Oct '14

Hello Ryan, Lin, Ryan wrote: > I compiled coreboot with GCC 4.9.1 for x86 system, Is this a toolchain in the distribution, or an unpatched gcc-4.9.1 which you built yourself? > and found a misalignment issue. : .. > Does there any compiler options need to be added for GCC 4.9.1? We have seen countless similar problems in the past, which is why we recommend using the reference toolchain, which can be built by running: make crossgcc in the coreboot source tree. On subsequent make commands, the build system will autodetect a successfully built reference toolchain and use that instead of the regular toolchain in the system. Let us know if you encounter any trouble //Peter

1 0

#203: [Coreboot] Misalignment with GCC 4.9.1
by coreboot 08 Oct '14

08 Oct '14

#203: [Coreboot] Misalignment with GCC 4.9.1 ----------------------------+---------------------------------- Reporter: Ryan Lin | Owner: stepan@… Type: enhancement | Status: new Priority: major | Milestone: Component: coreboot | Keywords: Dependencies: | Patch Status: there is no patch ----------------------------+---------------------------------- Hello Coreboot, I compiled coreboot with GCC 4.9.1 for x86 system, and found a misalignment issue. : Here is the abnormal segment of ramstage.map: 0001d1d0 T _bs_init_begin 0001d1e0 t mrc_cache_update 0001d200 t pch_log 0001d220 t finalize 0001d248 t spi_init_bscb 0001d25c t cbmem_bscb 0001d280 t disable_rom_cache_bscb 0001d2a8 T _bs_init_end Issue 1 : the address of "mrc_cache_update" should be 0001d1d0, but it is shifted to 0001d1e0. Issue 2 : the size of "mrc_cache_update" is 20 bytes, so the start adress of "pch_log" should be 0001d1f4, but it is shifted to 0001d200. Does there any compiler options need to be added for GCC 4.9.1? Thank you, Ryan -- Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/203> coreboot <http://www.coreboot.org/>

1 0

[Coreboot] Misalignment with GCC 4.9.1
by Lin, Ryan 08 Oct '14

08 Oct '14

Hello Coreboot, I compiled coreboot with GCC 4.9.1 for x86 system, and found a misalignment issue. : Here is the abnormal segment of ramstage.map: 0001d1d0 T _bs_init_begin 0001d1e0 t mrc_cache_update 0001d200 t pch_log 0001d220 t finalize 0001d248 t spi_init_bscb 0001d25c t cbmem_bscb 0001d280 t disable_rom_cache_bscb 0001d2a8 T _bs_init_end Issue 1 : the address of "mrc_cache_update" should be 0001d1d0, but it is shifted to 0001d1e0. Issue 2 : the size of "mrc_cache_update" is 20 bytes, so the start adress of "pch_log" should be 0001d1f4, but it is shifted to 0001d200. Does there any compiler options need to be added for GCC 4.9.1? Thank you, Ryan

1 0

Re: [coreboot] [coreboot-gerrit] Patch set updated for coreboot: 851c693 intel/minnowmax: Enable S3 suspend/resume
by Marc Jones 08 Oct '14

08 Oct '14

Hi Mohan, Thanks for the S3 patches. What OSs have you tested S3 with? Have you tested that all the peripherals are working? I'm debugging a resume hang on Mint: [ 66.091759] PM: resume of devices complete after 1237.808 msecs [ 66.675574] PM: Finishing wakeup. [ 66.679321] Restarting tasks ... [ 66.683058] BUG: unable to handle kernel paging request at ffffffff4b86d1d8 [ 66.698356] IP: [<ffffffff81098adc>] cpus_share_cache+0xc/0x40 [ 66.708645] PGD 1c11067 PUD 0 [ 66.715812] Oops: 0000 [#2] SMP [ 66.723179] Modules linked in: coretemp kvm_intel kvm crct10dif_pclmul crc32_pi [ 66.774920] CPU: 1 PID: 2067 Comm: pm-suspend Tainted: G D 3.13.0-24u [ 66.789363] Hardware name: Intel Minnow Max 2GB/Minnow Max 2GB, BIOS 4.0 10/074 [ 66.802465] task: ffff880064072fe0 ti: ffff88005efe6000 task.ti: ffff88005efe60 [ 66.815416] RIP: 0010:[<ffffffff81098adc>] [<ffffffff81098adc>] cpus_share_ca0 [ 66.829327] RSP: 0000:ffff88005efe7ce0 EFLAGS: 00010017 [ 66.839943] RAX: 0000000000000000 RBX: 00000000f936b707 RCX: ffff880077c35fc0 [ 66.852661] RDX: ffff88007b714440 RSI: 0000000000000001 RDI: fffffffff936b707 [ 66.865387] RBP: ffff88005efe7d88 R08: 0000000000000010 R09: 00000000ffffffff [ 66.878133] R10: 0000000000000000 R11: 00000000000003f9 R12: 0000000000000001 [ 66.890902] R13: 0000000000014440 R14: 0000000000000001 R15: 00000000f936b707 [ 66.903678] FS: 00007f40204b7740(0000) GS:ffff88007b700000(0000) knlGS:0000000 [ 66.917524] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b [ 66.928724] CR2: ffffffff4b86d1d8 CR3: 000000005081c000 CR4: 00000000001007e0 [ 66.941523] Stack: [ 66.948602] ffff88005efe7d88 ffffffff8109fa92 000000005efe7d18 00000000005b8d0 [ 66.961788] ffff88007b714440 ffff880074432fe0 ffff880000000010 000000000000000 [ 66.974951] 0000000000000001 ffff88005efe7d40 ffffffff00000001 ffff880074432f0 [ 66.988138] Call Trace: [ 66.995783] [<ffffffff8109fa92>] ? select_task_rq_fair+0x582/0x6f0 [ 67.007754] [<ffffffff81097fe9>] ? ttwu_do_wakeup+0x19/0xc0 [ 67.019002] [<ffffffff8109a5b1>] try_to_wake_up+0x141/0x2c0 [ 67.030212] [<ffffffff8109a753>] wake_up_process+0x23/0x40 [ 67.041269] [<ffffffff810cb85c>] __thaw_task+0x2c/0x40 [ 67.051900] [<ffffffff810b3960>] thaw_processes+0xa0/0x130 [ 67.062938] [<ffffffff810b435e>] pm_suspend+0x18e/0x260 [ 67.073698] [<ffffffff810b3249>] state_store+0x79/0xf0 [ 67.084369] [<ffffffff8135f24f>] kobj_attr_store+0xf/0x20 [ 67.095326] [<ffffffff8122f418>] sysfs_write_file+0x128/0x1c0 [ 67.106672] [<ffffffff811b9534>] vfs_write+0xb4/0x1f0 [ 67.117246] [<ffffffff811b9f69>] SyS_write+0x49/0xa0 [ 67.127682] [<ffffffff817266bf>] tracesys+0xe1/0xe6 [ 67.137998] Code: e0 ff ff a8 08 0f 84 8d fe ff ff e9 3a ff ff ff 66 66 66 66 [ 67.164624] RIP [<ffffffff81098adc>] cpus_share_cache+0xc/0x40 [ 67.176349] RSP <ffff88005efe7ce0> [ 67.185315] CR2: ffffffff4b86d1d8 [ 67.194031] ---[ end trace 7f6401edfae25206 ]--- [ 96.598277] ------------[ cut here ]------------ [ 96.603441] WARNING: CPU: 1 PID: 36 at /build/buildd/linux-3.13.0/kernel/watch) [ 96.616163] Watchdog detected hard LOCKUP on cpu 1 [ 96.621308] Modules linked in: coretemp kvm_intel kvm crct10dif_pclmul crc32_pi [ 96.664488] CPU: 1 PID: 36 Comm: kswapd0 Tainted: G D 3.13.0-24-geneu [ 96.673916] Hardware name: Intel Minnow Max 2GB/Minnow Max 2GB, BIOS 4.0 10/074 [ 96.682469] 0000000000000009 ffff88007b706c20 ffffffff81715ac4 ffff88007b706c8 [ 96.690752] ffff88007b706c58 ffffffff810676bd ffff880075a25800 000000000000000 [ 96.699037] ffff88007b706d88 0000000000000000 ffff88007b706ef8 ffff88007b706c8 [ 96.707320] Call Trace: [ 96.710047] <NMI> [<ffffffff81715ac4>] dump_stack+0x45/0x56 [ 96.716483] [<ffffffff810676bd>] warn_slowpath_common+0x7d/0xa0 [ 96.723196] [<ffffffff8106772c>] warn_slowpath_fmt+0x4c/0x50 [ 96.729618] [<ffffffff8110d330>] ? restart_watchdog_hrtimer+0x50/0x50 [ 96.736914] [<ffffffff8110d3cc>] watchdog_overflow_callback+0x9c/0xd0 [ 96.744209] [<ffffffff81144b3e>] __perf_event_overflow+0x8e/0x240 [ 96.751117] [<ffffffff81028e48>] ? x86_perf_event_set_period+0xe8/0x150 [ 96.758606] [<ffffffff81145654>] perf_event_overflow+0x14/0x20 [ 96.765222] [<ffffffff8103028d>] intel_pmu_handle_irq+0x1cd/0x3d0 [ 96.772132] [<ffffffff8171f96b>] perf_event_nmi_handler+0x2b/0x50 [ 96.779039] [<ffffffff8171f188>] nmi_handle.isra.3+0x88/0x180 [ 96.785559] [<ffffffff8171f350>] do_nmi+0xd0/0x340 [ 96.791009] [<ffffffff8171e5f1>] end_repeat_nmi+0x1e/0x2e [ 96.797140] [<ffffffff8171db4f>] ? _raw_spin_lock_irq+0x3f/0x60 [ 96.803851] [<ffffffff8171db4f>] ? _raw_spin_lock_irq+0x3f/0x60 [ 96.810563] [<ffffffff8171db4f>] ? _raw_spin_lock_irq+0x3f/0x60 [ 96.817271] <<EOE>> [<ffffffff810cb57e>] __refrigerator+0x7e/0x1a0 [ 96.824385] [<ffffffff81163eaa>] kswapd+0x39a/0x410 [ 96.829934] [<ffffffff810aae90>] ? prepare_to_wait_event+0x100/0x100 [ 96.837133] [<ffffffff81163b10>] ? balance_pgdat+0x610/0x610 [ 96.843555] [<ffffffff8108b312>] kthread+0xd2/0xf0 [ 96.849005] [<ffffffff8108b240>] ? kthread_create_on_node+0x1d0/0x1d0 [ 96.856300] [<ffffffff817263fc>] ret_from_fork+0x7c/0xb0 [ 96.862333] [<ffffffff8108b240>] ? kthread_create_on_node+0x1d0/0x1d0 [ 96.869626] ---[ end trace 7f6401edfae25207 ]--- On Sat, Sep 27, 2014 at 8:27 AM, Mohan D'Costa <gerrit(a)coreboot.org> wrote: > Mohan D'Costa (mohan(a)ndr.co.jp) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6972 > > -gerrit > > commit 851c6936af062badc746abb4cc7fe8468c9c5745 > Author: Mohan D'Costa <mohan(a)ndr.co.jp> > Date: Thu Sep 25 18:17:08 2014 +0900 > > intel/minnowmax: Enable S3 suspend/resume > > This enables S3 Suspend / Resume support for MinnowMax board > using Intel's Bay Trail FSP > > Tested resume from Power Button and Magic Packet. > > Change-Id: I021122a68c05f2e725cabb8f3946249afe802bbe > Signed-off-by: Mohan D'Costa <mohan(a)ndr.co.jp> > --- > src/mainboard/intel/minnowmax/Kconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/src/mainboard/intel/minnowmax/Kconfig b/src/mainboard/intel/minnowmax/Kconfig > index 0e83d5a..229172c 100644 > --- a/src/mainboard/intel/minnowmax/Kconfig > +++ b/src/mainboard/intel/minnowmax/Kconfig > @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy > select HAVE_OPTION_TABLE > select OVERRIDE_MRC_CACHE_LOC > select TSC_MONOTONIC_TIMER > + select HAVE_ACPI_RESUME > > config MAINBOARD_DIR > string > > -- > coreboot-gerrit mailing list: coreboot-gerrit(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot-gerrit -- http://se-eng.com

1 0

Re: [coreboot] X60: ethernet LED still on when machine is powered off or suspended
by The Gluglug 08 Oct '14

08 Oct '14

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 21/08/14 23:41, ron minnich wrote: > On Thu, Aug 21, 2014 at 2:10 PM, The Gluglug <info(a)gluglug.org.uk> > wrote: >> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 >> >> >> >> On 21/08/14 22:08, The Gluglug wrote: >>> A little quirk I noticed. If I put the machine in suspend >>> while an ethernet cable is plugged in to a switch (or if >>> plugging it in after suspending), the green light from the >>> ethernet/eth0 is still active. >>> >>> Any ideas? >>> >> >> The same thing also happens while the machine is powered off, if >> I leave the AC adapter/charger connected. > > > and only on coreboot? > > I can't recall but I did have laptops that would light the LED even > when off, I always assumed it was the ME > > ron > Haven't tried it on factory.bin. Will let you know. i945 doesn't have ME/AMT, as far as I know. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQEcBAEBAgAGBQJT9ps5AAoJEP9Ft0z50c+UWKsIAJn5w/+6RxZ6oyhqaHSuJoBq 2/YHDL5TYM7EW0XoBstcB2NS7W/lWtWfwpCvNvM9R3ynliqPoAjErMZIuTwPM4p9 wBFvNdSWJGHOgxi8KEDA1n2Af0Dhfoys6Wb+uI3hflGGunJHz05QWiMEos0dWkmU JsZVr2HCrjIKTGooXJxZXfRlD6SY2S3PNY7myDcfeAaTnx6kCsySFCqBkfIUTIhf Mtg1NosYrbmNAXqROwrHf5LO3oAJ41zODZraMspYy+QDE8XvO2wbzkDBtglV4rBn V7qO7PaS1l1jfOlERTd3A6ZEXI4ltzr8BTwe3ZTZod+zrs9R9/May4JasN4lKe4= =on0Y -----END PGP SIGNATURE-----

3 2

Re: [coreboot] Suggested readings
by prasnik＠anche.no 08 Oct '14

08 Oct '14

Hello Greg, I think I got it. When you say that Intel "retires some part number", you probably mean that Intel has stopped to talk about some architectures (or cpu families) in its official documentation. And "working entry" should mean that those cpu-families are still valid, at least conceptually, today. Furthermore, today's "part numbers"/architectures/cpu-families on Intel manuals are them of the QUARK family. Finally, as for the book you suggested (Computer organization: hardware/software by Gorsline), the point is simply the fact that it talks about those "part numbers"/architectures/cpu-families that are not anymore on official Intel's documentation. Cheers

3 2

Re: [coreboot] Suggested readings
by prasnik＠anche.no 07 Oct '14

07 Oct '14

Hi Greg, On 2014-10-07 14:35, Gregg Levine wrote: [..] > It contains several sadly retired part numbers in the book, and of > course What do you mean with "part numbers" .. chapters? If so, does the whole sentence mean that this book has chapters on obsolete topics? > the members of the original series of system members. What is this "original serie of system members" ? (I googled a bit but found nothing related) > It largely talks about the actual beginning entries, the 8086 itself, > and > others. People here would find it useful because it still describes > useful ideas. > > Even Intel is realizing that the retired the X86 working entries in > the series too early, that's why the QUARK family is out now. Also here, what does "retiring a working entry" mean? Bye, and thanks a lot! > ----- > Gregg C Levine gregg.drwho8(a)gmail.com > "This signature fought the Time Wars, time and again." > > > On Tue, Oct 7, 2014 at 9:22 AM, Aaron Durbin <adurbin(a)chromium.org> > wrote: >> On Tue, Oct 7, 2014 at 4:59 AM, Peter Stuge <peter(a)stuge.se> wrote: >>> prasnik(a)anche.no wrote: >>>> do you mean that no book (that you know) talks about x86 systems? >>> >>> Some books do, no single book covers the 35+ years of legacy which is >>> still very much present in the latest x86 hardware. >> >> I'll definitely echo what Peter said. There are the intel manuals: >> >> http://www.intel.com/content/www/us/en/processors/architectures-software-de… >> >> While those are good, there are a lot of quirky things that are chip >> specific that aren't covered. And as Peter said there is a lot of >> legacy. >> >> http://www.amazon.com/The-Indispensable-Hardware-Book-Edition/dp/0201596164… >> >> That one is very much oriented to BIOS and PCs proper. There are some >> gems in there, but I wouldn't go to that if one wanted to understand >> computer architecture. >> >> -Aaron >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> http://www.coreboot.org/mailman/listinfo/coreboot

2 1

Re: [coreboot] Suggested readings
by WANG FEI 07 Oct '14

07 Oct '14

The most useful boot refer to legacy system I believe: http://www.amazon.com/The-Undocumented-PC-Programmers-Edition/dp/0201479508 Beside Aaron's suggestion of Intel manuals, I also recommend AMD programming manuals, http://developer.amd.com/resources/documentation-articles/developer-guides-… On Tue, Oct 7, 2014 at 3:35 PM, Gregg Levine <gregg.drwho8(a)gmail.com> wrote: > Hello! > I'll echo what you also said Aaron with this one on the X86 family as well: > > http://www.amazon.com/Computer-organization-Hardware-software-Gorsline/dp/0… > > That book happens to be extremely important to almost any programmer. > It contains several sadly retired part numbers in the book, and of > course the members of the original series of system members. It > largely talks about the actual beginning entries, the 8086 itself, and > others. People here would find it useful because it still describes > useful ideas. > > Even Intel is realizing that the retired the X86 working entries in > the series too early, that's why the QUARK family is out now. > ----- > Gregg C Levine gregg.drwho8(a)gmail.com > "This signature fought the Time Wars, time and again." > > > On Tue, Oct 7, 2014 at 9:22 AM, Aaron Durbin <adurbin(a)chromium.org> wrote: > > On Tue, Oct 7, 2014 at 4:59 AM, Peter Stuge <peter(a)stuge.se> wrote: > >> prasnik(a)anche.no wrote: > >>> do you mean that no book (that you know) talks about x86 systems? > >> > >> Some books do, no single book covers the 35+ years of legacy which is > >> still very much present in the latest x86 hardware. > > > > I'll definitely echo what Peter said. There are the intel manuals: > > > > > http://www.intel.com/content/www/us/en/processors/architectures-software-de… > > > > While those are good, there are a lot of quirky things that are chip > > specific that aren't covered. And as Peter said there is a lot of > > legacy. > > > > > http://www.amazon.com/The-Indispensable-Hardware-Book-Edition/dp/0201596164… > > > > That one is very much oriented to BIOS and PCs proper. There are some > > gems in there, but I wouldn't go to that if one wanted to understand > > computer architecture. > > > > -Aaron > > > > -- > > coreboot mailing list: coreboot(a)coreboot.org > > http://www.coreboot.org/mailman/listinfo/coreboot > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot >

1 0

Re: [coreboot] Suggested readings
by Gregg Levine 07 Oct '14

07 Oct '14

Hello! I'll echo what you also said Aaron with this one on the X86 family as well: http://www.amazon.com/Computer-organization-Hardware-software-Gorsline/dp/0… That book happens to be extremely important to almost any programmer. It contains several sadly retired part numbers in the book, and of course the members of the original series of system members. It largely talks about the actual beginning entries, the 8086 itself, and others. People here would find it useful because it still describes useful ideas. Even Intel is realizing that the retired the X86 working entries in the series too early, that's why the QUARK family is out now. ----- Gregg C Levine gregg.drwho8(a)gmail.com "This signature fought the Time Wars, time and again." On Tue, Oct 7, 2014 at 9:22 AM, Aaron Durbin <adurbin(a)chromium.org> wrote: > On Tue, Oct 7, 2014 at 4:59 AM, Peter Stuge <peter(a)stuge.se> wrote: >> prasnik(a)anche.no wrote: >>> do you mean that no book (that you know) talks about x86 systems? >> >> Some books do, no single book covers the 35+ years of legacy which is >> still very much present in the latest x86 hardware. > > I'll definitely echo what Peter said. There are the intel manuals: > > http://www.intel.com/content/www/us/en/processors/architectures-software-de… > > While those are good, there are a lot of quirky things that are chip > specific that aren't covered. And as Peter said there is a lot of > legacy. > > http://www.amazon.com/The-Indispensable-Hardware-Book-Edition/dp/0201596164… > > That one is very much oriented to BIOS and PCs proper. There are some > gems in there, but I wouldn't go to that if one wanted to understand > computer architecture. > > -Aaron > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot

1 0

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot October 2014