coreboot December 2012

coreboot@coreboot.org

30 participants
341 discussions

tyan s2882-d not booting
by Kui Zhang 04 Dec '12

04 Dec '12

I got some old boxes: tyan s2882-d, dual opteron processors, 16G RAM. 512K bios flash. So far, I am not able to get it to boot. It appears to reboot during CPU init. If anyone got coreboot working on this board, which revision did it worked last ? Serial console: coreboot-4.0-3129-gefb7940 Fri Nov 30 22:50:45 PST 2012 starting... Enabling routing table for node 00 done. Enabling SMP settings (0,1) link=01 (1,0) link=01 setup_remote_node: done Renaming current temporary node to 01 done. Enabling routing table for node 01 done. 02 nodes initialized. coherent_ht_finalize done SBLink=00 NC node|link=00 entering ht_optimize_link pos=0x8a, unfiltered freq_cap=0x8075 pos=0x8a, filtered freq_cap=0x75 pos=0xce, unfiltered freq_cap=0x35 freq_cap1=0x75, freq_cap2=0x15 dev1 old_freq=0x4, freq=0x4, needs_reset=0x0 dev2 old_freq=0x4, freq=0x4, needs_reset=0x0 width_cap1=0x11, width_cap2=0x11 dev1 input ln_width1=0x4, ln_width2=0x4 dev1 input width=0x1 dev1 output ln_width1=0x4, ln_width2=0x4 dev1 input|output width=0x11 old dev1 input|output width=0x11 dev2 input|output width=0x11 old dev2 input|output width=0x11 entering ht_optimize_link pos=0xd2, unfiltered freq_cap=0x35 pos=0xce, unfiltered freq_cap=0x1 pos=0xce, filtered freq_cap=0x1 freq_cap1=0x15, freq_cap2=0x1 dev1 old_freq=0x0, freq=0x0, needs_reset=0x0 dev2 old_freq=0x0, freq=0x0, needs_reset=0x0 width_cap1=0x0, width_cap2=0x0 dev1 input ln_width1=0x3, ln_width2=0x3 dev1 input width=0x0 dev1 output ln_width1=0x3, ln_width2=0x3 dev1 input|output width=0x0 old dev1 input|output width=0x0 dev2 input|output width=0x0 old dev2 input|output width=0x0 SMBus controller enabled Ram1.00 setting up CPU00 northbridge registers done. Ram1.01 setting up CPU01 northbridge registers done. Ram2.00 Enabling dual channel memory Registered 200MHz Interleaved RAM end at 0x00800000 kB Handling memory mapped above 4 GB Upper RAM end at 0x00800000 kB Correcting memory amount mapped below 4 GB Adjusting lower RAM end Lower RAM end at 0x003f0000 kB Ram2.01 Enabling dual channel memory Registered 200MHz Interleaved RAM end at 0x01000000 kB Handling memory mapped above 4 GB Upper RAM end at 0x01000000 kB Correcting memory amount mapped below 4 GB Adjusting lower RAM end Lower RAM end at 0x003f0000 kB Ram3 ECC enabled ECC enabled Initializing memory: done Initializing memory: done Handling memory hole at 0x00300000 (default) RAM end at 0x01100000 kB Handling memory mapped above 4 GB Upper RAM end at 0x01100000 kB Correcting memory amount mapped below 4 GB Adjusting lower RAM end Lower RAM end at 0x00300000 kB Ram4 v_esp=000cff48 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Loading image. CBFS: Looking for 'fallback/coreboot_ram' CBFS: found. INIT detected from --- { APICID = 00 NODEID = 00 COREID = 00} --- Issuing SOFT_RESET... .... No error during make. I tried building on x86_64 and x86. thanks Kui.Z

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how to use TianoCore as a coreboot payload
by WANG Siyuan 04 Dec '12

04 Dec '12

In this page http://www.coreboot.org/TianoCore , It is said that TianoCore could be a payload of coreboot to implement opensource UEFI environment. Now, I have built UDK(UEFI development Kit) successfully. Then what to do next? how to use these as payload of coreboot? -- Yours sincerely, WANG Siyuan

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Patch set updated for coreboot: c863b51 Conditionally include mc146818rtc in console.c
by David Hendricks 03 Dec '12

03 Dec '12

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1962 -gerrit commit c863b51bb5b6373c90d413c7f920fadb4ff0b582 Author: David Hendricks <dhendrix(a)chromium.org> Date: Fri Nov 30 19:16:50 2012 -0800 Conditionally include mc146818rtc in console.c This removes an unneeded header (pc80/mc146818rtc.h) if CMOS is unused and defines a weak symbol for get_option. Change-Id: I6adf371d79164178f40a83f7608289a6a7673357 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/console/console.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/console/console.c b/src/console/console.c index 8f60f04..f25a4a2 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -24,7 +24,21 @@ #ifndef __PRE_RAM__ #include <string.h> + +#ifdef HAVE_CMOS_DEFAULT #include <pc80/mc146818rtc.h> +#endif + +/* + * FIXME(dhendrix): stub for get_option(). This function is usually defined in + * mc146818rtc.c and libpayload. For now, make it a weak symbol that returns an + * error code to let the caller decide what to do (ie use default value). + */ +int __attribute__((weak)) get_option(void *dest, const char *name); +int __attribute__((weak)) get_option(void *dest, const char *name) +{ + return -1; +} /* initialize the console */ void console_init(void)

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Patch set updated for coreboot: a659f84 use regparm attribute for secondary_cpu_init on x86 only
by David Hendricks 02 Dec '12

02 Dec '12

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1964 -gerrit commit a659f84fac20c0ecf6603418c10dc0cbd03d0fef Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Dec 1 17:31:46 2012 -0800 use regparm attribute for secondary_cpu_init on x86 only Change-Id: Ib88a9ac0f96f3505894f2baf0e994a203c90c264 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/include/cpu/cpu.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index e8ea096..bd4a9df 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -7,7 +7,11 @@ void cpu_initialize(unsigned int cpu_index); struct bus; void initialize_cpus(struct bus *cpu_bus); +#if CONFIG_ARCH_X86 void __attribute__((regparm(0))) secondary_cpu_init(unsigned int cpu_index); +#else +void secondary_cpu_init(unsigned int cpu_index); +#endif #if CONFIG_HAVE_SMI_HANDLER void smm_init(void);

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New patch to review for coreboot: 784b42f use regparm attribute for secondary_cpu_init on x86 only
by David Hendricks 02 Dec '12

02 Dec '12

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1964 -gerrit commit 784b42f88d566671656c2f4f8459fdfd34898d60 Author: David Hendricks <dhendrix(a)chromium.org> Date: Sat Dec 1 17:31:46 2012 -0800 use regparm attribute for secondary_cpu_init on x86 only Change-Id: Ib88a9ac0f96f3505894f2baf0e994a203c90c264 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/include/cpu/cpu.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/include/cpu/cpu.h b/src/include/cpu/cpu.h index e8ea096..0fb100b 100644 --- a/src/include/cpu/cpu.h +++ b/src/include/cpu/cpu.h @@ -7,7 +7,11 @@ void cpu_initialize(unsigned int cpu_index); struct bus; void initialize_cpus(struct bus *cpu_bus); +#ifdef CONFIG_ARCH_X86 void __attribute__((regparm(0))) secondary_cpu_init(unsigned int cpu_index); +#else +void secondary_cpu_init(unsigned int cpu_index); +#endif #if CONFIG_HAVE_SMI_HANDLER void smm_init(void);

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Patch set updated for coreboot: fc8c7a9 Conditionally include mc146818rtc in console.c
by David Hendricks 02 Dec '12

02 Dec '12

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1962 -gerrit commit fc8c7a984b034c685778c703fbbbe27bde6250ba Author: David Hendricks <dhendrix(a)chromium.org> Date: Fri Nov 30 19:16:50 2012 -0800 Conditionally include mc146818rtc in console.c This removes an unneeded header (pc80/mc146818rtc.h) if CMOS is unused and defines a weak symbol for get_option. Change-Id: I6adf371d79164178f40a83f7608289a6a7673357 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/console/console.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/console/console.c b/src/console/console.c index 8f60f04..f25a4a2 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -24,7 +24,21 @@ #ifndef __PRE_RAM__ #include <string.h> + +#ifdef HAVE_CMOS_DEFAULT #include <pc80/mc146818rtc.h> +#endif + +/* + * FIXME(dhendrix): stub for get_option(). This function is usually defined in + * mc146818rtc.c and libpayload. For now, make it a weak symbol that returns an + * error code to let the caller decide what to do (ie use default value). + */ +int __attribute__((weak)) get_option(void *dest, const char *name); +int __attribute__((weak)) get_option(void *dest, const char *name) +{ + return -1; +} /* initialize the console */ void console_init(void)

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Patch merged into coreboot/master: 9b92665 Drop TINY_BOOTBLOCK
by gerrit＠coreboot.org 01 Dec '12

01 Dec '12

the following patch was just integrated into master: commit 9b926651413f051e63fcd473a534d205b31589a6 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Dec 1 18:45:00 2012 +0200 Drop TINY_BOOTBLOCK Change-Id: I38ea2ed2be4d9240ec8cb6d5dc5b3cc578cdaefb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/1963 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-By: Patrick Georgi <patrick(a)georgi-clan.de> at Sat Dec 1 22:50:43 2012, giving +2 See http://review.coreboot.org/1963 for details. -gerrit

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New patch to review for coreboot: b1c7623 Drop TINY_BOOTBLOCK
by Kyösti Mälkki 01 Dec '12

01 Dec '12

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1963 -gerrit commit b1c76231c68589054bb0181c246b2b503d81718b Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Dec 1 18:45:00 2012 +0200 Drop TINY_BOOTBLOCK Change-Id: I38ea2ed2be4d9240ec8cb6d5dc5b3cc578cdaefb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/mainboard/amd/parmer/Kconfig | 1 - src/mainboard/amd/thatcher/Kconfig | 1 - src/mainboard/supermicro/h8scm/Kconfig | 1 - src/mainboard/tyan/s8226/Kconfig | 1 - src/southbridge/amd/agesa/hudson/Kconfig | 1 - 5 files changed, 5 deletions(-) diff --git a/src/mainboard/amd/parmer/Kconfig b/src/mainboard/amd/parmer/Kconfig index f3b8875..e3b153d 100644 --- a/src/mainboard/amd/parmer/Kconfig +++ b/src/mainboard/amd/parmer/Kconfig @@ -37,7 +37,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select AMDMCT select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_4096 - select TINY_BOOTBLOCK select GFXUMA select UDELAY_LAPIC diff --git a/src/mainboard/amd/thatcher/Kconfig b/src/mainboard/amd/thatcher/Kconfig index 3eb7b1d..7700034 100644 --- a/src/mainboard/amd/thatcher/Kconfig +++ b/src/mainboard/amd/thatcher/Kconfig @@ -38,7 +38,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES select SUPERIO_SMSC_LPC47N217 select BOARD_ROMSIZE_KB_4096 - select TINY_BOOTBLOCK select GFXUMA select UDELAY_LAPIC diff --git a/src/mainboard/supermicro/h8scm/Kconfig b/src/mainboard/supermicro/h8scm/Kconfig index f5efcdd..e7dae66 100644 --- a/src/mainboard/supermicro/h8scm/Kconfig +++ b/src/mainboard/supermicro/h8scm/Kconfig @@ -38,7 +38,6 @@ config BOARD_SPECIFIC_OPTIONS select SERIAL_CPU_INIT select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_4096 - select TINY_BOOTBLOCK config MAINBOARD_DIR string diff --git a/src/mainboard/tyan/s8226/Kconfig b/src/mainboard/tyan/s8226/Kconfig index 859759f..e38bc04 100644 --- a/src/mainboard/tyan/s8226/Kconfig +++ b/src/mainboard/tyan/s8226/Kconfig @@ -38,7 +38,6 @@ config BOARD_SPECIFIC_OPTIONS select SERIAL_CPU_INIT select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_4096 - select TINY_BOOTBLOCK #select MMCONF_SUPPORT_DEFAULT #TODO enable it to resolve Multicore IO conflict config MAINBOARD_DIR diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 4afe377..24b61b3 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -21,7 +21,6 @@ config SOUTHBRIDGE_AMD_AGESA_HUDSON bool select IOAPIC select HAVE_USBDEBUG - select TINY_BOOTBLOCK config BOOTBLOCK_SOUTHBRIDGE_INIT string

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Patch set updated for coreboot: efb7940 Add include files for samsung s5p-common
by gerrit＠coreboot.org 01 Dec '12

01 Dec '12

just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1962 -gerrit commit efb7940867453c489df89ecadd173f0c41dea42e Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Tue Nov 27 13:20:43 2012 -0800 Add include files for samsung s5p-common These are from u-boot but have been cleaned up somewhat to remove references to linux include files. Change-Id: I5fe3954a11d8c4aa792620ef5e1a5ee8932b8578 Signed-off-by: Hung-Ti Lin <hungte(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/1930 Tested-by: build bot (Jenkins) --- src/cpu/samsung/s5p-common/clk.h | 38 ++++++++ src/cpu/samsung/s5p-common/clock.h | 94 ++++++++++++++++++ src/cpu/samsung/s5p-common/cpu.h | 116 ++++++++++++++++++++++ src/cpu/samsung/s5p-common/gpio.h | 173 +++++++++++++++++++++++++++++++++ src/cpu/samsung/s5p-common/mmc.h | 73 ++++++++++++++ src/cpu/samsung/s5p-common/power.h | 42 ++++++++ src/cpu/samsung/s5p-common/pwm.h | 75 ++++++++++++++ src/cpu/samsung/s5p-common/sromc.h | 53 ++++++++++ src/cpu/samsung/s5p-common/sys_proto.h | 29 ++++++ src/cpu/samsung/s5p-common/uart.h | 58 +++++++++++ src/cpu/samsung/s5p-common/watchdog.h | 58 +++++++++++ 11 files changed, 809 insertions(+) diff --git a/src/cpu/samsung/s5p-common/clk.h b/src/cpu/samsung/s5p-common/clk.h new file mode 100644 index 0000000..69c7e4e --- /dev/null +++ b/src/cpu/samsung/s5p-common/clk.h @@ -0,0 +1,38 @@ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * Heungjun Kim <riverful.kim(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __S5P_COMMON_CLK_H_ +#define __S5P_COMMON_CLK_H_ + +#define APLL 0 +#define MPLL 1 +#define EPLL 2 +#define HPLL 3 +#define VPLL 4 + +unsigned long get_pll_clk(int pllreg); +unsigned long get_arm_clk(void); +unsigned long get_pwm_clk(void); +unsigned long get_uart_clk(int dev_index); +void set_mmc_clk(int dev_index, unsigned int div); + +#endif diff --git a/src/cpu/samsung/s5p-common/clock.h b/src/cpu/samsung/s5p-common/clock.h new file mode 100644 index 0000000..7b4eb89 --- /dev/null +++ b/src/cpu/samsung/s5p-common/clock.h @@ -0,0 +1,94 @@ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * Heungjun Kim <riverful.kim(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_CLOCK_H_ +#define __ASM_ARM_ARCH_CLOCK_H_ + +#ifndef __ASSEMBLY__ +struct s5pc100_clock { + unsigned int apll_lock; + unsigned int mpll_lock; + unsigned int epll_lock; + unsigned int hpll_lock; + unsigned char res1[0xf0]; + unsigned int apll_con; + unsigned int mpll_con; + unsigned int epll_con; + unsigned int hpll_con; + unsigned char res2[0xf0]; + unsigned int src0; + unsigned int src1; + unsigned int src2; + unsigned int src3; + unsigned char res3[0xf0]; + unsigned int div0; + unsigned int div1; + unsigned int div2; + unsigned int div3; + unsigned int div4; + unsigned char res4[0x1ec]; + unsigned int gate_d00; + unsigned int gate_d01; + unsigned int gate_d02; + unsigned char res5[0x54]; + unsigned int gate_sclk0; + unsigned int gate_sclk1; +}; + +struct s5pc110_clock { + unsigned int apll_lock; + unsigned char res1[0x4]; + unsigned int mpll_lock; + unsigned char res2[0x4]; + unsigned int epll_lock; + unsigned char res3[0xc]; + unsigned int vpll_lock; + unsigned char res4[0xdc]; + unsigned int apll_con; + unsigned char res5[0x4]; + unsigned int mpll_con; + unsigned char res6[0x4]; + unsigned int epll_con; + unsigned char res7[0xc]; + unsigned int vpll_con; + unsigned char res8[0xdc]; + unsigned int src0; + unsigned int src1; + unsigned int src2; + unsigned int src3; + unsigned char res9[0xf0]; + unsigned int div0; + unsigned int div1; + unsigned int div2; + unsigned int div3; + unsigned int div4; + unsigned char res10[0x1ec]; + unsigned int gate_d00; + unsigned int gate_d01; + unsigned int gate_d02; + unsigned char res11[0x54]; + unsigned int gate_sclk0; + unsigned int gate_sclk1; +}; +#endif + +#endif diff --git a/src/cpu/samsung/s5p-common/cpu.h b/src/cpu/samsung/s5p-common/cpu.h new file mode 100644 index 0000000..34be1f2 --- /dev/null +++ b/src/cpu/samsung/s5p-common/cpu.h @@ -0,0 +1,116 @@ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * Heungjun Kim <riverful.kim(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef _S5PC1XX_CPU_H +#define _S5PC1XX_CPU_H + +#define S5PC1XX_ADDR_BASE 0xE0000000 + +/* S5PC100 */ +#define S5PC100_PRO_ID 0xE0000000 +#define S5PC100_CLOCK_BASE 0xE0100000 +#define S5PC100_GPIO_BASE 0xE0300000 +#define S5PC100_VIC0_BASE 0xE4000000 +#define S5PC100_VIC1_BASE 0xE4100000 +#define S5PC100_VIC2_BASE 0xE4200000 +#define S5PC100_DMC_BASE 0xE6000000 +#define S5PC100_SROMC_BASE 0xE7000000 +#define S5PC100_ONENAND_BASE 0xE7100000 +#define S5PC100_PWMTIMER_BASE 0xEA000000 +#define S5PC100_WATCHDOG_BASE 0xEA200000 +#define S5PC100_UART_BASE 0xEC000000 +#define S5PC100_MMC_BASE 0xED800000 + +/* S5PC110 */ +#define S5PC110_PRO_ID 0xE0000000 +#define S5PC110_CLOCK_BASE 0xE0100000 +#define S5PC110_GPIO_BASE 0xE0200000 +#define S5PC110_PWMTIMER_BASE 0xE2500000 +#define S5PC110_WATCHDOG_BASE 0xE2700000 +#define S5PC110_UART_BASE 0xE2900000 +#define S5PC110_SROMC_BASE 0xE8000000 +#define S5PC110_MMC_BASE 0xEB000000 +#define S5PC110_DMC0_BASE 0xF0000000 +#define S5PC110_DMC1_BASE 0xF1400000 +#define S5PC110_VIC0_BASE 0xF2000000 +#define S5PC110_VIC1_BASE 0xF2100000 +#define S5PC110_VIC2_BASE 0xF2200000 +#define S5PC110_VIC3_BASE 0xF2300000 +#define S5PC110_OTG_BASE 0xEC000000 +#define S5PC110_PHY_BASE 0xEC100000 +#define S5PC110_USB_PHY_CONTROL 0xE010E80C + + +#include <arch/io.h> +/* CPU detection macros */ +extern unsigned int s5p_cpu_id; + +/* FIXME(dhendrix): conflicts with the one in cpu_info.c ... */ +#if 0 +inline void s5p_set_cpu_id(void) +{ + s5p_cpu_id = readl(S5PC100_PRO_ID); + s5p_cpu_id = 0xC000 | ((s5p_cpu_id & 0x00FFF000) >> 12); +} +#endif +inline void s5p_set_cpu_id(void); + +#define IS_SAMSUNG_TYPE(type, id) \ +static inline int cpu_is_##type(void) \ +{ \ + return s5p_cpu_id == id ? 1 : 0; \ +} + +IS_SAMSUNG_TYPE(s5pc100, 0xc100) +IS_SAMSUNG_TYPE(s5pc110, 0xc110) + +/* + * FIXME(dhendrix): collides with SAMSUNG_BASE in exynos header files. We + * don't really care about old S5P processors right now. + */ +#if 0 +#define SAMSUNG_BASE(device, base) \ +static inline unsigned int samsung_get_base_##device(void) \ +{ \ + if (cpu_is_s5pc100()) \ + return S5PC100_##base; \ + else if (cpu_is_s5pc110()) \ + return S5PC110_##base; \ + else \ + return 0; \ +} + +SAMSUNG_BASE(clock, CLOCK_BASE) +SAMSUNG_BASE(gpio, GPIO_BASE) +SAMSUNG_BASE(pro_id, PRO_ID) +SAMSUNG_BASE(mmc, MMC_BASE) +SAMSUNG_BASE(sromc, SROMC_BASE) +SAMSUNG_BASE(timer, PWMTIMER_BASE) +SAMSUNG_BASE(uart, UART_BASE) +SAMSUNG_BASE(watchdog, WATCHDOG_BASE) +#endif + +int s5p_get_cpu_rev(void); +//void s5p_set_cpu_id(void); +int s5p_get_cpu_id(void); + +#endif /* _S5PC1XX_CPU_H */ diff --git a/src/cpu/samsung/s5p-common/gpio.h b/src/cpu/samsung/s5p-common/gpio.h new file mode 100644 index 0000000..2522808 --- /dev/null +++ b/src/cpu/samsung/s5p-common/gpio.h @@ -0,0 +1,173 @@ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef S5P_GPIO_H_ +#define S5P_GPIO_H_ + +#include <cpu/samsung/s5p-common/cpu.h> /* FIXME: for S5PC110_GPIO_BASE */ + +#ifndef __ASSEMBLY__ +struct s5p_gpio_bank { + unsigned int con; + unsigned int dat; + unsigned int pull; + unsigned int drv; + unsigned int pdn_con; + unsigned int pdn_pull; + unsigned char res1[8]; +}; + +struct s5pc100_gpio { + struct s5p_gpio_bank a0; + struct s5p_gpio_bank a1; + struct s5p_gpio_bank b; + struct s5p_gpio_bank c; + struct s5p_gpio_bank d; + struct s5p_gpio_bank e0; + struct s5p_gpio_bank e1; + struct s5p_gpio_bank f0; + struct s5p_gpio_bank f1; + struct s5p_gpio_bank f2; + struct s5p_gpio_bank f3; + struct s5p_gpio_bank g0; + struct s5p_gpio_bank g1; + struct s5p_gpio_bank g2; + struct s5p_gpio_bank g3; + struct s5p_gpio_bank i; + struct s5p_gpio_bank j0; + struct s5p_gpio_bank j1; + struct s5p_gpio_bank j2; + struct s5p_gpio_bank j3; + struct s5p_gpio_bank j4; + struct s5p_gpio_bank k0; + struct s5p_gpio_bank k1; + struct s5p_gpio_bank k2; + struct s5p_gpio_bank k3; + struct s5p_gpio_bank l0; + struct s5p_gpio_bank l1; + struct s5p_gpio_bank l2; + struct s5p_gpio_bank l3; + struct s5p_gpio_bank l4; + struct s5p_gpio_bank h0; + struct s5p_gpio_bank h1; + struct s5p_gpio_bank h2; + struct s5p_gpio_bank h3; +}; + +struct s5pc110_gpio { + struct s5p_gpio_bank a0; + struct s5p_gpio_bank a1; + struct s5p_gpio_bank b; + struct s5p_gpio_bank c0; + struct s5p_gpio_bank c1; + struct s5p_gpio_bank d0; + struct s5p_gpio_bank d1; + struct s5p_gpio_bank e0; + struct s5p_gpio_bank e1; + struct s5p_gpio_bank f0; + struct s5p_gpio_bank f1; + struct s5p_gpio_bank f2; + struct s5p_gpio_bank f3; + struct s5p_gpio_bank g0; + struct s5p_gpio_bank g1; + struct s5p_gpio_bank g2; + struct s5p_gpio_bank g3; + struct s5p_gpio_bank i; + struct s5p_gpio_bank j0; + struct s5p_gpio_bank j1; + struct s5p_gpio_bank j2; + struct s5p_gpio_bank j3; + struct s5p_gpio_bank j4; + struct s5p_gpio_bank mp0_1; + struct s5p_gpio_bank mp0_2; + struct s5p_gpio_bank mp0_3; + struct s5p_gpio_bank mp0_4; + struct s5p_gpio_bank mp0_5; + struct s5p_gpio_bank mp0_6; + struct s5p_gpio_bank mp0_7; + struct s5p_gpio_bank mp1_0; + struct s5p_gpio_bank mp1_1; + struct s5p_gpio_bank mp1_2; + struct s5p_gpio_bank mp1_3; + struct s5p_gpio_bank mp1_4; + struct s5p_gpio_bank mp1_5; + struct s5p_gpio_bank mp1_6; + struct s5p_gpio_bank mp1_7; + struct s5p_gpio_bank mp1_8; + struct s5p_gpio_bank mp2_0; + struct s5p_gpio_bank mp2_1; + struct s5p_gpio_bank mp2_2; + struct s5p_gpio_bank mp2_3; + struct s5p_gpio_bank mp2_4; + struct s5p_gpio_bank mp2_5; + struct s5p_gpio_bank mp2_6; + struct s5p_gpio_bank mp2_7; + struct s5p_gpio_bank mp2_8; + struct s5p_gpio_bank res1[48]; + struct s5p_gpio_bank h0; + struct s5p_gpio_bank h1; + struct s5p_gpio_bank h2; + struct s5p_gpio_bank h3; +}; + +/* functions */ +void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); +void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en); +void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio); +void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en); +unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio); +void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode); +void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode); +void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); + +/* GPIO pins per bank */ +#define GPIO_PER_BANK 8 + +static inline unsigned int s5p_gpio_base(int nr) +{ + return S5PC110_GPIO_BASE; +} + +#define s5pc110_gpio_get_nr(bank, pin) \ + ((((((unsigned int)&(((struct s5pc110_gpio *)S5PC110_GPIO_BASE)->bank))\ + - S5PC110_GPIO_BASE) / sizeof(struct s5p_gpio_bank)) \ + * GPIO_PER_BANK) + pin) +#endif + +/* Pin configurations */ +#define GPIO_INPUT 0x0 +#define GPIO_OUTPUT 0x1 +#define GPIO_IRQ 0xf +#define GPIO_FUNC(x) (x) + +/* Pull mode */ +#define GPIO_PULL_NONE 0x0 +#define GPIO_PULL_DOWN 0x1 +#define GPIO_PULL_UP 0x2 + +/* Drive Strength level */ +#define GPIO_DRV_1X 0x0 +#define GPIO_DRV_3X 0x1 +#define GPIO_DRV_2X 0x2 +#define GPIO_DRV_4X 0x3 +#define GPIO_DRV_FAST 0x0 +#define GPIO_DRV_SLOW 0x1 + +#endif /* S5P_GPIO_H_ */ diff --git a/src/cpu/samsung/s5p-common/mmc.h b/src/cpu/samsung/s5p-common/mmc.h new file mode 100644 index 0000000..adef4ee --- /dev/null +++ b/src/cpu/samsung/s5p-common/mmc.h @@ -0,0 +1,73 @@ +/* + * (C) Copyright 2009 SAMSUNG Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_MMC_H_ +#define __ASM_ARCH_MMC_H_ + +#ifndef __ASSEMBLY__ +struct s5p_mmc { + unsigned int sysad; + unsigned short blksize; + unsigned short blkcnt; + unsigned int argument; + unsigned short trnmod; + unsigned short cmdreg; + unsigned int rspreg0; + unsigned int rspreg1; + unsigned int rspreg2; + unsigned int rspreg3; + unsigned int bdata; + unsigned int prnsts; + unsigned char hostctl; + unsigned char pwrcon; + unsigned char blkgap; + unsigned char wakcon; + unsigned short clkcon; + unsigned char timeoutcon; + unsigned char swrst; + unsigned int norintsts; /* errintsts */ + unsigned int norintstsen; /* errintstsen */ + unsigned int norintsigen; /* errintsigen */ + unsigned short acmd12errsts; + unsigned char res1[2]; + unsigned int capareg; + unsigned char res2[4]; + unsigned int maxcurr; + unsigned char res3[0x34]; + unsigned int control2; + unsigned int control3; + unsigned char res4[4]; + unsigned int control4; + unsigned char res5[0x6e]; + unsigned short hcver; + unsigned char res6[0xFFF00]; +}; + +struct mmc_host { + struct s5p_mmc *reg; + unsigned int version; /* SDHCI spec. version */ + unsigned int clock; /* Current clock (MHz) */ + int dev_index; +}; + +int s5p_mmc_init(int dev_index, int bus_width); + +#endif /* __ASSEMBLY__ */ +#endif diff --git a/src/cpu/samsung/s5p-common/power.h b/src/cpu/samsung/s5p-common/power.h new file mode 100644 index 0000000..57e2a2b --- /dev/null +++ b/src/cpu/samsung/s5p-common/power.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2009 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_POWER_H_ +#define __ASM_ARM_ARCH_POWER_H_ + +/* + * Power control + */ +#define S5PC100_OTHERS 0xE0108200 +#define S5PC100_RST_STAT 0xE0108300 +#define S5PC100_SLEEP_WAKEUP (1 << 3) +#define S5PC100_WAKEUP_STAT 0xE0108304 +#define S5PC100_INFORM0 0xE0108400 + +#define S5PC110_RST_STAT 0xE010A000 +#define S5PC110_SLEEP_WAKEUP (1 << 3) +#define S5PC110_WAKEUP_STAT 0xE010C200 +#define S5PC110_OTHERS 0xE010E000 +#define S5PC110_USB_PHY_CON 0xE010E80C +#define S5PC110_INFORM0 0xE010F000 + +#endif diff --git a/src/cpu/samsung/s5p-common/pwm.h b/src/cpu/samsung/s5p-common/pwm.h new file mode 100644 index 0000000..1ac348b --- /dev/null +++ b/src/cpu/samsung/s5p-common/pwm.h @@ -0,0 +1,75 @@ +/* + * Copyright (C) 2009 Samsung Electronics + * Kyungmin Park <kyungmin.park(a)samsung.com> + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __S5P_COMMON_PWM_H_ +#define __S5P_COMMON_PWM_H_ + +#define PRESCALER_0 (8 - 1) /* prescaler of timer 0, 1 */ +#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ + +/* Divider MUX */ +#define MUX_DIV_1 0 /* 1/1 period */ +#define MUX_DIV_2 1 /* 1/2 period */ +#define MUX_DIV_4 2 /* 1/4 period */ +#define MUX_DIV_8 3 /* 1/8 period */ +#define MUX_DIV_16 4 /* 1/16 period */ + +#define MUX_DIV_SHIFT(x) (x * 4) + +#define TCON_OFFSET(x) ((x + 1) * (!!x) << 2) + +#define TCON_START(x) (1 << TCON_OFFSET(x)) +#define TCON_UPDATE(x) (1 << (TCON_OFFSET(x) + 1)) +#define TCON_INVERTER(x) (1 << (TCON_OFFSET(x) + 2)) +#define TCON_AUTO_RELOAD(x) (1 << (TCON_OFFSET(x) + 3)) +#define TCON4_AUTO_RELOAD (1 << 22) + +#ifndef __ASSEMBLY__ +struct s5p_timer { + unsigned int tcfg0; + unsigned int tcfg1; + unsigned int tcon; + unsigned int tcntb0; + unsigned int tcmpb0; + unsigned int tcnto0; + unsigned int tcntb1; + unsigned int tcmpb1; + unsigned int tcnto1; + unsigned int tcntb2; + unsigned int tcmpb2; + unsigned int tcnto2; + unsigned int tcntb3; + unsigned int res1; + unsigned int tcnto3; + unsigned int tcntb4; + unsigned int tcnto4; + unsigned int tintcstat; +}; +#endif /* __ASSEMBLY__ */ + +/* FIXME(dhendrix): added missing prototypes... */ +int pwm_config(int pwm_id, int duty_ns, int period_ns); +int pwm_check_enabled(int pwm_id); +void pwm_disable(int pwm_id); +int pwm_enable(int pwm_id); +int pwm_init(int pwm_id, int div, int invert); + +#endif /* __S5P_COMMON_PWM_H_ */ diff --git a/src/cpu/samsung/s5p-common/sromc.h b/src/cpu/samsung/s5p-common/sromc.h new file mode 100644 index 0000000..3800a8d --- /dev/null +++ b/src/cpu/samsung/s5p-common/sromc.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2010 Samsung Electronics + * Naveen Krishna Ch <ch.naveen(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Note: This file contains the register description for Memory subsystem + * (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX. + * + * Only SROMC is defined as of now + */ + +#ifndef __ASM_ARCH_SROMC_H_ +#define __ASM_ARCH_SROMC_H_ + +#define SMC_DATA16_WIDTH(x) (1<<((x*4)+0)) +#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/ + /* 1-> Byte base address*/ +#define SMC_WAIT_ENABLE(x) (1<<((x*4)+2)) +#define SMC_BYTE_ENABLE(x) (1<<((x*4)+3)) + +#define SMC_BC_TACS(x) (x << 28) /* 0clk address set-up */ +#define SMC_BC_TCOS(x) (x << 24) /* 4clk chip selection set-up */ +#define SMC_BC_TACC(x) (x << 16) /* 14clk access cycle */ +#define SMC_BC_TCOH(x) (x << 12) /* 1clk chip selection hold */ +#define SMC_BC_TAH(x) (x << 8) /* 4clk address holding time */ +#define SMC_BC_TACP(x) (x << 4) /* 6clk page mode access cycle */ +#define SMC_BC_PMC(x) (x << 0) /* normal(1data)page mode configuration */ + +#ifndef __ASSEMBLY__ +struct s5p_sromc { + unsigned int bw; + unsigned int bc[6]; +}; +#endif /* __ASSEMBLY__ */ + +/* Configure the Band Width and Bank Control Regs for required SROMC Bank */ +void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf); + +#endif /* __ASM_ARCH_SMC_H_ */ diff --git a/src/cpu/samsung/s5p-common/sys_proto.h b/src/cpu/samsung/s5p-common/sys_proto.h new file mode 100644 index 0000000..7b83c5a --- /dev/null +++ b/src/cpu/samsung/s5p-common/sys_proto.h @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2009 Samsung Electrnoics + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SYS_PROTO_H_ +#define _SYS_PROTO_H_ + +u32 get_device_type(void); + +#endif diff --git a/src/cpu/samsung/s5p-common/uart.h b/src/cpu/samsung/s5p-common/uart.h new file mode 100644 index 0000000..1c56739 --- /dev/null +++ b/src/cpu/samsung/s5p-common/uart.h @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang <mk7.kang(a)samsung.com> + * Heungjun Kim <riverful.kim(a)samsung.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_UART_H_ +#define __ASM_ARCH_UART_H_ + +#ifndef __ASSEMBLY__ +/* baudrate rest value */ +union br_rest { + unsigned short slot; /* udivslot */ + unsigned char value; /* ufracval */ +}; + +struct s5p_uart { + unsigned int ulcon; + unsigned int ucon; + unsigned int ufcon; + unsigned int umcon; + unsigned int utrstat; + unsigned int uerstat; + unsigned int ufstat; + unsigned int umstat; + unsigned char utxh; + unsigned char res1[3]; + unsigned char urxh; + unsigned char res2[3]; + unsigned int ubrdiv; + union br_rest rest; + unsigned char res3[0x3d0]; +}; + +static inline int s5p_uart_divslot(void) +{ + return 1; +} + +#endif /* __ASSEMBLY__ */ + +#endif diff --git a/src/cpu/samsung/s5p-common/watchdog.h b/src/cpu/samsung/s5p-common/watchdog.h new file mode 100644 index 0000000..0f80ca5 --- /dev/null +++ b/src/cpu/samsung/s5p-common/watchdog.h @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Heungjun Kim <riverful.kim(a)samsung.com> + * Minkyu Kang <mk7.kang(a)samsung.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARM_ARCH_WATCHDOG_H_ +#define __ASM_ARM_ARCH_WATCHDOG_H_ + +#define WTCON_RESET_OFFSET 0 +#define WTCON_INTEN_OFFSET 2 +#define WTCON_CLKSEL_OFFSET 3 +#define WTCON_EN_OFFSET 5 +#define WTCON_PRE_OFFSET 8 + +#define WTCON_CLK_16 0x0 +#define WTCON_CLK_32 0x1 +#define WTCON_CLK_64 0x2 +#define WTCON_CLK_128 0x3 + +#define WTCON_CLK(x) ((x & 0x3) << WTCON_CLKSEL_OFFSET) +#define WTCON_PRESCALER(x) ((x) << WTCON_PRE_OFFSET) +#define WTCON_EN (0x1 << WTCON_EN_OFFSET) +#define WTCON_RESET (0x1 << WTCON_RESET_OFFSET) +#define WTCON_INT (0x1 << WTCON_INTEN_OFFSET) + +#ifndef __ASSEMBLY__ +struct s5p_watchdog { + unsigned int wtcon; + unsigned int wtdat; + unsigned int wtcnt; + unsigned int wtclrint; +}; + +/* functions */ +void wdt_stop(void); +void wdt_start(unsigned int timeout); +#endif /* __ASSEMBLY__ */ + +#endif

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Patch merged into coreboot/master: efb7940 Add include files for samsung s5p-common
by gerrit＠coreboot.org 01 Dec '12

01 Dec '12

the following patch was just integrated into master: commit efb7940867453c489df89ecadd173f0c41dea42e Author: Ronald G. Minnich <rminnich(a)gmail.com> Date: Tue Nov 27 13:20:43 2012 -0800 Add include files for samsung s5p-common These are from u-boot but have been cleaned up somewhat to remove references to linux include files. Change-Id: I5fe3954a11d8c4aa792620ef5e1a5ee8932b8578 Signed-off-by: Hung-Ti Lin <hungte(a)chromium.org> Signed-off-by: David Hendricks <dhendrix(a)chromium.org> Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-on: http://review.coreboot.org/1930 Tested-by: build bot (Jenkins) Build-Tested: build bot (Jenkins) at Sat Dec 1 01:08:14 2012, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Sat Dec 1 02:13:14 2012, giving +2 See http://review.coreboot.org/1930 for details. -gerrit

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coreboot December 2012