coreboot November 2011

coreboot@coreboot.org

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432 discussions

New patch to review for coreboot: 1eefdb3 Via Epia-N and C3: Set ioapic delivery type in Kconfig
by Kyösti Mälkki 20 Nov '11

20 Nov '11

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/435 -gerrit commit 1eefdb3bbbd582042a2b332f55df0a54c3d8cae9 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Nov 20 20:08:15 2011 +0200 Via Epia-N and C3: Set ioapic delivery type in Kconfig The original comment says it's a Via C3 and not Epia requirement to deliver IOAPIC interrupts on APIC serial bus. If someone can confirm this, set delivery type under cpu/via/model_c3 instead. Change-Id: I73c55755e0ec1ac5756b4ee7ccdfc8eb93184e4f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 4 ++++ src/arch/x86/lib/ioapic.c | 9 --------- src/mainboard/via/epia-n/Kconfig | 5 +++++ 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 525d452..1df339d 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -239,6 +239,10 @@ config IOAPIC bool default n +config IOAPIC_DELIVERY_TYPE + int + default 1 + # TODO: Can probably be removed once all chipsets have kconfig options for it. config VIDEO_MB int diff --git a/src/arch/x86/lib/ioapic.c b/src/arch/x86/lib/ioapic.c index 91e43a6..fee2ca1 100644 --- a/src/arch/x86/lib/ioapic.c +++ b/src/arch/x86/lib/ioapic.c @@ -180,15 +180,6 @@ static void load_vectors(u32 ioapic_base, u8 bsp_lapicid) } } -// XXX this decision should probably be made elsewhere, and -// it's the C3, not the EPIA this depends on. - -#if CONFIG_EPIA_VT8237R_INIT -#define CONFIG_IOAPIC_DELIVERY_TYPE 0 -#else -#define CONFIG_IOAPIC_DELIVERY_TYPE 1 -#endif - /** * Assign IOAPIC with an ID * diff --git a/src/mainboard/via/epia-n/Kconfig b/src/mainboard/via/epia-n/Kconfig index 4806753..5a88f6a 100644 --- a/src/mainboard/via/epia-n/Kconfig +++ b/src/mainboard/via/epia-n/Kconfig @@ -28,4 +28,9 @@ config IRQ_SLOT_COUNT int default 7 +# IRQ delivery on APIC bus may be a Via C3 CPU requirement. +config IOAPIC_DELIVERY_TYPE + int + default 0 + endif # BOARD_VIA_EPIA_N

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Can't disable serial console debug for MS-6178
by Christian 20 Nov '11

20 Nov '11

Hello, if I disable serial console debug in KConfig I get a compiling error in src/include/uart8250.h at line 31/32 Is that a known issue? chris

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Coreboot support for ASUS M5 A99X EVO ?
by Christopher Huang-Leaver 19 Nov '11

19 Nov '11

Hello, I noticed earlier versions of this board are fully supported, but not this one. I have attached the output of, lspci, flashrom and dmidecode, if that is any use to anyone. The spec sheet is easy to find by typing ASUS M5 A99X into Google. The board does have a neat feature of being able to flash the BIOS from within the BIOS menu, which I have already used to update it. Many thanks Chris -[0000:00]-+-00.0 ATI Technologies Inc RD890 PCI to PCI bridge (external gfx0 port B) [1002:5a14] +-00.2 ATI Technologies Inc Device [1002:5a23] +-03.0-[01]----00.0 nVidia Corporation G92 [GeForce 9800 GT] [10de:0605] +-04.0-[02]----00.0 Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] +-05.0-[03]----00.0 Device [1b21:1042] +-06.0-[04]----00.0 JMicron Technology Corp. Device [197b:2362] +-07.0-[05]----00.0 Device [1b21:1042] +-0a.0-[06]----00.0 JMicron Technology Corp. Device [197b:2362] +-11.0 ATI Technologies Inc SB700/SB800 SATA Controller [AHCI mode] [1002:4391] +-12.0 ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397] +-12.2 ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396] +-13.0 ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397] +-13.2 ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396] +-14.0 ATI Technologies Inc SBx00 SMBus Controller [1002:4385] +-14.2 ATI Technologies Inc SBx00 Azalia (Intel HDA) [1002:4383] +-14.3 ATI Technologies Inc SB700/SB800 LPC host controller [1002:439d] +-14.4-[07]----06.0 VIA Technologies, Inc. VT6306 Fire II IEEE 1394 OHCI Link Layer Controller [1106:3044] +-14.5 ATI Technologies Inc SB700/SB800 USB OHCI2 Controller [1002:4399] +-16.0 ATI Technologies Inc SB700/SB800 USB OHCI0 Controller [1002:4397] +-16.2 ATI Technologies Inc SB700/SB800 USB EHCI Controller [1002:4396] +-18.0 Advanced Micro Devices [AMD] K10 [Opteron, Athlon64, Sempron] HyperTransport Configuration [1022:1200] +-18.1 Advanced Micro Devices [AMD] K10 [Opteron, Athlon64, Sempron] Address Map [1022:1201] +-18.2 Advanced Micro Devices [AMD] K10 [Opteron, Athlon64, Sempron] DRAM Controller [1022:1202] +-18.3 Advanced Micro Devices [AMD] K10 [Opteron, Athlon64, Sempron] Miscellaneous Control [1022:1203] \-18.4 Advanced Micro Devices [AMD] K10 [Opteron, Athlon64, Sempron] Link Control [1022:1204] flashrom v0.9.4-r1395 on Linux 3.0.6-gentoo (x86_64), built with libpci 3.1.7, GCC 4.5.3, little endian flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OS timer resolution is 1 usecs, 1601M loops per second, 10 myus = 10 us, 100 myus = 105 us, 1000 myus = 999 us, 10000 myus = 10010 us, 4 myus = 4 us, OK. Initializing internal programmer No coreboot table found. DMI string system-manufacturer: "To be filled by O.E.M." DMI string system-product-name: "To be filled by O.E.M." DMI string system-version: "To be filled by O.E.M." DMI string baseboard-manufacturer: "ASUSTeK COMPUTER INC." DMI string baseboard-product-name: "M5A99X EVO" DMI string baseboard-version: "Rev 1.xx" DMI string chassis-type: "Desktop" Found ITE Super I/O, ID 0x8721 on port 0x2e Found chipset "AMD SB700/SB710/SB750/SB850" with PCI ID 1002:439d. Enabling flash write... SPI base address is at 0xfec10000 AltSpiCSEnable=0, SpiRomEnable=1, AbortEnable=0 PrefetchEnSPIFromIMC=0, PrefetchEnSPIFromHost=1, SpiOpEnInLpcMode=1 SpiArbEnable=0, SpiAccessMacRomEn=1, SpiHostAccessRomEn=1, ArbWaitCount=4, SpiBridgeDisable=1, DropOneClkOnRd=0 NormSpeed is 16.5 MHz GPIO11 used for SPI_DO GPIO12 used for SPI_DI GPIO31 used for SPI_HOLD GPIO32 used for SPI_CS GPIO47 used for SPI_CLK SB700 IMC is not active. ROM strap override is not active OK. This chipset supports the following protocols: LPC, FWH, SPI. Super I/O ID 0x8721 is not on the list of flash capable controllers. Probing for AMIC A25L05PT, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L05PU, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L10PT, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L10PU, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L20PT, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L20PU, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L40PT, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L40PU, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L80P, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L16PT, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L16PU, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L080, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L016, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25L032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A25LQ032, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for AMIC A49LF040A, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Atmel AT25DF021, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF041A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF081, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF321, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF321A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DF641, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25DQ161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25F512B, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25FS010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT25FS040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF041, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF081A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF161, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26DF161A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT26F004, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45CS1282, 16896 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB011D, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB021D, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB041D, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB081D, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB161D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB321C, 4224 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB321D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel AT45DB642D, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for EMST F25L008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B05T, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B10T, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B20T, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B40T, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B80T, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B16T, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B32T, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25B64T, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F05, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25F32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q80(A), 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q32(A/B), 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon EN25QH16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Intel 82802AB, 512 kB: probe_82802ab: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Intel 82802AC, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Macronix MX25L512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1005, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L2005, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L4005, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L8005, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1605, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1635D, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L1635E, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L3205, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L3235D, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L6405, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix MX25L12805, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Numonyx M25PE16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV010, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV020, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV040, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm25LV512, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC Pm49FL002, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for PMC Pm49FL004, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Sanyo LF25FW203A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Sharp LHF00L04, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Spansion S25FL004A, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL008A, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL016A, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL032A, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Spansion S25FL064A, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF010.REMS, 128 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF016B, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF032B, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF064C, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25VF040.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF040B, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST25LF040A.RES, 512 kB: probe_spi_res2: id1 0x15, id2 0x15 Probing for SST SST25VF040B.REMS, 512 kB: probe_spi_rems: id1 0xef, id2 0x15 Probing for SST SST25VF080B, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST SST49LF002A/B, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF003A/B, 384 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004A/B, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF004C, 512 kB: probe_82802ab: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008A, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF008C, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF016C, 2048 kB: probe_82802ab: id1 0x49, id2 0xbb, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF020A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF040B, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF080A, 1024 kB: Chip lacks correct probe timing information, using default 10mS/40uS. probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for SST SST49LF160C, 2048 kB: probe_82802ab: id1 0x49, id2 0xbb, id1 is normal flash content, id2 is normal flash content Probing for ST M25P05-A, 64 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P05.RES, 64 kB: Ignoring RES in favour of RDID. Probing for ST M25P10-A, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P10.RES, 128 kB: Ignoring RES in favour of RDID. Probing for ST M25P20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P40-old, 512 kB: Ignoring RES in favour of RDID. Probing for ST M25P80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25P128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25PX16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25PX32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M25PX64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST M50FLW040A, 512 kB: probe_82802ab: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW040B, 512 kB: probe_82802ab: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080A, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FLW080B, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW002, 256 kB: probe_82802ab: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW016, 2048 kB: probe_82802ab: id1 0x49, id2 0xbb, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW040, 512 kB: probe_82802ab: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for ST M50FW080, 1024 kB: probe_82802ab: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for ST M50LPW116, 2048 kB: probe_82802ab: id1 0x49, id2 0xbb, id1 is normal flash content, id2 is normal flash content Probing for Winbond W25Q80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25Q16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25Q32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Chip status register is 00 Found Winbond flash chip "W25Q32" (4096 kB, SPI) at physical address 0xffc00000. Probing for Winbond W25Q64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25Q128, 16384 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X10, 128 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X20, 256 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X40, 512 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X80, 1024 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X16, 2048 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X32, 4096 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W25X64, 8192 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Winbond W39V040A, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040B, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040C, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FA, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FB, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V040FC, 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080A, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002A, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W49V002FA, 256 kB: probe_jedec_common: id1 0xff, id2 0xff, id1 parity violation, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA, 1024 kB: probe_jedec_common: id1 0xea, id2 0xd0, id1 is normal flash content, id2 is normal flash content Probing for Winbond W39V080FA (dual mode), 512 kB: probe_jedec_common: id1 0xbc, id2 0xfb, id1 is normal flash content, id2 is normal flash content Probing for AMIC unknown AMIC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Atmel unknown Atmel SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Eon unknown Eon SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Macronix unknown Macronix SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for PMC unknown PMC SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for SST unknown SST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for ST unknown ST SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Sanyo unknown Sanyo SPI chip, 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Generic unknown SPI chip (RDID), 0 kB: probe_spi_rdid_generic: id1 0xef, id2 0x4016 Probing for Generic unknown SPI chip (REMS), 0 kB: probe_spi_rems: id1 0xef, id2 0x15 No operations were specified. # dmidecode 2.10 SMBIOS 2.7 present. 55 structures occupying 2517 bytes. Table at 0x000EED90. Handle 0x0000, DMI type 0, 24 bytes BIOS Information Vendor: American Megatrends Inc. Version: 0813 Release Date: 10/24/2011 Address: 0xF0000 Runtime Size: 64 kB ROM Size: 4096 kB Characteristics: PCI is supported BIOS is upgradeable BIOS shadowing is allowed Boot from CD is supported Selectable boot is supported BIOS ROM is socketed EDD is supported 5.25"/1.2 MB floppy services are supported (int 13h) 3.5"/720 kB floppy services are supported (int 13h) 3.5"/2.88 MB floppy services are supported (int 13h) Print screen service is supported (int 5h) 8042 keyboard services are supported (int 9h) Serial services are supported (int 14h) Printer services are supported (int 17h) ACPI is supported USB legacy is supported BIOS boot specification is supported Targeted content distribution is supported BIOS Revision: 4.6 Handle 0x0001, DMI type 1, 27 bytes System Information Manufacturer: To be filled by O.E.M. Product Name: To be filled by O.E.M. Version: To be filled by O.E.M. Serial Number: To be filled by O.E.M. UUID: 1F002720-00C6-1700-CB24-14DAE94E0438 Wake-up Type: Power Switch SKU Number: To be filled by O.E.M. Family: To be filled by O.E.M. Handle 0x0002, DMI type 2, 15 bytes Base Board Information Manufacturer: ASUSTeK COMPUTER INC. Product Name: M5A99X EVO Version: Rev 1.xx Serial Number: 111212280000687 Asset Tag: To be filled by O.E.M. Features: Board is a hosting board Board is replaceable Location In Chassis: To be filled by O.E.M. Chassis Handle: 0x0003 Type: Motherboard Contained Object Handles: 0 Handle 0x0003, DMI type 3, 22 bytes Chassis Information Manufacturer: To Be Filled By O.E.M. Type: Desktop Lock: Not Present Version: To Be Filled By O.E.M. Serial Number: To Be Filled By O.E.M. Asset Tag: To Be Filled By O.E.M. Boot-up State: Safe Power Supply State: Safe Thermal State: Safe Security Status: None OEM Information: 0x00000000 Height: Unspecified Number Of Power Cords: 1 Contained Elements: 0 Handle 0x0004, DMI type 4, 42 bytes Processor Information Socket Designation: AM3r2 Type: Central Processor Family: <OUT OF SPEC> Manufacturer: AMD ID: 43 0F 10 00 FF FB 8B 17 Version: AMD Phenom(tm) II X4 955 Processor Voltage: 1.4 V External Clock: 200 MHz Max Speed: 3200 MHz Current Speed: 3200 MHz Status: Populated, Enabled Upgrade: <OUT OF SPEC> L1 Cache Handle: 0x0005 L2 Cache Handle: 0x0006 L3 Cache Handle: 0x0007 Serial Number: To Be Filled By O.E.M. Asset Tag: To Be Filled By O.E.M. Part Number: To Be Filled By O.E.M. Core Count: 4 Core Enabled: 4 Thread Count: 4 Characteristics: 64-bit capable Handle 0x0005, DMI type 7, 19 bytes Cache Information Socket Designation: L1-Cache Configuration: Enabled, Not Socketed, Level 1 Operational Mode: Write Back Location: Internal Installed Size: 512 kB Maximum Size: 512 kB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: 1 ns Error Correction Type: Multi-bit ECC System Type: Unified Associativity: 2-way Set-associative Handle 0x0006, DMI type 7, 19 bytes Cache Information Socket Designation: L2-Cache Configuration: Enabled, Not Socketed, Level 2 Operational Mode: Write Back Location: Internal Installed Size: 2048 kB Maximum Size: 2048 kB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: 1 ns Error Correction Type: Multi-bit ECC System Type: Unified Associativity: 16-way Set-associative Handle 0x0007, DMI type 7, 19 bytes Cache Information Socket Designation: L3-Cache Configuration: Enabled, Not Socketed, Level 3 Operational Mode: Write Back Location: Internal Installed Size: 6144 kB Maximum Size: 6144 kB Supported SRAM Types: Pipeline Burst Installed SRAM Type: Pipeline Burst Speed: 1 ns Error Correction Type: Multi-bit ECC System Type: Unified Associativity: Other Handle 0x0008, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J1A1 Internal Connector Type: None External Reference Designator: PS2Mouse External Connector Type: PS/2 Port Type: Mouse Port Handle 0x0009, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J1A1 Internal Connector Type: None External Reference Designator: Keyboard External Connector Type: PS/2 Port Type: Keyboard Port Handle 0x000A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2A1 Internal Connector Type: None External Reference Designator: TV Out External Connector Type: Mini Centronics Type-14 Port Type: Other Handle 0x000B, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2A2A Internal Connector Type: None External Reference Designator: COM A External Connector Type: DB-9 male Port Type: Serial Port 16550A Compatible Handle 0x000C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2A2B Internal Connector Type: None External Reference Designator: Video External Connector Type: DB-15 female Port Type: Video Port Handle 0x000D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J3A1 Internal Connector Type: None External Reference Designator: USB1 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000E, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J3A1 Internal Connector Type: None External Reference Designator: USB2 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x000F, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J3A1 Internal Connector Type: None External Reference Designator: USB3 External Connector Type: Access Bus (USB) Port Type: USB Handle 0x0010, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9A1 - TPM HDR Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0011, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9C1 - PCIE DOCKING CONN Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0012, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2B3 - CPU FAN Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0013, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6C2 - EXT HDMI Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0014, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J3C1 - GMCH FAN Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0015, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J1D1 - ITP Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0016, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9E2 - MDC INTPSR Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0017, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9E4 - MDC INTPSR Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0018, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9E3 - LPC HOT DOCKING Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0019, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9E1 - SCAN MATRIX Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001A, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J9G1 - LPC SIDE BAND Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001B, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J8F1 - UNIFIED Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001C, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J6F1 - LVDS Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001D, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2F1 - LAI FAN Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001E, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J2G1 - GFX VID Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x001F, DMI type 8, 9 bytes Port Connector Information Internal Reference Designator: J1G6 - AC JACK Internal Connector Type: Other External Reference Designator: Not Specified External Connector Type: None Port Type: Other Handle 0x0020, DMI type 9, 17 bytes System Slot Information Designation: J6B2 Type: x16 PCI Express Current Usage: In Use Length: Long ID: 0 Characteristics: 3.3 V is provided Opening is shared PME signal is supported Bus Address: 0000:00:01.0 Handle 0x0021, DMI type 9, 17 bytes System Slot Information Designation: J6B1 Type: x1 PCI Express Current Usage: In Use Length: Short ID: 1 Characteristics: 3.3 V is provided Opening is shared PME signal is supported Bus Address: 0000:00:1c.3 Handle 0x0022, DMI type 9, 17 bytes System Slot Information Designation: J6D1 Type: x1 PCI Express Current Usage: In Use Length: Short ID: 2 Characteristics: 3.3 V is provided Opening is shared PME signal is supported Bus Address: 0000:00:1c.4 Handle 0x0023, DMI type 10, 6 bytes On Board Device Information Type: Video Status: Enabled Description: To Be Filled By O.E.M. Handle 0x0024, DMI type 11, 5 bytes OEM Strings String 1: To Be Filled By O.E.M. String 2: To Be Filled By O.E.M. String 3: To Be Filled By O.E.M. String 4: To Be Filled By O.E.M. Handle 0x0025, DMI type 12, 5 bytes System Configuration Options Option 1: To Be Filled By O.E.M. Handle 0x0026, DMI type 16, 23 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: Multi-bit ECC Maximum Capacity: 32 GB Error Information Handle: Not Provided Number Of Devices: 4 Handle 0x0027, DMI type 19, 31 bytes Memory Array Mapped Address Starting Address: 0x00000000000 Ending Address: 0x001400003FF Range Size: 5242881 kB Physical Array Handle: 0x0026 Partition Width: 0 Handle 0x0028, DMI type 17, 34 bytes Memory Device Array Handle: 0x0026 Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 4096 MB Form Factor: DIMM Set: None Locator: DIMM0 Bank Locator: BANK0 Type: <OUT OF SPEC> Type Detail: Synchronous Speed: 1333 MHz Manufacturer: Manufacturer0 Serial Number: SerNum0 Asset Tag: AssetTagNum0 Part Number: Array1_PartNumber0 Rank: Unknown Handle 0x0029, DMI type 20, 35 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000000003FF Range Size: 1 kB Physical Device Handle: 0x0028 Memory Array Mapped Address Handle: 0x0027 Partition Row Position: <OUT OF SPEC> Interleave Position: Unknown Interleaved Data Depth: Unknown Handle 0x002A, DMI type 17, 34 bytes Memory Device Array Handle: 0x0026 Error Information Handle: Not Provided Total Width: Unknown Data Width: 64 bits Size: No Module Installed Form Factor: DIMM Set: None Locator: DIMM1 Bank Locator: BANK1 Type: Unknown Type Detail: Synchronous Speed: Unknown Manufacturer: Manufacturer1 Serial Number: SerNum1 Asset Tag: AssetTagNum1 Part Number: Array1_PartNumber1 Rank: Unknown Handle 0x002B, DMI type 126, 35 bytes Inactive Handle 0x002C, DMI type 17, 34 bytes Memory Device Array Handle: 0x0026 Error Information Handle: Not Provided Total Width: 64 bits Data Width: 64 bits Size: 4096 MB Form Factor: DIMM Set: None Locator: DIMM2 Bank Locator: BANK2 Type: <OUT OF SPEC> Type Detail: Synchronous Speed: 1333 MHz Manufacturer: Manufacturer2 Serial Number: SerNum2 Asset Tag: AssetTagNum2 Part Number: Array1_PartNumber2 Rank: Unknown Handle 0x002D, DMI type 20, 35 bytes Memory Device Mapped Address Starting Address: 0x00000000000 Ending Address: 0x000FFFFFFFF Range Size: 4 GB Physical Device Handle: 0x002C Memory Array Mapped Address Handle: 0x0027 Partition Row Position: <OUT OF SPEC> Interleave Position: Unknown Interleaved Data Depth: Unknown Handle 0x002E, DMI type 17, 34 bytes Memory Device Array Handle: 0x0026 Error Information Handle: Not Provided Total Width: Unknown Data Width: 64 bits Size: No Module Installed Form Factor: DIMM Set: None Locator: DIMM3 Bank Locator: BANK3 Type: Unknown Type Detail: Synchronous Speed: Unknown Manufacturer: Manufacturer3 Serial Number: SerNum3 Asset Tag: AssetTagNum3 Part Number: Array1_PartNumber3 Rank: Unknown Handle 0x002F, DMI type 126, 35 bytes Inactive Handle 0x0030, DMI type 32, 20 bytes System Boot Information Status: No errors detected Handle 0x0031, DMI type 41, 11 bytes Onboard Device Reference Designation: Onboard IGD Type: Video Status: Enabled Type Instance: 1 Bus Address: 0000:00:02.0 Handle 0x0032, DMI type 41, 11 bytes Onboard Device Reference Designation: Onboard LAN Type: Ethernet Status: Enabled Type Instance: 1 Bus Address: 0000:00:19.0 Handle 0x0033, DMI type 41, 11 bytes Onboard Device Reference Designation: Onboard 1394 Type: Other Status: Enabled Type Instance: 1 Bus Address: 0000:03:1c.2 Handle 0x0034, DMI type 139, 54 bytes OEM-specific Type Header and Data: 8B 36 34 00 00 1F C6 00 00 17 CB 24 04 04 32 55 F8 00 A2 02 A1 00 40 63 43 10 FE 81 03 DF 40 B2 00 20 00 73 3C 10 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 Strings: V1394GUID Handle 0x0035, DMI type 13, 22 bytes BIOS Language Information Installable Languages: 8 en|US|iso8859-1 fr|FR|iso8859-1 es|ES|iso8859-1 de|DE|iso8859-1 ru|RU|iso8859-5 zh|TW|unicode zh|CN|unicode ja|JP|unicode Currently Installed Language: en|US|iso8859-1 Handle 0x0037, DMI type 127, 4 bytes End Of Table -- "They say great science is built on the shoulders of giants - not here. At Aperture we do all our science from scratch; no hand holding." - Cave Johnson, CEO Aperture Science. Follow me on twitter: @zeonglow

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Re: [coreboot] Current status of WYSE S50 support
by Oliver Schinagl 19 Nov '11

19 Nov '11

Having put off to reply, this may be a reason to do so once more :) I have 5 or 6 Wyse S10 (which are very very similar to the S50's) thinclients with 1gb 'disk-on-chip' IDE disks and 256MB Ram (over the stock 128mb ram and no d-o-c, e.g. using bios only) of which I'm willing to donate 1 or even 2 if demand is high enough. I'll cover shipping within europe (and other places we can talk) and throw in the 100-240V adapter with EU power plug. I'm not skilled enough to do the porting myself, unless i'd have loads of help (i know C but no clue where to state and little time). Let me know if your interested, or if there's some other procedure i'd have to adhere to when donating 'stuff'. oliver On 18-11-11 21:00, Marc Jones wrote: > On Wed, Nov 16, 2011 at 9:06 AM, JM<fijam(a)archlinux.us> wrote: >> Hello, >> >> I am interested in replacing the BIOS on WYSE S50 with coreboot. I >> have browsed the mailing list archives, however, some of the reports >> are a bit unclear. I'd appreciate if someone could shed some light on >> the following concerns of mine: >> >> 1. Does the board work after RAMBASE rework (i.e. is ticket #163 really fixed)? >> >> 2. Is the current support of this board sufficient to boot Linux? More >> specifically, I have come across some reports of broken vsa and acpi, >> is this still an issue? If so, how does the lack of those features >> affect normal Linux operation? >> >> 3. When booting Linux from USB using default manufacturer's BIOS the >> ATA port is being disabled. Is this a software or hardware limitation? >> In other words, if I boot from USB with coreboot/SeaBIOS would I have >> ATA enabled? >> >> 4. When I boot the Linux kernel with the default BIOS it occasionally >> hangs on initializing the PCI subsystem. Is this a result of a bug in >> vsa code (virtualized pci) or BIOS? Does the problem persist with >> coreboot/SeaBIOS and AMD's vsa? I noticed something called OpenVSA, >> does it support Geode GX? >> >> 5. Can I help in any way with the development not being a programmer? >> >> Thanks, >> JM > Hi JM, > > It has been some time since anyone has worked on Geode. You may have > to try it to find out. Before you do, make sure you have a way to > recover the BIOS image. > > It is dated and the build process has changed, but you should read the > geode porting page. It talks about VSA and graphics and stuff. The VSA > was openned and used on the OLPC project. It requires the Microsoft > tools to build and no one has ported it to gcc yet. There is a link to > the binary on the geode page. You should stop by the IRC #coreboot if > you need a hand building coreboot. > > http://www.coreboot.org/AMD_Geode_Porting_Guide > > Marc > > -- > http://se-eng.com >

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ASRock ConRoeXFire-eSATA2 board support
by PaulK 19 Nov '11

19 Nov '11

Hi! I'm new to this list so I'll start by introducing myself a bit: I'm a french student involved in free software: I use GNU/Linux distros on all my PCs, mostly with the fully free Trisquel distro and I'm also a developer (I know C quite well) mostly involved in the Replicant project (fully free Android derivate) as a hacker (lower-level stuff). The lead dev on the project (GNUtoo) decided to look at how doable it is to port his board to coreboot, so I decided to follow his lead and look at which of the motherboards I own would be the best one for coreboot. I have 2 boards that might be good candidates, ASRock ConRoeXFire-eSATA2 (which has a socketed PLCC32 chip) and Asus P5LP-LE (Lithium) with a soldered PLCC32 chip. Both boards should have supported North/Southbridge and SuperIO already supported in coreboot. I decided to start the work on the ASRock ConRoeXFire-eSATA2 one and thanks to the help I got on IRC, it has been possible to add support for the board on flashrom in a few hours. I also found another compatible flash (same size, even same model apparently) so I can use it to flash coreboot images. So here are the technical details now: * northbridge is Intel Corporation 82945G/GZ/P/PL * southbridge is Intel Corporation N10/ICH 7 Family * superio is Winbond W83627EHG (see lspci out for more details) So the board coming closer to mine is Kontron 986LCD-M/mITX. I forked the device files for this one and I did this: * replaced W83627THG references to W83627EHG * used superio init function from another board (ASUS A8V-E SE) * modified this function to have clcksel to 48MHz (as told on IRC) * called w83627ehg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); between superio init and console init So far I got serial working, but the northbridge I use isn't the exact model on the board and the model on the board isn't supported by coreboot. Though: some stuff seems to work with the other northbridge code and I found wide documentation about the intel 945G/GZ/P/PL chip used. So I'm wondering what the next steps are… Adding support for the correct northbridge? -- Paul Kocialkowski * Website : http://www.paulk.fr/ * Blog : http://blog.paulk.fr/ * Microblogging : http://status.paulk.fr/

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Re: [coreboot] Current status of WYSE S50 support
by JM 18 Nov '11

18 Nov '11

> It has been some time since anyone has worked on Geode. You may have > to try it to find out. Before you do, make sure you have a way to > recover the BIOS image. Thanks for your reply. The chip in question (SST49LF020A in PLCC) only supports LPC and parallel programming. Do you think it would be feasible to purchase another device (they come at about 10 euros) and hot-swap the ROM for reflashing if something went wrong? Alternatively, any hints for 'pulling out' the LPC interface from another device? Sorry if my questions are a bit elementary. > It is dated and the build process has changed, but you should read the > geode porting page. It talks about VSA and graphics and stuff. The VSA > was openned and used on the OLPC project. It requires the Microsoft > tools to build and no one has ported it to gcc yet. There is a link to > the binary on the geode page. You should stop by the IRC #coreboot if > you need a hand building coreboot. > > http://www.coreboot.org/AMD_Geode_Porting_Guide I'll be sure to take a look at that. Regards, Jan

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Patch merged into coreboot/master: ac9431d mainboard: Add AMD unionstation RDK support
by gerrit＠coreboot.org 18 Nov '11

18 Nov '11

the following patch was just integrated into master: commit ac9431d26ba477811c2e27c8ee1a70109ca671fb Author: Kerry Sheh <shekairui(a)gmail.com> Date: Tue Nov 15 21:27:57 2011 +0800 mainboard: Add AMD unionstation RDK support AMD unionstation Reference Design Kit is Designed for hd settop box application. This platform using family14 APU, SB800 southbridge. Vgabios is required, can download vgabios from AMD NDA website. Verified Feature: HDMI, LAN, mini-pcie slots, sata, usb, analog audio and optical fiber digital audio output. Change-Id: Ib1d1d8c889d6fb29f4298b57dfe5c5c1cea1431c Signed-off-by: Kerry She <kerry.she(a)amd.com> Signed-off-by: Kerry She <shekairui(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Nov 15 14:43:53 2011, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Fri Nov 18 21:43:19 2011, giving +2 See http://review.coreboot.org/434 for details. -gerrit

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Patch merged into coreboot/master: 8558795 mainboard: Add AMD southstation RDK support
by gerrit＠coreboot.org 18 Nov '11

18 Nov '11

the following patch was just integrated into master: commit 8558795ef1369052cf634e2d6c5f33a2a11ad718 Author: Kerry Sheh <shekairui(a)gmail.com> Date: Tue Nov 15 21:27:07 2011 +0800 mainboard: Add AMD southstation RDK support AMD southstation Reference Design Kit is designed for NAS application. This platform using family14 RevC0 processor, SB850 southbridge. Vgabios and Promise RAID Option ROM is required for hardware RAID support, can retrieve from the AMD NDA website. Verified feature: HDMI, LAN, usb and mini-pcie slot. RAID0, RAID1 RAID10 and RAID5 upto 6 sata hard drive with ubuntu server 10.10. Change-Id: I16e6f5dab8b0d634e186068c81436db77fb4475a Signed-off-by: Kerry She <kerry.she(a)amd.com> Signed-off-by: Kerry She <shekairui(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Nov 15 14:33:48 2011, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Fri Nov 18 21:38:58 2011, giving +2 See http://review.coreboot.org/433 for details. -gerrit

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Re: [coreboot] Current status of WYSE S50 support
by Marc Jones 18 Nov '11

18 Nov '11

On Wed, Nov 16, 2011 at 9:06 AM, JM <fijam(a)archlinux.us> wrote: > Hello, > > I am interested in replacing the BIOS on WYSE S50 with coreboot. I > have browsed the mailing list archives, however, some of the reports > are a bit unclear. I'd appreciate if someone could shed some light on > the following concerns of mine: > > 1. Does the board work after RAMBASE rework (i.e. is ticket #163 really fixed)? > > 2. Is the current support of this board sufficient to boot Linux? More > specifically, I have come across some reports of broken vsa and acpi, > is this still an issue? If so, how does the lack of those features > affect normal Linux operation? > > 3. When booting Linux from USB using default manufacturer's BIOS the > ATA port is being disabled. Is this a software or hardware limitation? > In other words, if I boot from USB with coreboot/SeaBIOS would I have > ATA enabled? > > 4. When I boot the Linux kernel with the default BIOS it occasionally > hangs on initializing the PCI subsystem. Is this a result of a bug in > vsa code (virtualized pci) or BIOS? Does the problem persist with > coreboot/SeaBIOS and AMD's vsa? I noticed something called OpenVSA, > does it support Geode GX? > > 5. Can I help in any way with the development not being a programmer? > > Thanks, > JM Hi JM, It has been some time since anyone has worked on Geode. You may have to try it to find out. Before you do, make sure you have a way to recover the BIOS image. It is dated and the build process has changed, but you should read the geode porting page. It talks about VSA and graphics and stuff. The VSA was openned and used on the OLPC project. It requires the Microsoft tools to build and no one has ported it to gcc yet. There is a link to the binary on the geode page. You should stop by the IRC #coreboot if you need a hand building coreboot. http://www.coreboot.org/AMD_Geode_Porting_Guide Marc -- http://se-eng.com

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Patch set updated for coreboot: c62ee4b Replace ramtest pattern to assist in DIMM configuration
by Kyösti Mälkki 18 Nov '11

18 Nov '11

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/294 -gerrit commit c62ee4b1f3f61d9913caa6cc54edc30fa85c99b8 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Nov 18 12:38:37 2011 +0200 Replace ramtest pattern to assist in DIMM configuration This is developer's testtool. Output from a "rotate ones" -style pattern helps figure out how DIMM addresses are encoded or routed on a certain mainboard. Scattered test should cover every data and address lines on the memory bus, but is probably limited to the first bank of first DIMM. Change-Id: I533a7a873bcc434f99e7faed9dc9337d9ab64196 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/lib/ramtest.c | 187 ++++++++++++++++++++++++++--------------------------- 1 files changed, 91 insertions(+), 96 deletions(-) diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index b35c36d..e09d0d1 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -47,117 +47,118 @@ static void phys_memory_barrier(void) #endif } -static void ram_fill(unsigned long start, unsigned long stop) +/** + * Rotate ones test pattern that access every bit on a 128bit wide + * memory bus. To test most address lines, addresses are scattered + * using 256B, 4kB and 64kB increments. + * + * @idx Index to test pattern (0=<idx<0x400) + * @addr Memory to access on @idx + * @value Value to write or read at @addr + */ +static inline void test_pattern(unsigned short int idx, + unsigned long *addr, unsigned long *value) { - unsigned long addr; - /* - * Fill. - */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM fill: 0x%08lx-0x%08lx\n", start, stop); -#else - print_debug("DRAM fill: "); - print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); - print_debug("\n"); -#endif - for(addr = start; addr < stop ; addr += 4) { - /* Display address being filled */ - if (!(addr & 0xfffff)) { -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); -#else - print_debug_hex32(addr); - print_debug(" \r"); -#endif - } - write_phys(addr, (u32)addr); - }; - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx\nDRAM filled\n", addr); -#else - print_debug_hex32(addr); - print_debug("\nDRAM filled\n"); -#endif + uint8_t j, k; + + k = (idx >> 8) + 1; + j = (idx >> 4) & 0x0f; + *addr = idx & 0x0f; + *addr |= j << (4*k); + *value = 0x01010101 << (j & 7); + if (j & 8) + *value = ~(*value); } -static void ram_verify(unsigned long start, unsigned long stop) +/** + * Simple write-read-verify memory test. See console debug output for + * any dislocated bytes. + * + * @start System memory offset, aligned to 128bytes + */ +static void ram_bitset(unsigned long start) { - unsigned long addr; - int i = 0; - /* - * Verify. - */ + unsigned long addr, value, value2; + unsigned short int idx; + unsigned char failed, failures; + uint8_t verbose = 0; + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "DRAM verify: 0x%08lx-0x%08lx\n", start, stop); + printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start); #else - print_debug("DRAM verify: "); + print_debug("DRAM bitset write: 0x"); print_debug_hex32(start); - print_debug_char('-'); - print_debug_hex32(stop); print_debug("\n"); #endif - for(addr = start; addr < stop ; addr += 4) { - unsigned long value; - /* Display address being tested */ - if (!(addr & 0xfffff)) { + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + write_phys(start + addr, value); + } + + /* Make sure we don't read before we wrote */ + phys_memory_barrier(); + #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx \r", addr); + printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start); #else - print_debug_hex32(addr); - print_debug(" \r"); + print_debug("DRAM bitset verify: 0x"); + print_debug_hex32(start); + print_debug("\n"); #endif - } - value = read_phys(addr); - if (value != addr) { - /* Display address with error */ + failures = 0; + for (idx=0; idx<0x400; idx+=4) { + test_pattern(idx, &addr, &value); + value2 = read_phys(start + addr); + + failed = (value2 != value); + failures |= failed; + if (failed && !verbose) { #if !defined(__ROMCC__) - printk(BIOS_ERR, "Fail: @0x%08lx Read value=0x%08lx\n", addr, value); + printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n", + start + addr, value, value2); #else - print_err("Fail: @0x"); - print_err_hex32(addr); - print_err(" Read value=0x"); + print_err_hex32(start + addr); + print_err(" wr: 0x"); print_err_hex32(value); - print_err("\n"); -#endif - i++; - if(i>256) { -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Aborting.\n"); -#else - print_debug("Aborting.\n"); + print_err(" rd: 0x"); + print_err_hex32(value2); + print_err(" FAIL\n"); #endif - break; - } } - } - /* Display final address */ -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "%08lx", addr); -#else - print_debug_hex32(addr); -#endif - - if (i) { + if (verbose) { #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); + if ((addr & 0x0f) == 0) + printk(BIOS_DEBUG, "%08lx wr: %08lx rd:", + start + addr, value); + if (failed) + printk(BIOS_DEBUG, " %08lx!", value2); + else + printk(BIOS_DEBUG, " %08lx ", value2); + if ((addr & 0x0f) == 0xc) + printk(BIOS_DEBUG, "\n"); #else - print_debug("\nDRAM did _NOT_ verify!\n"); + if ((addr & 0x0f) == 0) { + print_dbg_hex32(start + addr); + print_dbg(" wr: "); + print_dbg_hex32(value); + print_dbg(" rd: "); + } + print_dbg_hex32(value2); + if (failed) + print_dbg("! "); + else + print_dbg(" "); + if ((addr & 0x0f) == 0xc) + print_dbg("\n"); #endif - die("DRAM ERROR"); + } } - else { -#if !defined(__ROMCC__) - printk(BIOS_DEBUG, "\nDRAM range verified.\n"); -#else - print_debug("\nDRAM range verified.\n"); -#endif + if (failures) { + post_code(0xea); + die("RAM INIT FAILURE!\n"); } } - void ram_check(unsigned long start, unsigned long stop) { /* @@ -166,18 +167,13 @@ void ram_check(unsigned long start, unsigned long stop) * are tested. -Tyson */ #if !defined(__ROMCC__) - printk(BIOS_DEBUG, "Testing DRAM : %08lx - %08lx\n", start, stop); + printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start); #else - print_debug("Testing DRAM : "); + print_debug("Testing DRAM at: "); print_debug_hex32(start); - print_debug("-"); - print_debug_hex32(stop); print_debug("\n"); #endif - ram_fill(start, stop); - /* Make sure we don't read before we wrote */ - phys_memory_barrier(); - ram_verify(start, stop); + ram_bitset(start); #if !defined(__ROMCC__) printk(BIOS_DEBUG, "Done.\n"); #else @@ -214,4 +210,3 @@ void quick_ram_check(void) } phys_memory_barrier(); } -

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coreboot November 2011