Hi Patrick,
Thanks for the hint.
But it does`t seem to help if i add this to /amd/rumba/Kconfig :
config RAMBASE
hex
default 0x4000
depends on BOARD_AMD_RUMBA
Do you have more hints or was it not wat you meant?
Thanks,Nils.
1
0
The attached patch fixes vsmsetup for the AMD GX2 .
It was broken at least since rev 4611.
This patch is newconfig build and boot tested, it now gives a :
VSA2 VR signature verified message.
Signed-off-by: Nils Jacobs <njacobs8(a)hetnet.nl>
There is at least one "little" problem with this patch:
it breaks KBUILD!
After days of searching i could not find the culprit.
Maybe someone else can fix that, or at least give me a hint?
I also attached the build log.
Thanks,Nils.
2
1
[1/116] a-trend/atc-6220 ok.
Processing mainboard/a-trend/atc-6220 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[2/116] a-trend/atc-6240 ok.
Processing mainboard/a-trend/atc-6240 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[3/116] abit/be6-ii_v2_0 ok.
Processing mainboard/abit/be6-ii_v2_0 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[4/116] advantech/pcm-5820 ok.
Processing mainboard/advantech/pcm-5820 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[5/116] amd/db800 ok.
Processing mainboard/amd/db800 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x4
+CONFIG_IRQ_SLOT_COUNT = 0x6
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[6/116] amd/dbm690t ok.
Processing mainboard/amd/dbm690t (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/amd/dbm690t/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_GFXUMA = 0x1
+CONFIG_GFXUMA = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_ROM_SIZE = 0x100000
+CONFIG_ROM_SIZE = 0x80000
[7/116] amd/norwich ok.
Processing mainboard/amd/norwich (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[8/116] amd/pistachio ok.
Processing mainboard/amd/pistachio (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/amd/pistachio/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x8
-CONFIG_GFXUMA = 0x1
+CONFIG_GFXUMA = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MAINBOARD_RESOURCES = 0x1
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
-CONFIG_HAVE_OPTION_TABLE = 0x0
+CONFIG_HAVE_OPTION_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x0
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_ROM_SIZE = 0x100000
+CONFIG_ROM_SIZE = 0x80000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x1
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
[9/116] amd/rumba ok.
Processing mainboard/amd/rumba (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[10/116] amd/serengeti_cheetah ok.
Processing mainboard/amd/serengeti_cheetah (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/amd/serengeti_cheetah/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_ACPI_SSDTX_NUM = 0x1
+CONFIG_ACPI_SSDTX_NUM = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[11/116] amd/serengeti_cheetah_fam10 ok.
Processing mainboard/amd/serengeti_cheetah_fam10 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/amd/serengeti_cheetah_fam10/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[12/116] arima/hdama ok.
Processing mainboard/arima/hdama (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/arima/hdama/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[13/116] artecgroup/dbe61 ok.
Processing mainboard/artecgroup/dbe61 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[14/116] asi/mb_5blgp ok.
Processing mainboard/asi/mb_5blgp (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[15/116] asi/mb_5blmp ok.
Processing mainboard/asi/mb_5blmp (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_GENERATE_MP_TABLE = 0x0
+CONFIG_GX1_VIDEO = 0x1
+CONFIG_GX1_VIDEOMODE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
+CONFIG_SPLASH_GRAPHIC = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[16/116] asus/a8n_e ok.
Processing mainboard/asus/a8n_e (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/asus/a8n_e/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xc8000
+CONFIG_DCACHE_RAM_BASE = 0xcf000
-CONFIG_DCACHE_RAM_SIZE = 0x8000
+CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[17/116] asus/a8v-e_se ok.
Processing mainboard/asus/a8v-e_se (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_EPIA_VT8237R_INIT = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_IRQ_SLOT_COUNT = 0xd
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[18/116] asus/m2v-mx_se ok.
Processing mainboard/asus/m2v-mx_se (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/asus/m2v-mx_se/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_EPIA_VT8237R_INIT = 0x0
-CONFIG_HAVE_ACPI_RESUME = 0x1
+CONFIG_HAVE_ACPI_RESUME = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_LOW_TABLES = 0x0
+CONFIG_HAVE_LOW_TABLES = 0x1
-CONFIG_HW_MEM_HOLE_SIZEK = 0x0
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x1f00000
+CONFIG_RAMBASE = 0x100000
-CONFIG_RAMTOP = 0x2000000
+CONFIG_RAMTOP = 0x200000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[19/116] asus/mew-am ok.
Processing mainboard/asus/mew-am (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I810_VIDEO_MB_1MB = 0x1
+CONFIG_I810_VIDEO_MB_512KB = 0x0
+CONFIG_I810_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[20/116] asus/mew-vm ok.
Processing mainboard/asus/mew-vm (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_OPTION_TABLE = 0x0
+CONFIG_HAVE_OPTION_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I810_VIDEO_MB_1MB = 0x1
+CONFIG_I810_VIDEO_MB_512KB = 0x0
+CONFIG_I810_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[21/116] asus/p2b-d ok.
Processing mainboard/asus/p2b-d (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[22/116] asus/p2b-ds ok.
Processing mainboard/asus/p2b-ds (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_AGP_APERTURE_SIZE = 0x4000000
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_ADDR_BITS = 0x24
+CONFIG_CPU_ADDR_BITS = 0x28
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xc0000
+CONFIG_DCACHE_RAM_BASE = 0xcf000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
-CONFIG_HAVE_OPTION_TABLE = 0x0
+CONFIG_HAVE_OPTION_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0x0
-CONFIG_HW_MEM_HOLE_SIZEK = 0x0
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_ID_SECTION_OFFSET = 0x10
+CONFIG_ID_SECTION_OFFSET = 0x80
-CONFIG_IRQ_SLOT_COUNT = 0x7
+CONFIG_IRQ_SLOT_COUNT = 0xd
-CONFIG_LB_CKS_LOC = 0x7e
+CONFIG_LB_CKS_LOC = 0x7b
-CONFIG_LB_CKS_RANGE_END = 0x7d
+CONFIG_LB_CKS_RANGE_END = 0x7a
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x815a
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1043
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_MEM_TRAIN_SEQ = 0x0
+CONFIG_MEM_TRAIN_SEQ = 0x2
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_ROM_SIZE = 0x40000
+CONFIG_ROM_SIZE = 0x80000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_USE_DCACHE_RAM = 0x0
+CONFIG_USE_DCACHE_RAM = 0x1
-CONFIG_USE_PRINTK_IN_CAR = 0x0
+CONFIG_USE_PRINTK_IN_CAR = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[23/116] asus/p2b-f ok.
Processing mainboard/asus/p2b-f (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[24/116] asus/p2b ok.
Processing mainboard/asus/p2b (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[25/116] asus/p3b-f ok.
Processing mainboard/asus/p3b-f (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[26/116] axus/tc320 ok.
Processing mainboard/axus/tc320 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x6
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x6
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[27/116] azza/pt-6ibd ok.
Processing mainboard/azza/pt-6ibd (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[28/116] bcom/winnet100 ok.
Processing mainboard/bcom/winnet100 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x6
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x6
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[29/116] bcom/winnetp680 ok.
Processing mainboard/bcom/winnetp680 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/bcom/winnetp680/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CN700_VIDEO_MB_128MB = 0x0
+CONFIG_CN700_VIDEO_MB_16MB = 0x0
+CONFIG_CN700_VIDEO_MB_32MB = 0x1
+CONFIG_CN700_VIDEO_MB_64MB = 0x0
+CONFIG_CN700_VIDEO_MB_8MB = 0x0
+CONFIG_CN700_VIDEO_MB_OFF = 0x0
+CONFIG_CPU_VIA_C7 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_EPIA_VT8237R_INIT = 0x0
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
[30/116] biostar/m6tba ok.
Processing mainboard/biostar/m6tba (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[31/116] broadcom/blast ok.
Processing mainboard/broadcom/blast (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HT_CHAIN_UNITID_BASE = 0x6
+CONFIG_HT_CHAIN_UNITID_BASE = 0x0
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x1
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[32/116] compaq/deskpro_en_sff_p600 ok.
Processing mainboard/compaq/deskpro_en_sff_p600 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[33/116] dell/s1850 ok.
Processing mainboard/dell/s1850 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x2
-CONFIG_MAX_PHYSICAL_CPUS = 0x1
+CONFIG_MAX_PHYSICAL_CPUS = 0x2
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TTYS0_BAUD = 0x4b00
+CONFIG_TTYS0_BAUD = 0x1c200
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[34/116] digitallogic/adl855pc ok.
Processing mainboard/digitallogic/adl855pc (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SMP = 0x0
+CONFIG_SMP = 0x1
-CONFIG_UDELAY_IO = 0x1
+CONFIG_UDELAY_IO = 0x0
-CONFIG_UDELAY_TSC = 0x0
+CONFIG_UDELAY_TSC = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[35/116] digitallogic/msm586seg ok.
Processing mainboard/digitallogic/msm586seg (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/digitallogic/msm586seg/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_AMD_SC520 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_ROM_SIZE = 0x80000
+CONFIG_ROM_SIZE = 0x40000
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_UDELAY_LAPIC = 0x0
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[36/116] digitallogic/msm800sev ok.
Processing mainboard/digitallogic/msm800sev (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x9
+CONFIG_IRQ_SLOT_COUNT = 0x7
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[37/116] eaglelion/5bcm ok.
Processing mainboard/eaglelion/5bcm (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_GX1_VIDEO = 0x1
+CONFIG_GX1_VIDEOMODE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
+CONFIG_SPLASH_GRAPHIC = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[38/116] emulation/qemu-x86 ok.
Processing mainboard/emulation/qemu-x86 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/emulation/qemu-x86/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_EMULATION_QEMU_X86 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0x8f000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_UDELAY_LAPIC = 0x0
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[39/116] gigabyte/ga-6bxc ok.
Processing mainboard/gigabyte/ga-6bxc (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x6
+CONFIG_IRQ_SLOT_COUNT = 0x5
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[40/116] gigabyte/ga_2761gxdk ok.
Processing mainboard/gigabyte/ga_2761gxdk (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/gigabyte/ga_2761gxdk/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_APIC_ID_OFFSET = 0x16
-CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_MEM_TRAIN_SEQ = 0x2
+CONFIG_MEM_TRAIN_SEQ = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_SMP = 0x0
+CONFIG_SMP = 0x1
-CONFIG_USE_FALLBACK_IMAGE = 0x1
+CONFIG_USE_FALLBACK_IMAGE = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[41/116] gigabyte/m57sli ok.
Processing mainboard/gigabyte/m57sli (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/gigabyte/m57sli/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_APIC_ID_OFFSET = 0x16
+CONFIG_HAVE_ACPI_TABLES = 0x1
-CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_MEM_TRAIN_SEQ = 0x2
+CONFIG_MEM_TRAIN_SEQ = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL = 0x1
-CONFIG_USE_FALLBACK_IMAGE = 0x1
+CONFIG_USE_FALLBACK_IMAGE = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[42/116] hp/dl145_g3 ok.
Processing mainboard/hp/dl145_g3 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x8
+CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HT_CHAIN_UNITID_BASE = 0x6
+CONFIG_HT_CHAIN_UNITID_BASE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_SERIAL_CPU_INIT = 0x0
+CONFIG_SERIAL_CPU_INIT = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[43/116] hp/e_vectra_p2706t ok.
Processing mainboard/hp/e_vectra_p2706t (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I810_VIDEO_MB_1MB = 0x1
+CONFIG_I810_VIDEO_MB_512KB = 0x0
+CONFIG_I810_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
[44/116] ibm/e325 ok.
Processing mainboard/ibm/e325 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x8
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_HW_MEM_HOLE_SIZEK = 0x0
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_SMP = 0x1
+CONFIG_SMP = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
[45/116] ibm/e326 ok.
Processing mainboard/ibm/e326 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/ibm/e326/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x8
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_HW_MEM_HOLE_SIZEK = 0x0
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
[46/116] iei/juki-511p ok.
Processing mainboard/iei/juki-511p (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/iei/juki-511p/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_GX1_VIDEO = 0x1
+CONFIG_GX1_VIDEOMODE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x0
-CONFIG_HAVE_INIT_TIMER = 0x0
+CONFIG_HAVE_INIT_TIMER = 0x1
-CONFIG_HAVE_OPTION_TABLE = 0x0
+CONFIG_HAVE_OPTION_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
+CONFIG_SPLASH_GRAPHIC = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_UDELAY_IO = 0x1
+CONFIG_UDELAY_IO = 0x0
-CONFIG_UDELAY_TSC = 0x0
+CONFIG_UDELAY_TSC = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[47/116] iei/nova4899r ok.
Processing mainboard/iei/nova4899r (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_GX1_VIDEO = 0x1
+CONFIG_GX1_VIDEOMODE = 0x0
-CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
+CONFIG_SPLASH_GRAPHIC = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[48/116] iei/pcisa-lx-800-r10 ok.
Processing mainboard/iei/pcisa-lx-800-r10 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x0
+CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_UDELAY_IO = 0x1
+CONFIG_UDELAY_IO = 0x0
-CONFIG_UDELAY_TSC = 0x0
+CONFIG_UDELAY_TSC = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[49/116] intel/d945gclf ok.
Processing mainboard/intel/d945gclf (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/intel/d945gclf/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_INTEL_CORE = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xffed8000
+CONFIG_DCACHE_RAM_BASE = 0xffdf8000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x5
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
-CONFIG_GENERATE_ACPI_TABLES = 0x1
+CONFIG_GENERATE_ACPI_TABLES = 0x0
-CONFIG_GFXUMA = 0x1
+CONFIG_GFXUMA = 0x0
-CONFIG_HAVE_ACPI_RESUME = 0x1
+CONFIG_HAVE_ACPI_RESUME = 0x0
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
-CONFIG_HAVE_MAINBOARD_RESOURCES = 0x1
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HAVE_SMI_HANDLER = 0x1
+CONFIG_HAVE_SMI_HANDLER = 0x0
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x1
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_ROM_SIZE = 0x80000
+CONFIG_ROM_SIZE = 0x100000
-CONFIG_USE_DCACHE_RAM = 0x1
+CONFIG_USE_DCACHE_RAM = 0x0
[50/116] intel/eagleheights ok.
Processing mainboard/intel/eagleheights (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_CORE2 = 0x1
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_ACPI_TABLES = 0x1
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MAINBOARD_RESOURCES = 0x1
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x9
+CONFIG_IRQ_SLOT_COUNT = 0x12
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x8086
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_USE_DCACHE_RAM = 0x1
+CONFIG_USE_DCACHE_RAM = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[51/116] intel/jarrell ok.
Processing mainboard/intel/jarrell (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_ATI_RAGE_XL = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x12
+CONFIG_IRQ_SLOT_COUNT = 0x9
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAX_REBOOT_CNT = 0x8
+CONFIG_MAX_REBOOT_CNT = 0x3
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[52/116] intel/mtarvon ok.
Processing mainboard/intel/mtarvon (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x5
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LB_CKS_LOC = 0x7e
+CONFIG_LB_CKS_LOC = 0x7b
-CONFIG_LB_CKS_RANGE_END = 0x7d
+CONFIG_LB_CKS_RANGE_END = 0x7a
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x5
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x1
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[53/116] intel/truxton ok.
Processing mainboard/intel/truxton (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_EP80579 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x5
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LB_CKS_LOC = 0x7e
+CONFIG_LB_CKS_LOC = 0x7b
-CONFIG_LB_CKS_RANGE_END = 0x7d
+CONFIG_LB_CKS_RANGE_END = 0x7a
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x5
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_SMP = 0x1
+CONFIG_SMP = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[54/116] intel/xe7501devkit ok.
Processing mainboard/intel/xe7501devkit (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEBUG = 0x1
+CONFIG_DEBUG = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
-CONFIG_HAVE_OPTION_TABLE = 0x0
+CONFIG_HAVE_OPTION_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[55/116] iwill/dk8_htx ok.
Processing mainboard/iwill/dk8_htx (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/iwill/dk8_htx/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_ACPI_SSDTX_NUM = 0x3
+CONFIG_ACPI_SSDTX_NUM = 0x0
-CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_APIC_ID_OFFSET = 0x8
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xc4000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_SIZE = 0xc000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HW_MEM_HOLE_SIZEK = 0x80000
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
[56/116] iwill/dk8s2 ok.
Processing mainboard/iwill/dk8s2 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x8
+CONFIG_ATI_RAGE_XL = 0x1
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_HW_MEM_HOLE_SIZEK = 0x0
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_IRQ_SLOT_COUNT = 0xc
+CONFIG_IRQ_SLOT_COUNT = 0xb
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAX_CPUS = 0x2
+CONFIG_MAX_CPUS = 0x4
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
[57/116] iwill/dk8x ok.
Processing mainboard/iwill/dk8x (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x8
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_HW_MEM_HOLE_SIZEK = 0x0
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_IRQ_SLOT_COUNT = 0x9
+CONFIG_IRQ_SLOT_COUNT = 0xb
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAX_CPUS = 0x2
+CONFIG_MAX_CPUS = 0x4
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
[58/116] jetway/j7f24 ok.
Processing mainboard/jetway/j7f24 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/jetway/j7f24/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CN700_VIDEO_MB_128MB = 0x0
+CONFIG_CN700_VIDEO_MB_16MB = 0x0
+CONFIG_CN700_VIDEO_MB_32MB = 0x1
+CONFIG_CN700_VIDEO_MB_64MB = 0x0
+CONFIG_CN700_VIDEO_MB_8MB = 0x0
+CONFIG_CN700_VIDEO_MB_OFF = 0x0
+CONFIG_CPU_VIA_C7 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_EPIA_VT8237R_INIT = 0x0
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_OPTION_TABLE = 0x0
+CONFIG_HAVE_OPTION_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
[59/116] kontron/986lcd-m ok.
Processing mainboard/kontron/986lcd-m (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/kontron/986lcd-m/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_INTEL_CORE = 0x1
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x5
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
[60/116] kontron/kt690 ok.
Processing mainboard/kontron/kt690 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/kontron/kt690/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_ROM_SIZE = 0x100000
+CONFIG_ROM_SIZE = 0x80000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[61/116] lippert/frontrunner ok.
Processing mainboard/lippert/frontrunner (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[62/116] lippert/roadrunner-lx ok.
Processing mainboard/lippert/roadrunner-lx (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
-CONFIG_DEBUG = 0x1
+CONFIG_DEBUG = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[63/116] lippert/spacerunner-lx ok.
Processing mainboard/lippert/spacerunner-lx (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
-CONFIG_DEBUG = 0x1
+CONFIG_DEBUG = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[64/116] mitac/6513wu ok.
Processing mainboard/mitac/6513wu (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I810_VIDEO_MB_1MB = 0x1
+CONFIG_I810_VIDEO_MB_512KB = 0x0
+CONFIG_I810_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[65/116] msi/ms6119 ok.
Processing mainboard/msi/ms6119 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1462
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[66/116] msi/ms6147 ok.
Processing mainboard/msi/ms6147 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1462
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[67/116] msi/ms6156 ok.
Processing mainboard/msi/ms6156 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1462
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[68/116] msi/ms6178 ok.
Processing mainboard/msi/ms6178 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I810_VIDEO_MB_1MB = 0x1
+CONFIG_I810_VIDEO_MB_512KB = 0x0
+CONFIG_I810_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1462
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[69/116] msi/ms7135 ok.
Processing mainboard/msi/ms7135 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/msi/ms7135/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_DCACHE_RAM_BASE = 0xc8000
+CONFIG_DCACHE_RAM_BASE = 0xcf000
-CONFIG_DCACHE_RAM_SIZE = 0x8000
+CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_MEM_TRAIN_SEQ = 0x2
+CONFIG_MEM_TRAIN_SEQ = 0x0
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[70/116] msi/ms7260 ok.
Processing mainboard/msi/ms7260 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/msi/ms7260/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_APIC_ID_OFFSET = 0x16
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
-CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_MEM_TRAIN_SEQ = 0x2
+CONFIG_MEM_TRAIN_SEQ = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_USE_FALLBACK_IMAGE = 0x1
+CONFIG_USE_FALLBACK_IMAGE = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[71/116] msi/ms9185 ok.
Processing mainboard/msi/ms9185 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/msi/ms9185/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x8
+CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HT_CHAIN_UNITID_BASE = 0x6
+CONFIG_HT_CHAIN_UNITID_BASE = 0x0
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1022
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1462
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_SERIAL_CPU_INIT = 0x0
+CONFIG_SERIAL_CPU_INIT = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[72/116] msi/ms9282 ok.
Processing mainboard/msi/ms9282 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/msi/ms9282/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_APIC_ID_OFFSET = 0x16
-CONFIG_ENABLE_APIC_EXT_ID = 0x1
+CONFIG_ENABLE_APIC_EXT_ID = 0x0
-CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HW_MEM_HOLE_SIZEK = 0x0
+CONFIG_HW_MEM_HOLE_SIZEK = 0x100000
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x2
-CONFIG_MAX_PHYSICAL_CPUS = 0x2
+CONFIG_MAX_PHYSICAL_CPUS = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x1
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_USE_FALLBACK_IMAGE = 0x1
+CONFIG_USE_FALLBACK_IMAGE = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[73/116] nec/powermate2000 ok.
Processing mainboard/nec/powermate2000 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I810_VIDEO_MB_1MB = 0x1
+CONFIG_I810_VIDEO_MB_512KB = 0x0
+CONFIG_I810_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[74/116] newisys/khepri ok.
Processing mainboard/newisys/khepri (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x9
+CONFIG_IRQ_SLOT_COUNT = 0xb
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[75/116] nvidia/l1_2pvv ok.
Processing mainboard/nvidia/l1_2pvv (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/nvidia/l1_2pvv/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_APIC_ID_OFFSET = 0x16
-CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x2
-CONFIG_MAX_PHYSICAL_CPUS = 0x2
+CONFIG_MAX_PHYSICAL_CPUS = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_USE_FALLBACK_IMAGE = 0x1
+CONFIG_USE_FALLBACK_IMAGE = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
[76/116] olpc/btest ok.
Processing mainboard/olpc/btest (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[77/116] olpc/rev_a ok.
Processing mainboard/olpc/rev_a (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[78/116] pcengines/alix1c ok.
Processing mainboard/pcengines/alix1c (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_LX = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[79/116] rca/rm4100 ok.
Processing mainboard/rca/rm4100 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/rca/rm4100/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I830_VIDEO_MB_1MB = 0x0
+CONFIG_I830_VIDEO_MB_512KB = 0x0
+CONFIG_I830_VIDEO_MB_8MB = 0x1
+CONFIG_I830_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[80/116] soyo/sy-6ba-plus-iii ok.
Processing mainboard/soyo/sy-6ba-plus-iii (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[81/116] sunw/ultra40 ok.
Processing mainboard/sunw/ultra40 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_ENABLE_APIC_EXT_ID = 0x1
+CONFIG_ENABLE_APIC_EXT_ID = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[82/116] supermicro/h8dme ok.
Processing mainboard/supermicro/h8dme (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/supermicro/h8dme/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_LOW_TABLES = 0x0
+CONFIG_HAVE_LOW_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SERIAL_CPU_INIT = 0x0
+CONFIG_SERIAL_CPU_INIT = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
[83/116] supermicro/h8dmr ok.
Processing mainboard/supermicro/h8dmr (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/supermicro/h8dmr/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_ROM_SIZE = 0x100000
+CONFIG_ROM_SIZE = 0x80000
-CONFIG_SERIAL_CPU_INIT = 0x0
+CONFIG_SERIAL_CPU_INIT = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
[84/116] supermicro/h8dmr_fam10 ok.
Processing mainboard/supermicro/h8dmr_fam10 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/supermicro/h8dmr_fam10/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x1511
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x0
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x15d9
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[85/116] supermicro/x6dai_g ok.
Processing mainboard/supermicro/x6dai_g (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[86/116] supermicro/x6dhe_g ok.
Processing mainboard/supermicro/x6dhe_g (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[87/116] supermicro/x6dhe_g2 ok.
Processing mainboard/supermicro/x6dhe_g2 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[88/116] supermicro/x6dhr_ig ok.
Processing mainboard/supermicro/x6dhr_ig (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[89/116] supermicro/x6dhr_ig2 ok.
Processing mainboard/supermicro/x6dhr_ig2 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[90/116] technexion/tim5690 ok.
Processing mainboard/technexion/tim5690 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/technexion/tim5690/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
[91/116] technexion/tim8690 ok.
Processing mainboard/technexion/tim8690 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/technexion/tim8690/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x8
-CONFIG_GFXUMA = 0x1
+CONFIG_GFXUMA = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MAINBOARD_RESOURCES = 0x1
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
-CONFIG_HAVE_OPTION_TABLE = 0x0
+CONFIG_HAVE_OPTION_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x0
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x1
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
[92/116] technologic/ts5300 ok.
Processing mainboard/technologic/ts5300 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/technologic/ts5300/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_AMD_SC520 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_ROM_SIZE = 0x20000
+CONFIG_ROM_SIZE = 0x40000
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
-CONFIG_TTYS0_BASE = 0x2f8
+CONFIG_TTYS0_BASE = 0x3f8
+CONFIG_UDELAY_LAPIC = 0x0
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[93/116] televideo/tc7020 ok.
Processing mainboard/televideo/tc7020 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_AMD_GX1 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x6
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x6
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[94/116] thomson/ip1000 ok.
Processing mainboard/thomson/ip1000 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/thomson/ip1000/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
+CONFIG_I830_VIDEO_MB_1MB = 0x0
+CONFIG_I830_VIDEO_MB_512KB = 0x0
+CONFIG_I830_VIDEO_MB_8MB = 0x1
+CONFIG_I830_VIDEO_MB_OFF = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
+CONFIG_MMX = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[95/116] tyan/s1846 ok.
Processing mainboard/tyan/s1846 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_INTEL_SLOT_2 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[96/116] tyan/s2735 ok.
Processing mainboard/tyan/s2735 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_MOVNTI = 0x1
+CONFIG_HAVE_MOVNTI = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
+CONFIG_MMX = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SERIAL_CPU_INIT = 0x0
+CONFIG_SERIAL_CPU_INIT = 0x1
-CONFIG_USE_PRINTK_IN_CAR = 0x1
+CONFIG_USE_PRINTK_IN_CAR = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[97/116] tyan/s2850 ok.
Processing mainboard/tyan/s2850 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[98/116] tyan/s2875 ok.
Processing mainboard/tyan/s2875 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[99/116] tyan/s2880 ok.
Processing mainboard/tyan/s2880 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0xd
+CONFIG_IRQ_SLOT_COUNT = 0x9
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAX_CPUS = 0x2
+CONFIG_MAX_CPUS = 0x4
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[100/116] tyan/s2881 ok.
Processing mainboard/tyan/s2881 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[101/116] tyan/s2882 ok.
Processing mainboard/tyan/s2882 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x6
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0xa
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0xf
+CONFIG_IRQ_SLOT_COUNT = 0x9
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[102/116] tyan/s2885 ok.
Processing mainboard/tyan/s2885 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_ENABLE_APIC_EXT_ID = 0x1
+CONFIG_ENABLE_APIC_EXT_ID = 0x0
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0xb
+CONFIG_IRQ_SLOT_COUNT = 0x9
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[103/116] tyan/s2891 ok.
Processing mainboard/tyan/s2891 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/tyan/s2891/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_ROM_SIZE = 0x80000
+CONFIG_ROM_SIZE = 0x100000
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
[104/116] tyan/s2892 ok.
Processing mainboard/tyan/s2892 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/tyan/s2892/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_APIC_ID_OFFSET = 0x0
+CONFIG_APIC_ID_OFFSET = 0x10
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
[105/116] tyan/s2895 ok.
Processing mainboard/tyan/s2895 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/tyan/s2895/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_BASE = 0xcf000
+CONFIG_DCACHE_RAM_BASE = 0xc8000
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DIMM_SUPPORT = 0x108
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SERIAL_CPU_INIT = 0x0
+CONFIG_SERIAL_CPU_INIT = 0x1
[106/116] tyan/s2912 ok.
Processing mainboard/tyan/s2912 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/tyan/s2912/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_ACPI_SSDTX_NUM = 0x3
+CONFIG_ACPI_SSDTX_NUM = 0x0
-CONFIG_APIC_ID_OFFSET = 0x10
+CONFIG_APIC_ID_OFFSET = 0x16
-CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HEAP_SIZE = 0x8000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_MAX_CPUS = 0x4
+CONFIG_MAX_CPUS = 0x2
-CONFIG_MAX_PHYSICAL_CPUS = 0x2
+CONFIG_MAX_PHYSICAL_CPUS = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_USE_FALLBACK_IMAGE = 0x1
+CONFIG_USE_FALLBACK_IMAGE = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
-CONFIG_WAIT_BEFORE_CPUS_INIT = 0x1
+CONFIG_WAIT_BEFORE_CPUS_INIT = 0x0
[107/116] tyan/s2912_fam10 ok.
Processing mainboard/tyan/s2912_fam10 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/tyan/s2912_fam10/Config-abuild.lb ok
Creating builddir...ok
-CONFIG_HAVE_FALLBACK_BOOT = 0x1
+CONFIG_HAVE_FALLBACK_BOOT = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_SERIAL_CPU_INIT = 0x1
+CONFIG_SERIAL_CPU_INIT = 0x0
-CONFIG_USE_FALLBACK_IMAGE = 0x1
+CONFIG_USE_FALLBACK_IMAGE = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[108/116] tyan/s4880 ok.
Processing mainboard/tyan/s4880 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_ENABLE_APIC_EXT_ID = 0x1
+CONFIG_ENABLE_APIC_EXT_ID = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x16
+CONFIG_IRQ_SLOT_COUNT = 0xb
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_MAX_CPUS = 0x8
+CONFIG_MAX_CPUS = 0x4
-CONFIG_MAX_PHYSICAL_CPUS = 0x4
+CONFIG_MAX_PHYSICAL_CPUS = 0x2
-CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
-CONFIG_RAMBASE = 0x4000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[109/116] tyan/s4882 ok.
Processing mainboard/tyan/s4882 (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
-CONFIG_CPU_SOCKET_TYPE = 0x10
+CONFIG_CPU_SOCKET_TYPE = 0x0
-CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x0
+CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE = 0x1000
-CONFIG_DIMM_SUPPORT = 0x108
-CONFIG_ENABLE_APIC_EXT_ID = 0x1
+CONFIG_ENABLE_APIC_EXT_ID = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HT_CHAIN_END_UNITID_BASE = 0x20
+CONFIG_HT_CHAIN_END_UNITID_BASE = 0x0
-CONFIG_HT_CHAIN_UNITID_BASE = 0x1
+CONFIG_HT_CHAIN_UNITID_BASE = 0x0
-CONFIG_IRQ_SLOT_COUNT = 0x16
+CONFIG_IRQ_SLOT_COUNT = 0xb
-CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x0
+CONFIG_K8_HT_FREQ_1G_SUPPORT = 0x1
-CONFIG_MAX_CPUS = 0x8
+CONFIG_MAX_CPUS = 0x4
-CONFIG_MAX_PHYSICAL_CPUS = 0x4
+CONFIG_MAX_PHYSICAL_CPUS = 0x2
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_RAMBASE = 0x2000
+CONFIG_RAMBASE = 0x100000
-CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x0
+CONFIG_SB_HT_CHAIN_ON_BUS0 = 0x2
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x1
+CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY = 0x0
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[110/116] via/epia-cn ok.
Processing mainboard/via/epia-cn (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/via/epia-cn/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CN700_VIDEO_MB_128MB = 0x0
+CONFIG_CN700_VIDEO_MB_16MB = 0x0
+CONFIG_CN700_VIDEO_MB_32MB = 0x1
+CONFIG_CN700_VIDEO_MB_64MB = 0x0
+CONFIG_CN700_VIDEO_MB_8MB = 0x0
+CONFIG_CN700_VIDEO_MB_OFF = 0x0
+CONFIG_CPU_VIA_C7 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_EPIA_VT8237R_INIT = 0x0
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
[111/116] via/epia-m ok.
Processing mainboard/via/epia-m (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/via/epia-m/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_VIA_C3 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x1
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
[112/116] via/epia-m700 ok.
Processing mainboard/via/epia-m700 (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/via/epia-m700/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_VIA_C7 = 0x1
-CONFIG_DCACHE_RAM_SIZE = 0x2000
+CONFIG_DCACHE_RAM_SIZE = 0x8000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x0
-CONFIG_HEAP_SIZE = 0x5000
+CONFIG_HEAP_SIZE = 0x4000
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1019
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_USE_DCACHE_RAM = 0x1
+CONFIG_USE_DCACHE_RAM = 0x0
[113/116] via/epia-n ok.
Processing mainboard/via/epia-n (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/via/epia-n/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CN400_VIDEO_MB_128MB = 0x0
+CONFIG_CN400_VIDEO_MB_16MB = 0x0
+CONFIG_CN400_VIDEO_MB_32MB = 0x1
+CONFIG_CN400_VIDEO_MB_64MB = 0x0
+CONFIG_CN400_VIDEO_MB_8MB = 0x0
+CONFIG_CN400_VIDEO_MB_OFF = 0x0
+CONFIG_CPU_VIA_C3 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_ACPI_TABLES = 0x1
+CONFIG_HAVE_HIGH_TABLES = 0x0
-CONFIG_HAVE_INIT_TIMER = 0x1
+CONFIG_HAVE_INIT_TIMER = 0x0
-CONFIG_HAVE_MAINBOARD_RESOURCES = 0x1
+CONFIG_HAVE_MAINBOARD_RESOURCES = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_SMP = 0x1
+CONFIG_SMP = 0x0
-CONFIG_UDELAY_IO = 0x0
+CONFIG_UDELAY_IO = 0x1
-CONFIG_UDELAY_TSC = 0x1
+CONFIG_UDELAY_TSC = 0x0
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
[114/116] via/epia ok.
Processing mainboard/via/epia (i386: ok, we're amd64 with a cross compiler)
Creating config file... ok
Creating builddir...ok
+CONFIG_CPU_VIA_C3 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE = 0x1
+CONFIG_PCI_OPTION_ROM_RUN_X86EMU = 0x0
+CONFIG_PCI_OPTION_ROM_RUN_YABEL = 0x0
-CONFIG_PCI_ROM_RUN = 0x0
+CONFIG_PCI_ROM_RUN = 0x1
-CONFIG_VGA_ROM_RUN = 0x0
+CONFIG_VGA_ROM_RUN = 0x1
[115/116] via/pc2500e ok.
Processing mainboard/via/pc2500e (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/via/pc2500e/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CN700_VIDEO_MB_128MB = 0x0
+CONFIG_CN700_VIDEO_MB_16MB = 0x0
+CONFIG_CN700_VIDEO_MB_32MB = 0x1
+CONFIG_CN700_VIDEO_MB_64MB = 0x0
+CONFIG_CN700_VIDEO_MB_8MB = 0x0
+CONFIG_CN700_VIDEO_MB_OFF = 0x0
+CONFIG_CPU_VIA_C7 = 0x1
-CONFIG_DCACHE_RAM_BASE = 0xc0000
-CONFIG_DCACHE_RAM_SIZE = 0x1000
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x9
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_EPIA_VT8237R_INIT = 0x0
+CONFIG_FALLBACK_SIZE = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x1
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x9
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x0
+CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 0x1
-CONFIG_USE_OPTION_TABLE = 0x1
+CONFIG_USE_OPTION_TABLE = 0x0
[116/116] via/vt8454c ok.
Processing mainboard/via/vt8454c (i386: ok, we're amd64 with a cross compiler)
Using existing test target /srv/svn/coreboot-extra/tmp/coreboot-v2-5007/targets/via/vt8454c/Config-abuild.lb ok
Creating builddir...ok
+CONFIG_CPU_VIA_C7 = 0x1
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x5
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 0x8
+CONFIG_HAVE_ACPI_TABLES = 0x1
-CONFIG_HAVE_HARD_RESET = 0x1
+CONFIG_HAVE_HARD_RESET = 0x0
+CONFIG_HAVE_HIGH_TABLES = 0x0
+CONFIG_HAVE_MP_TABLE = 0x1
+CONFIG_HAVE_PIRQ_TABLE = 0x1
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x1
+CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT = 0x0
-CONFIG_IOAPIC = 0x1
+CONFIG_IOAPIC = 0x0
-CONFIG_LOGICAL_CPUS = 0x0
+CONFIG_LOGICAL_CPUS = 0x1
-CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x0
+CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1019
-CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x5
+CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 0x8
-CONFIG_ROM_SIZE = 0x80000
+CONFIG_ROM_SIZE = 0x100000
-CONFIG_SMP = 0x1
+CONFIG_SMP = 0x0
-CONFIG_USE_DCACHE_RAM = 0x1
+CONFIG_USE_DCACHE_RAM = 0x0
-CONFIG_WRITE_HIGH_TABLES = 0x1
+CONFIG_WRITE_HIGH_TABLES = 0x0
1
0
Author: stepan
Date: 2010-01-13 22:00:23 +0100 (Wed, 13 Jan 2010)
New Revision: 5007
Modified:
trunk/util/nvramtool/cmos_lowlevel.c
trunk/util/nvramtool/cmos_lowlevel.h
trunk/util/nvramtool/cmos_ops.c
trunk/util/nvramtool/cmos_ops.h
trunk/util/nvramtool/common.c
trunk/util/nvramtool/common.h
trunk/util/nvramtool/compute_ip_checksum.c
trunk/util/nvramtool/coreboot_tables.h
trunk/util/nvramtool/hexdump.c
trunk/util/nvramtool/hexdump.h
trunk/util/nvramtool/input_file.c
trunk/util/nvramtool/input_file.h
trunk/util/nvramtool/ip_checksum.h
trunk/util/nvramtool/layout.c
trunk/util/nvramtool/layout.h
trunk/util/nvramtool/layout_file.c
trunk/util/nvramtool/layout_file.h
trunk/util/nvramtool/lbtable.c
trunk/util/nvramtool/lbtable.h
trunk/util/nvramtool/nvramtool.c
trunk/util/nvramtool/opts.c
trunk/util/nvramtool/opts.h
trunk/util/nvramtool/reg_expr.c
trunk/util/nvramtool/reg_expr.h
Log:
indent all of nvramtool to make it fit into coreboot's
coding style
Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de>
Acked-by: Stefan Reinauer <stepan(a)coresystems.de>
Modified: trunk/util/nvramtool/cmos_lowlevel.c
===================================================================
--- trunk/util/nvramtool/cmos_lowlevel.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/cmos_lowlevel.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -36,22 +36,21 @@
#include "common.h"
#include "cmos_lowlevel.h"
-typedef struct
- { unsigned byte_index;
- unsigned bit_offset;
- }
-cmos_bit_op_location_t;
+typedef struct {
+ unsigned byte_index;
+ unsigned bit_offset;
+} cmos_bit_op_location_t;
-static unsigned cmos_bit_op_strategy (unsigned bit, unsigned bits_left,
- cmos_bit_op_location_t *where);
-static unsigned char cmos_read_bits (const cmos_bit_op_location_t *where,
- unsigned nr_bits);
-static void cmos_write_bits (const cmos_bit_op_location_t *where,
- unsigned nr_bits, unsigned char value);
-static unsigned char get_bits (unsigned long long value, unsigned bit,
- unsigned nr_bits);
-static void put_bits (unsigned char value, unsigned bit, unsigned nr_bits,
- unsigned long long *result);
+static unsigned cmos_bit_op_strategy(unsigned bit, unsigned bits_left,
+ cmos_bit_op_location_t * where);
+static unsigned char cmos_read_bits(const cmos_bit_op_location_t * where,
+ unsigned nr_bits);
+static void cmos_write_bits(const cmos_bit_op_location_t * where,
+ unsigned nr_bits, unsigned char value);
+static unsigned char get_bits(unsigned long long value, unsigned bit,
+ unsigned nr_bits);
+static void put_bits(unsigned char value, unsigned bit, unsigned nr_bits,
+ unsigned long long *result);
/****************************************************************************
* get_bits
@@ -59,9 +58,11 @@
* Extract a value 'nr_bits' bits wide starting at bit position 'bit' from
* 'value' and return the result. It is assumed that 'nr_bits' is at most 8.
****************************************************************************/
-static inline unsigned char get_bits (unsigned long long value, unsigned bit,
- unsigned nr_bits)
- { return (value >> bit) & ((unsigned char) ((1 << nr_bits) - 1)); }
+static inline unsigned char get_bits(unsigned long long value, unsigned bit,
+ unsigned nr_bits)
+{
+ return (value >> bit) & ((unsigned char)((1 << nr_bits) - 1));
+}
/****************************************************************************
* put_bits
@@ -71,9 +72,12 @@
* positions in 'result' where the result is stored are assumed to be
* initially zero.
****************************************************************************/
-static inline void put_bits (unsigned char value, unsigned bit,
- unsigned nr_bits, unsigned long long *result)
- { *result += ((unsigned long long)(value & ((unsigned char) ((1 << nr_bits) - 1)))) << bit; }
+static inline void put_bits(unsigned char value, unsigned bit,
+ unsigned nr_bits, unsigned long long *result)
+{
+ *result += ((unsigned long long)(value &
+ ((unsigned char)((1 << nr_bits) - 1)))) << bit;
+}
/****************************************************************************
* cmos_read
@@ -82,43 +86,48 @@
* and return this value. The I/O privilege level of the currently executing
* process must be set appropriately.
****************************************************************************/
-unsigned long long cmos_read (const cmos_entry_t *e)
- { cmos_bit_op_location_t where;
- unsigned bit = e->bit, length=e->length;
- unsigned next_bit, bits_left, nr_bits;
- unsigned long long result = 0;
- unsigned char value;
+unsigned long long cmos_read(const cmos_entry_t * e)
+{
+ cmos_bit_op_location_t where;
+ unsigned bit = e->bit, length = e->length;
+ unsigned next_bit, bits_left, nr_bits;
+ unsigned long long result = 0;
+ unsigned char value;
- assert(!verify_cmos_op(bit, length, e->config));
- result = 0;
+ assert(!verify_cmos_op(bit, length, e->config));
+ result = 0;
- if (e->config == CMOS_ENTRY_STRING)
- { char *newstring = calloc(1, (length+7)/8);
- unsigned usize = (8 * sizeof(unsigned long long));
+ if (e->config == CMOS_ENTRY_STRING) {
+ char *newstring = calloc(1, (length + 7) / 8);
+ unsigned usize = (8 * sizeof(unsigned long long));
- if(!newstring) { out_of_memory(); }
+ if (!newstring) {
+ out_of_memory();
+ }
- for (next_bit = 0, bits_left = length;
- bits_left;
- next_bit += nr_bits, bits_left -= nr_bits)
- { nr_bits = cmos_bit_op_strategy(bit + next_bit, bits_left>usize?usize:bits_left, &where);
- value = cmos_read_bits(&where, nr_bits);
- put_bits(value, next_bit % usize, nr_bits, &((unsigned long long *)newstring)[next_bit/usize]);
- result = (unsigned long)newstring;
- }
- }
- else
- { for (next_bit = 0, bits_left = length;
- bits_left;
- next_bit += nr_bits, bits_left -= nr_bits)
- { nr_bits = cmos_bit_op_strategy(bit + next_bit, bits_left, &where);
- value = cmos_read_bits(&where, nr_bits);
- put_bits(value, next_bit, nr_bits, &result);
- }
- }
+ for (next_bit = 0, bits_left = length;
+ bits_left; next_bit += nr_bits, bits_left -= nr_bits) {
+ nr_bits = cmos_bit_op_strategy(bit + next_bit,
+ bits_left > usize ? usize : bits_left, &where);
+ value = cmos_read_bits(&where, nr_bits);
+ put_bits(value, next_bit % usize, nr_bits,
+ &((unsigned long long *)newstring)[next_bit /
+ usize]);
+ result = (unsigned long)newstring;
+ }
+ } else {
+ for (next_bit = 0, bits_left = length;
+ bits_left; next_bit += nr_bits, bits_left -= nr_bits) {
+ nr_bits =
+ cmos_bit_op_strategy(bit + next_bit, bits_left,
+ &where);
+ value = cmos_read_bits(&where, nr_bits);
+ put_bits(value, next_bit, nr_bits, &result);
+ }
+ }
- return result;
- }
+ return result;
+}
/****************************************************************************
* cmos_write
@@ -127,34 +136,38 @@
* The I/O privilege level of the currently executing process must be set
* appropriately.
****************************************************************************/
-void cmos_write (const cmos_entry_t *e, unsigned long long value)
- { cmos_bit_op_location_t where;
- unsigned bit = e->bit, length=e->length;
- unsigned next_bit, bits_left, nr_bits;
+void cmos_write(const cmos_entry_t * e, unsigned long long value)
+{
+ cmos_bit_op_location_t where;
+ unsigned bit = e->bit, length = e->length;
+ unsigned next_bit, bits_left, nr_bits;
- assert(!verify_cmos_op(bit, length, e->config));
+ assert(!verify_cmos_op(bit, length, e->config));
- if (e->config == CMOS_ENTRY_STRING)
- { unsigned long long *data = (unsigned long long *)(unsigned long)value;
- unsigned usize = (8 * sizeof(unsigned long long));
+ if (e->config == CMOS_ENTRY_STRING) {
+ unsigned long long *data =
+ (unsigned long long *)(unsigned long)value;
+ unsigned usize = (8 * sizeof(unsigned long long));
- for (next_bit = 0, bits_left = length;
- bits_left;
- next_bit += nr_bits, bits_left -= nr_bits)
- { nr_bits = cmos_bit_op_strategy(bit + next_bit, bits_left>usize?usize:bits_left, &where);
- value = data[next_bit/usize];
- cmos_write_bits(&where, nr_bits, get_bits(value, next_bit % usize, nr_bits));
- }
- }
- else
- { for (next_bit = 0, bits_left = length;
- bits_left;
- next_bit += nr_bits, bits_left -= nr_bits)
- { nr_bits = cmos_bit_op_strategy(bit + next_bit, bits_left, &where);
- cmos_write_bits(&where, nr_bits, get_bits(value, next_bit, nr_bits));
- }
- }
- }
+ for (next_bit = 0, bits_left = length;
+ bits_left; next_bit += nr_bits, bits_left -= nr_bits) {
+ nr_bits = cmos_bit_op_strategy(bit + next_bit,
+ bits_left > usize ? usize : bits_left,
+ &where);
+ value = data[next_bit / usize];
+ cmos_write_bits(&where, nr_bits,
+ get_bits(value, next_bit % usize, nr_bits));
+ }
+ } else {
+ for (next_bit = 0, bits_left = length;
+ bits_left; next_bit += nr_bits, bits_left -= nr_bits) {
+ nr_bits = cmos_bit_op_strategy(bit + next_bit,
+ bits_left, &where);
+ cmos_write_bits(&where, nr_bits,
+ get_bits(value, next_bit, nr_bits));
+ }
+ }
+}
/****************************************************************************
* cmos_read_byte
@@ -166,23 +179,23 @@
* Note: the first 14 bytes of nonvolatile RAM provide an interface to the
* real time clock.
****************************************************************************/
-unsigned char cmos_read_byte (unsigned index)
- { unsigned short port_0, port_1;
+unsigned char cmos_read_byte(unsigned index)
+{
+ unsigned short port_0, port_1;
- assert(!verify_cmos_byte_index(index));
+ assert(!verify_cmos_byte_index(index));
- if (index < 128)
- { port_0 = 0x70;
- port_1 = 0x71;
- }
- else
- { port_0 = 0x72;
- port_1 = 0x73;
- }
+ if (index < 128) {
+ port_0 = 0x70;
+ port_1 = 0x71;
+ } else {
+ port_0 = 0x72;
+ port_1 = 0x73;
+ }
- OUTB(index, port_0);
- return INB(port_1);
- }
+ OUTB(index, port_0);
+ return INB(port_1);
+}
/****************************************************************************
* cmos_write_byte
@@ -194,23 +207,23 @@
* real time clock. Writing to any of these bytes will therefore
* affect its functioning.
****************************************************************************/
-void cmos_write_byte (unsigned index, unsigned char value)
- { unsigned short port_0, port_1;
+void cmos_write_byte(unsigned index, unsigned char value)
+{
+ unsigned short port_0, port_1;
- assert(!verify_cmos_byte_index(index));
+ assert(!verify_cmos_byte_index(index));
- if (index < 128)
- { port_0 = 0x70;
- port_1 = 0x71;
- }
- else
- { port_0 = 0x72;
- port_1 = 0x73;
- }
+ if (index < 128) {
+ port_0 = 0x70;
+ port_1 = 0x71;
+ } else {
+ port_0 = 0x72;
+ port_1 = 0x73;
+ }
- OUTB(index, port_0);
- OUTB(value, port_1);
- }
+ OUTB(index, port_0);
+ OUTB(value, port_1);
+}
/****************************************************************************
* cmos_read_all
@@ -218,15 +231,16 @@
* Read all contents of CMOS memory into array 'data'. The first 14 bytes of
* 'data' are set to zero since this corresponds to the real time clock area.
****************************************************************************/
-void cmos_read_all (unsigned char data[])
- { unsigned i;
+void cmos_read_all(unsigned char data[])
+{
+ unsigned i;
- for (i = 0; i < CMOS_RTC_AREA_SIZE; i++)
- data[i] = 0;
+ for (i = 0; i < CMOS_RTC_AREA_SIZE; i++)
+ data[i] = 0;
- for (; i < CMOS_SIZE; i++)
- data[i] = cmos_read_byte(i);
- }
+ for (; i < CMOS_SIZE; i++)
+ data[i] = cmos_read_byte(i);
+}
/****************************************************************************
* cmos_write_all
@@ -235,12 +249,13 @@
* bytes of 'data' are ignored since this corresponds to the real time clock
* area.
****************************************************************************/
-void cmos_write_all (unsigned char data[])
- { unsigned i;
+void cmos_write_all(unsigned char data[])
+{
+ unsigned i;
- for (i = CMOS_RTC_AREA_SIZE; i < CMOS_SIZE; i++)
- cmos_write_byte(i, data[i]);
- }
+ for (i = CMOS_RTC_AREA_SIZE; i < CMOS_SIZE; i++)
+ cmos_write_byte(i, data[i]);
+}
/****************************************************************************
* set_iopl
@@ -251,45 +266,37 @@
* interrupts while executing in user space. Messing with the I/O privilege
* level is therefore somewhat dangerous.
****************************************************************************/
-void set_iopl (int level)
- {
+void set_iopl(int level)
+{
#if defined(__FreeBSD__)
- static int io_fd = -1;
+ static int io_fd = -1;
#endif
- assert((level >= 0) && (level <= 3));
+ assert((level >= 0) && (level <= 3));
#if defined(__FreeBSD__)
- if (level == 0)
- {
- if (io_fd != -1)
- {
- close(io_fd);
- io_fd = -1;
- }
- }
- else
- {
- if (io_fd == -1)
- {
- io_fd = open("/dev/io", O_RDWR);
- if (io_fd < 0)
- {
- perror("/dev/io");
- exit(1);
- }
- }
- }
+ if (level == 0) {
+ if (io_fd != -1) {
+ close(io_fd);
+ io_fd = -1;
+ }
+ } else {
+ if (io_fd == -1) {
+ io_fd = open("/dev/io", O_RDWR);
+ if (io_fd < 0) {
+ perror("/dev/io");
+ exit(1);
+ }
+ }
+ }
#else
- if (iopl(level))
- { fprintf(stderr,
- "%s: iopl() system call failed. You must be root to do "
- "this.\n",
- prog_name);
- exit(1);
- }
+ if (iopl(level)) {
+ fprintf(stderr, "%s: iopl() system call failed. "
+ "You must be root to do this.\n", prog_name);
+ exit(1);
+ }
#endif
- }
+}
/****************************************************************************
* verify_cmos_op
@@ -300,21 +307,22 @@
* wish to read or write. Perform sanity checking on 'bit' and 'length'. If
* no problems were encountered, return OK. Else return an error code.
****************************************************************************/
-int verify_cmos_op (unsigned bit, unsigned length, cmos_entry_config_t config)
- { if ((bit >= (8 * CMOS_SIZE)) || ((bit + length) > (8 * CMOS_SIZE)))
- return CMOS_AREA_OUT_OF_RANGE;
+int verify_cmos_op(unsigned bit, unsigned length, cmos_entry_config_t config)
+{
+ if ((bit >= (8 * CMOS_SIZE)) || ((bit + length) > (8 * CMOS_SIZE)))
+ return CMOS_AREA_OUT_OF_RANGE;
- if (bit < (8 * CMOS_RTC_AREA_SIZE))
- return CMOS_AREA_OVERLAPS_RTC;
+ if (bit < (8 * CMOS_RTC_AREA_SIZE))
+ return CMOS_AREA_OVERLAPS_RTC;
- if (config == CMOS_ENTRY_STRING)
- return OK;
+ if (config == CMOS_ENTRY_STRING)
+ return OK;
- if (length > (8 * sizeof(unsigned long long)))
- return CMOS_AREA_TOO_WIDE;
+ if (length > (8 * sizeof(unsigned long long)))
+ return CMOS_AREA_TOO_WIDE;
- return OK;
- }
+ return OK;
+}
/****************************************************************************
* cmos_bit_op_strategy
@@ -322,15 +330,16 @@
* Helper function used by cmos_read() and cmos_write() to determine which
* bits to read or write next.
****************************************************************************/
-static unsigned cmos_bit_op_strategy (unsigned bit, unsigned bits_left,
- cmos_bit_op_location_t *where)
- { unsigned max_bits;
+static unsigned cmos_bit_op_strategy(unsigned bit, unsigned bits_left,
+ cmos_bit_op_location_t * where)
+{
+ unsigned max_bits;
- where->byte_index = bit >> 3;
- where->bit_offset = bit & 0x07;
- max_bits = 8 - where->bit_offset;
- return (bits_left > max_bits) ? max_bits : bits_left;
- }
+ where->byte_index = bit >> 3;
+ where->bit_offset = bit & 0x07;
+ max_bits = 8 - where->bit_offset;
+ return (bits_left > max_bits) ? max_bits : bits_left;
+}
/****************************************************************************
* cmos_read_bits
@@ -338,11 +347,12 @@
* Read a chunk of bits from a byte location within CMOS memory. Return the
* value represented by the chunk of bits.
****************************************************************************/
-static unsigned char cmos_read_bits (const cmos_bit_op_location_t *where,
- unsigned nr_bits)
- { return (cmos_read_byte(where->byte_index) >> where->bit_offset) &
- ((unsigned char) ((1 << nr_bits) - 1));
- }
+static unsigned char cmos_read_bits(const cmos_bit_op_location_t * where,
+ unsigned nr_bits)
+{
+ return (cmos_read_byte(where->byte_index) >> where->bit_offset) &
+ ((unsigned char)((1 << nr_bits) - 1));
+}
/****************************************************************************
* cmos_write_bits
@@ -350,17 +360,18 @@
* Write a chunk of bits (the low order 'nr_bits' bits of 'value') to an area
* within a particular byte of CMOS memory.
****************************************************************************/
-static void cmos_write_bits (const cmos_bit_op_location_t *where,
- unsigned nr_bits, unsigned char value)
- { unsigned char n, mask;
+static void cmos_write_bits(const cmos_bit_op_location_t * where,
+ unsigned nr_bits, unsigned char value)
+{
+ unsigned char n, mask;
- if (nr_bits == 8)
- { cmos_write_byte(where->byte_index, value);
- return;
- }
+ if (nr_bits == 8) {
+ cmos_write_byte(where->byte_index, value);
+ return;
+ }
- n = cmos_read_byte(where->byte_index);
- mask = ((unsigned char) ((1 << nr_bits) - 1)) << where->bit_offset;
- n = (n & ~mask) + ((value << where->bit_offset) & mask);
- cmos_write_byte(where->byte_index, n);
- }
+ n = cmos_read_byte(where->byte_index);
+ mask = ((unsigned char)((1 << nr_bits) - 1)) << where->bit_offset;
+ n = (n & ~mask) + ((value << where->bit_offset) & mask);
+ cmos_write_byte(where->byte_index, n);
+}
Modified: trunk/util/nvramtool/cmos_lowlevel.h
===================================================================
--- trunk/util/nvramtool/cmos_lowlevel.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/cmos_lowlevel.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -38,17 +38,17 @@
#define CMOS_AREA_OVERLAPS_RTC (CMOS_RESULT_START + 1)
#define CMOS_AREA_TOO_WIDE (CMOS_RESULT_START + 2)
-unsigned long long cmos_read (const cmos_entry_t *e);
-void cmos_write (const cmos_entry_t *e, unsigned long long value);
-unsigned char cmos_read_byte (unsigned index);
-void cmos_write_byte (unsigned index, unsigned char value);
-void cmos_read_all (unsigned char data[]);
-void cmos_write_all (unsigned char data[]);
-void set_iopl (int level);
-int verify_cmos_op (unsigned bit, unsigned length, cmos_entry_config_t config);
+unsigned long long cmos_read(const cmos_entry_t * e);
+void cmos_write(const cmos_entry_t * e, unsigned long long value);
+unsigned char cmos_read_byte(unsigned index);
+void cmos_write_byte(unsigned index, unsigned char value);
+void cmos_read_all(unsigned char data[]);
+void cmos_write_all(unsigned char data[]);
+void set_iopl(int level);
+int verify_cmos_op(unsigned bit, unsigned length, cmos_entry_config_t config);
-#define CMOS_SIZE 256 /* size of CMOS memory in bytes */
-#define CMOS_RTC_AREA_SIZE 14 /* first 14 bytes control real time clock */
+#define CMOS_SIZE 256 /* size of CMOS memory in bytes */
+#define CMOS_RTC_AREA_SIZE 14 /* first 14 bytes control real time clock */
/****************************************************************************
* verify_cmos_byte_index
@@ -56,7 +56,9 @@
* Return 1 if 'index' does NOT specify a valid CMOS memory location. Else
* return 0.
****************************************************************************/
-static inline int verify_cmos_byte_index (unsigned index)
- { return (index < CMOS_RTC_AREA_SIZE) || (index >= CMOS_SIZE); }
+static inline int verify_cmos_byte_index(unsigned index)
+{
+ return (index < CMOS_RTC_AREA_SIZE) || (index >= CMOS_SIZE);
+}
-#endif /* NVRAMTOOL_CMOS_LOWLEVEL_H */
+#endif /* NVRAMTOOL_CMOS_LOWLEVEL_H */
Modified: trunk/util/nvramtool/cmos_ops.c
===================================================================
--- trunk/util/nvramtool/cmos_ops.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/cmos_ops.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -32,26 +32,27 @@
#include "cmos_ops.h"
#include "cmos_lowlevel.h"
-static int prepare_cmos_op_common (const cmos_entry_t *e);
+static int prepare_cmos_op_common(const cmos_entry_t * e);
/****************************************************************************
* prepare_cmos_op_common
*
* Perform a few checks common to both reads and writes.
****************************************************************************/
-static int prepare_cmos_op_common (const cmos_entry_t *e)
- { int result;
+static int prepare_cmos_op_common(const cmos_entry_t * e)
+{
+ int result;
- if (e->config == CMOS_ENTRY_RESERVED)
- /* Access to reserved parameters is not permitted. */
- return CMOS_OP_RESERVED;
+ if (e->config == CMOS_ENTRY_RESERVED)
+ /* Access to reserved parameters is not permitted. */
+ return CMOS_OP_RESERVED;
- if ((result = verify_cmos_op(e->bit, e->length, e->config)) != OK)
- return result;
+ if ((result = verify_cmos_op(e->bit, e->length, e->config)) != OK)
+ return result;
- assert(e->length > 0);
- return OK;
- }
+ assert(e->length > 0);
+ return OK;
+}
/****************************************************************************
* prepare_cmos_read
@@ -60,24 +61,25 @@
* sanity checking on 'e'. If a problem was found with e, return an error
* code. Else return OK.
****************************************************************************/
-int prepare_cmos_read (const cmos_entry_t *e)
- { int result;
+int prepare_cmos_read(const cmos_entry_t * e)
+{
+ int result;
- if ((result = prepare_cmos_op_common(e)) != OK)
- return result;
+ if ((result = prepare_cmos_op_common(e)) != OK)
+ return result;
- switch (e->config)
- { case CMOS_ENTRY_ENUM:
- case CMOS_ENTRY_HEX:
- case CMOS_ENTRY_STRING:
- break;
+ switch (e->config) {
+ case CMOS_ENTRY_ENUM:
+ case CMOS_ENTRY_HEX:
+ case CMOS_ENTRY_STRING:
+ break;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- return OK;
- }
+ return OK;
+}
/****************************************************************************
* prepare_cmos_write
@@ -87,79 +89,78 @@
* checking on 'value_str'. On error, return an error code. Else store the
* numeric equivalent of 'value_str' in '*value' and return OK.
****************************************************************************/
-int prepare_cmos_write (const cmos_entry_t *e, const char value_str[],
- unsigned long long *value)
- { const cmos_enum_t *q;
- unsigned long long out;
- const char *p;
- char *memory;
- int negative, result, found_one;
+int prepare_cmos_write(const cmos_entry_t * e, const char value_str[],
+ unsigned long long *value)
+{
+ const cmos_enum_t *q;
+ unsigned long long out;
+ const char *p;
+ char *memory;
+ int negative, result, found_one;
- if ((result = prepare_cmos_op_common(e)) != OK)
- return result;
+ if ((result = prepare_cmos_op_common(e)) != OK)
+ return result;
- switch (e->config)
- { case CMOS_ENTRY_ENUM:
- /* Make sure the user's input corresponds to a valid option. */
- for (q = first_cmos_enum_id(e->config_id), found_one = 0;
- q != NULL;
- q = next_cmos_enum_id(q))
- { found_one = 1;
+ switch (e->config) {
+ case CMOS_ENTRY_ENUM:
+ /* Make sure the user's input corresponds to a valid option. */
+ for (q = first_cmos_enum_id(e->config_id), found_one = 0;
+ q != NULL; q = next_cmos_enum_id(q)) {
+ found_one = 1;
- if (!strncmp(q->text, value_str, CMOS_MAX_TEXT_LENGTH))
- break;
- }
+ if (!strncmp(q->text, value_str, CMOS_MAX_TEXT_LENGTH))
+ break;
+ }
- if (!found_one)
- return CMOS_OP_NO_MATCHING_ENUM;
+ if (!found_one)
+ return CMOS_OP_NO_MATCHING_ENUM;
- if (q == NULL)
- return CMOS_OP_BAD_ENUM_VALUE;
+ if (q == NULL)
+ return CMOS_OP_BAD_ENUM_VALUE;
- out = q->value;
- break;
+ out = q->value;
+ break;
- case CMOS_ENTRY_HEX:
- /* See if the first character of 'value_str' (excluding any initial
- * whitespace) is a minus sign.
- */
- for (p = value_str; isspace(*p); p++);
- negative = (*p == '-');
+ case CMOS_ENTRY_HEX:
+ /* See if the first character of 'value_str' (excluding
+ * any initial whitespace) is a minus sign.
+ */
+ for (p = value_str; isspace(*p); p++) ;
+ negative = (*p == '-');
- out = strtoull(value_str, (char **) &p, 0);
+ out = strtoull(value_str, (char **)&p, 0);
- if (*p)
- return CMOS_OP_INVALID_INT;
+ if (*p)
+ return CMOS_OP_INVALID_INT;
- /* If we get this far, the user specified a valid integer. However
- * we do not currently support the use of negative numbers as CMOS
- * parameter values.
- */
- if (negative)
- return CMOS_OP_NEGATIVE_INT;
+ /* If we get this far, the user specified a valid integer.
+ * However we do not currently support the use of negative
+ * numbers as CMOS parameter values.
+ */
+ if (negative)
+ return CMOS_OP_NEGATIVE_INT;
- break;
+ break;
- case CMOS_ENTRY_STRING:
- if (e->length < (8 * strlen(value_str)))
- return CMOS_OP_VALUE_TOO_WIDE;
- memory = malloc(e->length / 8);
- memset(memory, 0, e->length / 8);
- strcpy(memory, value_str);
- out = (unsigned long)memory;
- break;
+ case CMOS_ENTRY_STRING:
+ if (e->length < (8 * strlen(value_str)))
+ return CMOS_OP_VALUE_TOO_WIDE;
+ memory = malloc(e->length / 8);
+ memset(memory, 0, e->length / 8);
+ strcpy(memory, value_str);
+ out = (unsigned long)memory;
+ break;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- if ((e->length < (8 * sizeof(*value))) &&
- (out >= (1ull << e->length)))
- return CMOS_OP_VALUE_TOO_WIDE;
+ if ((e->length < (8 * sizeof(*value))) && (out >= (1ull << e->length)))
+ return CMOS_OP_VALUE_TOO_WIDE;
- *value = out;
- return OK;
- }
+ *value = out;
+ return OK;
+}
/****************************************************************************
* cmos_checksum_read
@@ -167,14 +168,15 @@
* Read the checksum for the coreboot parameters stored in CMOS and return
* this value.
****************************************************************************/
-uint16_t cmos_checksum_read (void)
- { uint16_t lo, hi;
+uint16_t cmos_checksum_read(void)
+{
+ uint16_t lo, hi;
- /* The checksum is stored in a big-endian format. */
- hi = cmos_read_byte(cmos_checksum_index);
- lo = cmos_read_byte(cmos_checksum_index + 1);
- return (hi << 8) + lo;
- }
+ /* The checksum is stored in a big-endian format. */
+ hi = cmos_read_byte(cmos_checksum_index);
+ lo = cmos_read_byte(cmos_checksum_index + 1);
+ return (hi << 8) + lo;
+}
/****************************************************************************
* cmos_checksum_write
@@ -182,15 +184,16 @@
* Set the checksum for the coreboot parameters stored in CMOS to
* 'checksum'.
****************************************************************************/
-void cmos_checksum_write (uint16_t checksum)
- { unsigned char lo, hi;
+void cmos_checksum_write(uint16_t checksum)
+{
+ unsigned char lo, hi;
- /* The checksum is stored in a big-endian format. */
- hi = (unsigned char) (checksum >> 8);
- lo = (unsigned char) (checksum & 0x00ff);
- cmos_write_byte(cmos_checksum_index, hi);
- cmos_write_byte(cmos_checksum_index + 1, lo);
- }
+ /* The checksum is stored in a big-endian format. */
+ hi = (unsigned char)(checksum >> 8);
+ lo = (unsigned char)(checksum & 0x00ff);
+ cmos_write_byte(cmos_checksum_index, hi);
+ cmos_write_byte(cmos_checksum_index + 1, lo);
+}
/****************************************************************************
* cmos_checksum_compute
@@ -198,16 +201,17 @@
* Compute a checksum for the coreboot parameter values currently stored in
* CMOS and return this checksum.
****************************************************************************/
-uint16_t cmos_checksum_compute (void)
- { unsigned i, sum;
+uint16_t cmos_checksum_compute(void)
+{
+ unsigned i, sum;
- sum = 0;
+ sum = 0;
- for (i = cmos_checksum_start; i <= cmos_checksum_end; i++)
- sum += cmos_read_byte(i);
+ for (i = cmos_checksum_start; i <= cmos_checksum_end; i++)
+ sum += cmos_read_byte(i);
- return ~((uint16_t) (sum & 0xffff));
- }
+ return ~((uint16_t) (sum & 0xffff));
+}
/****************************************************************************
* cmos_checksum_verify
@@ -215,17 +219,18 @@
* Verify that the coreboot CMOS checksum is valid. If checksum is not
* valid then print warning message and exit.
****************************************************************************/
-void cmos_checksum_verify (void)
- { uint16_t computed, actual;
+void cmos_checksum_verify(void)
+{
+ uint16_t computed, actual;
- set_iopl(3);
- computed = cmos_checksum_compute();
- actual = cmos_checksum_read();
- set_iopl(0);
+ set_iopl(3);
+ computed = cmos_checksum_compute();
+ actual = cmos_checksum_read();
+ set_iopl(0);
- if (computed != actual)
- { fprintf(stderr, "%s: Warning: Coreboot CMOS checksum is bad.\n",
- prog_name);
- exit(1);
- }
- }
+ if (computed != actual) {
+ fprintf(stderr, "%s: Warning: Coreboot CMOS checksum is bad.\n",
+ prog_name);
+ exit(1);
+ }
+}
Modified: trunk/util/nvramtool/cmos_ops.h
===================================================================
--- trunk/util/nvramtool/cmos_ops.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/cmos_ops.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -41,12 +41,12 @@
#define CMOS_OP_VALUE_TOO_WIDE (CMOS_OP_RESULT_START + 4)
#define CMOS_OP_NO_MATCHING_ENUM (CMOS_OP_RESULT_START + 5)
-int prepare_cmos_read (const cmos_entry_t *e);
-int prepare_cmos_write (const cmos_entry_t *e, const char value_str[],
- unsigned long long *value);
-uint16_t cmos_checksum_read (void);
-void cmos_checksum_write (uint16_t checksum);
-uint16_t cmos_checksum_compute (void);
-void cmos_checksum_verify (void);
+int prepare_cmos_read(const cmos_entry_t * e);
+int prepare_cmos_write(const cmos_entry_t * e, const char value_str[],
+ unsigned long long *value);
+uint16_t cmos_checksum_read(void);
+void cmos_checksum_write(uint16_t checksum);
+uint16_t cmos_checksum_compute(void);
+void cmos_checksum_verify(void);
-#endif /* CMOS_OPS_H */
+#endif /* CMOS_OPS_H */
Modified: trunk/util/nvramtool/common.c
===================================================================
--- trunk/util/nvramtool/common.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/common.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -42,27 +42,29 @@
* Get a line of input from file 'f'. Store result in 'line' which is an
* array of 'line_buf_size' bytes.
****************************************************************************/
-int get_line_from_file (FILE *f, char line[], int line_buf_size)
- { if (fgets(line, line_buf_size, f) == NULL)
- return LINE_EOF;
+int get_line_from_file(FILE * f, char line[], int line_buf_size)
+{
+ if (fgets(line, line_buf_size, f) == NULL)
+ return LINE_EOF;
- /* If the file contains a line that is too long, then it's best to let the
- * user know right away rather than passing back a truncated result that
- * will lead to problems later on.
- */
- return (strlen(line) == ((size_t) (line_buf_size - 1))) ?
- LINE_TOO_LONG : OK;
- }
+ /* If the file contains a line that is too long, then it's best
+ * to let the user know right away rather than passing back a
+ * truncated result that will lead to problems later on.
+ */
+ return (strlen(line) == ((size_t) (line_buf_size - 1))) ?
+ LINE_TOO_LONG : OK;
+}
/****************************************************************************
* out_of_memory
*
* We ran out of memory. Print an error message and die.
****************************************************************************/
-void out_of_memory (void)
- { fprintf(stderr, "%s: Out of memory.\n", prog_name);
- exit(1);
- }
+void out_of_memory(void)
+{
+ fprintf(stderr, "%s: Out of memory.\n", prog_name);
+ exit(1);
+}
/****************************************************************************
* usage
@@ -70,36 +72,37 @@
* Write a usage message to 'outfile'. If 'outfile' is 'stderr' then exit
* with a value of 1. Otherwise exit with a value of 0.
****************************************************************************/
-void usage (FILE *outfile)
- { fprintf(outfile,
- "Usage: %s [-y LAYOUT_FILE | -t] PARAMETER ...\n\n"
- " Read/write coreboot parameters or show info from "
- "coreboot table.\n\n"
- " -y LAYOUT_FILE: Use CMOS layout specified by "
- "LAYOUT_FILE.\n"
- " -t: Use CMOS layout specified by CMOS option "
- "table.\n"
- " [-n] -r NAME: Show parameter NAME. If -n is given, "
- "show value only.\n"
- " -e NAME: Show all possible values for parameter "
- "NAME.\n"
- " -a: Show names and values for all "
- "parameters.\n"
- " -w NAME=VALUE: Set parameter NAME to VALUE.\n"
- " -p INPUT_FILE: Set parameters according to INPUT_FILE.\n"
- " -i: Same as -p but file contents taken from "
- "standard input.\n"
- " -c [VALUE]: Show CMOS checksum or set checksum to "
- "VALUE.\n"
- " -l [ARG]: Show coreboot table info for ARG, or "
- "all ARG choices.\n"
- " -d: Show low-level dump of coreboot table.\n"
- " -Y: Show CMOS layout info.\n"
- " -b OUTPUT_FILE: Dump CMOS memory contents to file.\n"
- " -B INPUT_FILE: Write file contents to CMOS memory.\n"
- " -x: Show hex dump of CMOS memory.\n"
- " -X DUMPFILE: Show hex dump of CMOS dumpfile.\n"
- " -v: Show version info for this program.\n"
- " -h: Show this message.\n", prog_name);
- exit(outfile == stderr);
- }
+void usage(FILE * outfile)
+{
+ fprintf(outfile,
+ "Usage: %s [-y LAYOUT_FILE | -t] PARAMETER ...\n\n"
+ " Read/write coreboot parameters or show info from "
+ "coreboot table.\n\n"
+ " -y LAYOUT_FILE: Use CMOS layout specified by "
+ "LAYOUT_FILE.\n"
+ " -t: Use CMOS layout specified by CMOS option "
+ "table.\n"
+ " [-n] -r NAME: Show parameter NAME. If -n is given, "
+ "show value only.\n"
+ " -e NAME: Show all possible values for parameter "
+ "NAME.\n"
+ " -a: Show names and values for all "
+ "parameters.\n"
+ " -w NAME=VALUE: Set parameter NAME to VALUE.\n"
+ " -p INPUT_FILE: Set parameters according to INPUT_FILE.\n"
+ " -i: Same as -p but file contents taken from "
+ "standard input.\n"
+ " -c [VALUE]: Show CMOS checksum or set checksum to "
+ "VALUE.\n"
+ " -l [ARG]: Show coreboot table info for ARG, or "
+ "all ARG choices.\n"
+ " -d: Show low-level dump of coreboot table.\n"
+ " -Y: Show CMOS layout info.\n"
+ " -b OUTPUT_FILE: Dump CMOS memory contents to file.\n"
+ " -B INPUT_FILE: Write file contents to CMOS memory.\n"
+ " -x: Show hex dump of CMOS memory.\n"
+ " -X DUMPFILE: Show hex dump of CMOS dumpfile.\n"
+ " -v: Show version info for this program.\n"
+ " -h: Show this message.\n", prog_name);
+ exit(outfile == stderr);
+}
Modified: trunk/util/nvramtool/common.h
===================================================================
--- trunk/util/nvramtool/common.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/common.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -77,7 +77,7 @@
#define CMOS_RESULT_START 0x30000
#define CMOS_OP_RESULT_START 0x40000
-#define OK 0 /* 0 is used universally to indicate success. */
+#define OK 0 /* 0 is used universally to indicate success. */
#define LINE_EOF (COMMON_RESULT_START + 0)
#define LINE_TOO_LONG (COMMON_RESULT_START + 1)
@@ -88,8 +88,8 @@
/* version of this program */
extern const char prog_version[];
-int get_line_from_file (FILE *f, char line[], int line_buf_size);
-void out_of_memory (void);
-void usage (FILE *outfile);
+int get_line_from_file(FILE * f, char line[], int line_buf_size);
+void out_of_memory(void);
+void usage(FILE * outfile);
-#endif /* COMMON_H */
+#endif /* COMMON_H */
Modified: trunk/util/nvramtool/compute_ip_checksum.c
===================================================================
--- trunk/util/nvramtool/compute_ip_checksum.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/compute_ip_checksum.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -13,32 +13,32 @@
unsigned long compute_ip_checksum(void *addr, unsigned long length)
{
- uint8_t *ptr;
- volatile union {
- uint8_t byte[2];
- uint16_t word;
- } value;
- unsigned long sum;
- unsigned long i;
- /* In the most straight forward way possible,
- * compute an ip style checksum.
- */
- sum = 0;
- ptr = addr;
- for(i = 0; i < length; i++) {
- unsigned long value;
- value = ptr[i];
- if (i & 1) {
- value <<= 8;
- }
- /* Add the new value */
- sum += value;
- /* Wrap around the carry */
- if (sum > 0xFFFF) {
- sum = (sum + (sum >> 16)) & 0xFFFF;
- }
- }
- value.byte[0] = sum & 0xff;
- value.byte[1] = (sum >> 8) & 0xff;
- return (~value.word) & 0xFFFF;
+ uint8_t *ptr;
+ volatile union {
+ uint8_t byte[2];
+ uint16_t word;
+ } value;
+ unsigned long sum;
+ unsigned long i;
+ /* In the most straight forward way possible,
+ * compute an ip style checksum.
+ */
+ sum = 0;
+ ptr = addr;
+ for (i = 0; i < length; i++) {
+ unsigned long value;
+ value = ptr[i];
+ if (i & 1) {
+ value <<= 8;
+ }
+ /* Add the new value */
+ sum += value;
+ /* Wrap around the carry */
+ if (sum > 0xFFFF) {
+ sum = (sum + (sum >> 16)) & 0xFFFF;
+ }
+ }
+ value.byte[0] = sum & 0xff;
+ value.byte[1] = (sum >> 8) & 0xff;
+ return (~value.word) & 0xFFFF;
}
Modified: trunk/util/nvramtool/coreboot_tables.h
===================================================================
--- trunk/util/nvramtool/coreboot_tables.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/coreboot_tables.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -59,30 +59,27 @@
static inline uint64_t unpack_lb64(struct lb_uint64 value)
{
- uint64_t result;
- result = value.hi;
- result = (result << 32) + value.lo;
- return result;
+ uint64_t result;
+ result = value.hi;
+ result = (result << 32) + value.lo;
+ return result;
}
static inline struct lb_uint64 pack_lb64(uint64_t value)
{
- struct lb_uint64 result;
- result.lo = (value >> 0) & 0xffffffff;
- result.hi = (value >> 32) & 0xffffffff;
- return result;
+ struct lb_uint64 result;
+ result.lo = (value >> 0) & 0xffffffff;
+ result.hi = (value >> 32) & 0xffffffff;
+ return result;
}
-
-
-struct lb_header
-{
- uint8_t signature[4]; /* LBIO */
- uint32_t header_bytes;
- uint32_t header_checksum;
- uint32_t table_bytes;
- uint32_t table_checksum;
- uint32_t table_entries;
+struct lb_header {
+ uint8_t signature[4]; /* LBIO */
+ uint32_t header_bytes;
+ uint32_t header_checksum;
+ uint32_t table_bytes;
+ uint32_t table_checksum;
+ uint32_t table_entries;
};
/* Every entry in the boot enviroment list will correspond to a boot
@@ -92,8 +89,8 @@
* forward compatibility with records not yet defined.
*/
struct lb_record {
- uint32_t tag; /* tag ID */
- uint32_t size; /* size of record (in bytes) */
+ uint32_t tag; /* tag ID */
+ uint32_t size; /* size of record (in bytes) */
};
#define LB_TAG_UNUSED 0x0000
@@ -103,48 +100,48 @@
struct lb_memory_range {
struct lb_uint64 start;
struct lb_uint64 size;
- uint32_t type;
-#define LB_MEM_RAM 1 /* Memory anyone can use */
-#define LB_MEM_RESERVED 2 /* Don't use this memory region */
-#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */
+ uint32_t type;
+#define LB_MEM_RAM 1 /* Memory anyone can use */
+#define LB_MEM_RESERVED 2 /* Don't use this memory region */
+#define LB_MEM_TABLE 16 /* Ram configuration tables are kept in */
};
struct lb_memory {
- uint32_t tag;
- uint32_t size;
- struct lb_memory_range map[0];
+ uint32_t tag;
+ uint32_t size;
+ struct lb_memory_range map[0];
};
-#define LB_TAG_HWRPB 0x0002
+#define LB_TAG_HWRPB 0x0002
struct lb_hwrpb {
- uint32_t tag;
- uint32_t size;
- uint64_t hwrpb;
+ uint32_t tag;
+ uint32_t size;
+ uint64_t hwrpb;
};
#define LB_TAG_MAINBOARD 0x0003
struct lb_mainboard {
- uint32_t tag;
- uint32_t size;
- uint8_t vendor_idx;
- uint8_t part_number_idx;
- uint8_t strings[0];
+ uint32_t tag;
+ uint32_t size;
+ uint8_t vendor_idx;
+ uint8_t part_number_idx;
+ uint8_t strings[0];
};
-#define LB_TAG_VERSION 0x0004
-#define LB_TAG_EXTRA_VERSION 0x0005
-#define LB_TAG_BUILD 0x0006
-#define LB_TAG_COMPILE_TIME 0x0007
-#define LB_TAG_COMPILE_BY 0x0008
-#define LB_TAG_COMPILE_HOST 0x0009
-#define LB_TAG_COMPILE_DOMAIN 0x000a
-#define LB_TAG_COMPILER 0x000b
-#define LB_TAG_LINKER 0x000c
+#define LB_TAG_VERSION 0x0004
+#define LB_TAG_EXTRA_VERSION 0x0005
+#define LB_TAG_BUILD 0x0006
+#define LB_TAG_COMPILE_TIME 0x0007
+#define LB_TAG_COMPILE_BY 0x0008
+#define LB_TAG_COMPILE_HOST 0x0009
+#define LB_TAG_COMPILE_DOMAIN 0x000a
+#define LB_TAG_COMPILER 0x000b
+#define LB_TAG_LINKER 0x000c
#define LB_TAG_ASSEMBLER 0x000d
struct lb_string {
- uint32_t tag;
- uint32_t size;
- uint8_t string[0];
+ uint32_t tag;
+ uint32_t size;
+ uint8_t string[0];
};
#define LB_TAG_SERIAL 0x000f
#define LB_TAG_CONSOLE 0x0010
@@ -159,9 +156,9 @@
#define LB_TAG_CMOS_OPTION_TABLE 200
/* cmos header record */
struct cmos_option_table {
- uint32_t tag; /* CMOS definitions table type */
- uint32_t size; /* size of the entire table */
- uint32_t header_length; /* length of header */
+ uint32_t tag; /* CMOS definitions table type */
+ uint32_t size; /* size of the entire table */
+ uint32_t header_length; /* length of header */
};
/* cmos entry record
@@ -173,31 +170,30 @@
*/
#define LB_TAG_OPTION 201
struct cmos_entries {
- uint32_t tag; /* entry type */
- uint32_t size; /* length of this record */
- uint32_t bit; /* starting bit from start of image */
- uint32_t length; /* length of field in bits */
- uint32_t config; /* e=enumeration, h=hex, r=reserved */
- uint32_t config_id; /* a number linking to an enumeration record */
+ uint32_t tag; /* entry type */
+ uint32_t size; /* length of this record */
+ uint32_t bit; /* starting bit from start of image */
+ uint32_t length; /* length of field in bits */
+ uint32_t config; /* e=enumeration, h=hex, r=reserved */
+ uint32_t config_id; /* a number linking to an enumeration record */
#define CMOS_MAX_NAME_LENGTH 32
- uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
- variable length int aligned */
+ uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name of entry in ascii,
+ variable length int aligned */
};
-
/* cmos enumerations record
This record is variable length. The text field may be
shorter than CMOS_MAX_TEXT_LENGTH.
*/
#define LB_TAG_OPTION_ENUM 202
struct cmos_enums {
- uint32_t tag; /* enumeration type */
- uint32_t size; /* length of this record */
- uint32_t config_id; /* a number identifying the config id */
- uint32_t value; /* the value associated with the text */
+ uint32_t tag; /* enumeration type */
+ uint32_t size; /* length of this record */
+ uint32_t config_id; /* a number identifying the config id */
+ uint32_t value; /* the value associated with the text */
#define CMOS_MAX_TEXT_LENGTH 32
- uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
- variable length int aligned */
+ uint8_t text[CMOS_MAX_TEXT_LENGTH]; /* enum description in ascii,
+ variable length int aligned */
};
/* cmos defaults record
@@ -205,16 +201,16 @@
*/
#define LB_TAG_OPTION_DEFAULTS 203
struct cmos_defaults {
- uint32_t tag; /* default type */
- uint32_t size; /* length of this record */
- uint32_t name_length; /* length of the following name field */
- uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */
+ uint32_t tag; /* default type */
+ uint32_t size; /* length of this record */
+ uint32_t name_length; /* length of the following name field */
+ uint8_t name[CMOS_MAX_NAME_LENGTH]; /* name identifying the default */
#define CMOS_IMAGE_BUFFER_SIZE 128
- uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */
+ uint8_t default_set[CMOS_IMAGE_BUFFER_SIZE]; /* default settings */
};
#define LB_TAG_OPTION_CHECKSUM 204
-struct cmos_checksum {
+struct cmos_checksum {
uint32_t tag;
uint32_t size;
/* In practice everything is byte aligned, but things are measured
@@ -228,6 +224,4 @@
#define CHECKSUM_PCBIOS 1
};
-
-
-#endif /* COREBOOT_TABLES_H */
+#endif /* COREBOOT_TABLES_H */
Modified: trunk/util/nvramtool/hexdump.c
===================================================================
--- trunk/util/nvramtool/hexdump.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/hexdump.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -43,11 +43,11 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-static void addrprint (FILE *outfile, uint64_t address, int width);
-static void hexprint (FILE *outfile, unsigned char byte);
-static void charprint (FILE *outfile, unsigned char byte,
- unsigned char nonprintable,
- is_printable_fn_t is_printable_fn);
+static void addrprint(FILE * outfile, uint64_t address, int width);
+static void hexprint(FILE * outfile, unsigned char byte);
+static void charprint(FILE * outfile, unsigned char byte,
+ unsigned char nonprintable,
+ is_printable_fn_t is_printable_fn);
/*--------------------------------------------------------------------------
* hexdump
@@ -65,95 +65,98 @@
* format: A structure specifying how the hex dump should be
* formatted.
*--------------------------------------------------------------------------*/
-void hexdump (const void *mem, int bytes, uint64_t addrprint_start,
- FILE *outfile, const hexdump_format_t *format)
- { int bytes_left, index, i;
- const unsigned char *p;
- is_printable_fn_t is_printable_fn;
+void hexdump(const void *mem, int bytes, uint64_t addrprint_start,
+ FILE * outfile, const hexdump_format_t * format)
+{
+ int bytes_left, index, i;
+ const unsigned char *p;
+ is_printable_fn_t is_printable_fn;
- /* Quietly return if the caller asks us to do something unreasonable. */
- if ((format->bytes_per_line <= 0) || (bytes < 0))
- return;
+ /* Quietly return if the caller asks us to do something unreasonable. */
+ if ((format->bytes_per_line <= 0) || (bytes < 0))
+ return;
- is_printable_fn = format->is_printable_fn;
+ is_printable_fn = format->is_printable_fn;
- if (is_printable_fn == NULL)
- is_printable_fn = default_is_printable_fn;
+ if (is_printable_fn == NULL)
+ is_printable_fn = default_is_printable_fn;
- p = (const unsigned char *) mem;
- index = 0;
+ p = (const unsigned char *)mem;
+ index = 0;
- /* Each iteration handles one full line of output. When loop terminates,
- * the number of remaining bytes to display (if any) will not be enough to
- * fill an entire line.
- */
- for (bytes_left = bytes;
- bytes_left >= format->bytes_per_line;
- bytes_left -= format->bytes_per_line)
- { /* print start address for current line */
- fprintf(outfile, format->indent);
- addrprint(outfile, addrprint_start + index, format->addrprint_width);
- fprintf(outfile, format->sep1);
+ /* Each iteration handles one full line of output. When loop
+ * terminates, the number of remaining bytes to display (if any)
+ * will not be enough to fill an entire line.
+ */
+ for (bytes_left = bytes;
+ bytes_left >= format->bytes_per_line;
+ bytes_left -= format->bytes_per_line) {
+ /* print start address for current line */
+ fprintf(outfile, format->indent);
+ addrprint(outfile, addrprint_start + index,
+ format->addrprint_width);
+ fprintf(outfile, format->sep1);
- /* display the bytes in hex */
- for (i = 0; ; )
- { hexprint(outfile, p[index++]);
+ /* display the bytes in hex */
+ for (i = 0;;) {
+ hexprint(outfile, p[index++]);
- if (++i >= format->bytes_per_line)
- break;
+ if (++i >= format->bytes_per_line)
+ break;
- fprintf(outfile, format->sep2);
- }
+ fprintf(outfile, format->sep2);
+ }
- index -= format->bytes_per_line;
- fprintf(outfile, format->sep3);
+ index -= format->bytes_per_line;
+ fprintf(outfile, format->sep3);
- /* display the bytes as characters */
- for (i = 0; i < format->bytes_per_line; i++)
- charprint(outfile, p[index++], format->nonprintable,
- is_printable_fn);
+ /* display the bytes as characters */
+ for (i = 0; i < format->bytes_per_line; i++)
+ charprint(outfile, p[index++], format->nonprintable,
+ is_printable_fn);
- fprintf(outfile, "\n");
- }
+ fprintf(outfile, "\n");
+ }
- if (bytes_left == 0)
- return;
+ if (bytes_left == 0)
+ return;
- /* print start address for last line */
- fprintf(outfile, format->indent);
- addrprint(outfile, addrprint_start + index, format->addrprint_width);
- fprintf(outfile, format->sep1);
+ /* print start address for last line */
+ fprintf(outfile, format->indent);
+ addrprint(outfile, addrprint_start + index, format->addrprint_width);
+ fprintf(outfile, format->sep1);
- /* display bytes for last line in hex */
- for (i = 0; i < bytes_left; i++)
- { hexprint(outfile, p[index++]);
- fprintf(outfile, format->sep2);
- }
+ /* display bytes for last line in hex */
+ for (i = 0; i < bytes_left; i++) {
+ hexprint(outfile, p[index++]);
+ fprintf(outfile, format->sep2);
+ }
- index -= bytes_left;
+ index -= bytes_left;
- /* pad the rest of the hex byte area with spaces */
- for (; ; )
- { fprintf(outfile, " ");
+ /* pad the rest of the hex byte area with spaces */
+ for (;;) {
+ fprintf(outfile, " ");
- if (++i >= format->bytes_per_line)
- break;
+ if (++i >= format->bytes_per_line)
+ break;
- fprintf(outfile, format->sep2);
- }
+ fprintf(outfile, format->sep2);
+ }
- fprintf(outfile, format->sep3);
+ fprintf(outfile, format->sep3);
- /* display bytes for last line as characters */
- for (i = 0; i < bytes_left; i++)
- charprint(outfile, p[index++], format->nonprintable, is_printable_fn);
+ /* display bytes for last line as characters */
+ for (i = 0; i < bytes_left; i++)
+ charprint(outfile, p[index++], format->nonprintable,
+ is_printable_fn);
- /* pad the rest of the character area with spaces */
- for (; i < format->bytes_per_line; i++)
- fprintf(outfile, " ");
+ /* pad the rest of the character area with spaces */
+ for (; i < format->bytes_per_line; i++)
+ fprintf(outfile, " ");
- fprintf(outfile, "\n");
- }
+ fprintf(outfile, "\n");
+}
/*--------------------------------------------------------------------------
* default_is_printable_fn
@@ -169,8 +172,10 @@
* return value:
* Return 1 if the input character is printable. Otherwise return 0.
*--------------------------------------------------------------------------*/
-int default_is_printable_fn (unsigned char c)
- { return (c >= 0x20) && (c <= 0x7e); }
+int default_is_printable_fn(unsigned char c)
+{
+ return (c >= 0x20) && (c <= 0x7e);
+}
/*--------------------------------------------------------------------------
* addrprint
@@ -183,32 +188,33 @@
* width: The number of bytes wide the address should be displayed as.
* Must be a value from 1 to 8.
*--------------------------------------------------------------------------*/
-static void addrprint (FILE *outfile, uint64_t address, int width)
- { char s[17];
- int i;
+static void addrprint(FILE * outfile, uint64_t address, int width)
+{
+ char s[17];
+ int i;
- /* force the user's input to be valid */
- if (width < 1)
- width = 1;
- else if (width > 8)
- width = 8;
+ /* force the user's input to be valid */
+ if (width < 1)
+ width = 1;
+ else if (width > 8)
+ width = 8;
- /* convert address to string */
- sprintf(s, "%016llx", (unsigned long long) address);
+ /* convert address to string */
+ sprintf(s, "%016llx", (unsigned long long)address);
- /* write it out, with colons separating consecutive 16-bit chunks of the
- * address
- */
- for (i = 16 - (2 * width); ; )
- { fprintf(outfile, "%c", s[i]);
+ /* write it out, with colons separating consecutive 16-bit
+ * chunks of the address
+ */
+ for (i = 16 - (2 * width);;) {
+ fprintf(outfile, "%c", s[i]);
- if (++i >= 16)
- break;
+ if (++i >= 16)
+ break;
- if ((i % 4) == 0)
- fprintf(outfile, ":");
- }
- }
+ if ((i % 4) == 0)
+ fprintf(outfile, ":");
+ }
+}
/*--------------------------------------------------------------------------
* hexprint
@@ -219,14 +225,15 @@
* outfile: the place where the output should be written
* byte: the byte to display
*--------------------------------------------------------------------------*/
-static void hexprint (FILE *outfile, unsigned char byte)
- { static const char tbl[] =
- { '0', '1', '2', '3', '4', '5', '6', '7',
- '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'
- };
+static void hexprint(FILE * outfile, unsigned char byte)
+{
+ static const char tbl[] = {
+ '0', '1', '2', '3', '4', '5', '6', '7',
+ '8', '9', 'a', 'b', 'c', 'd', 'e', 'f'
+ };
- fprintf(outfile, "%c%c", tbl[byte >> 4], tbl[byte & 0x0f]);
- }
+ fprintf(outfile, "%c%c", tbl[byte >> 4], tbl[byte & 0x0f]);
+}
/*--------------------------------------------------------------------------
* charprint
@@ -241,7 +248,9 @@
* is_printable_fn: a function that returns a boolean value indicating
* whether a given character is printable
*--------------------------------------------------------------------------*/
-static void charprint (FILE *outfile, unsigned char byte,
- unsigned char nonprintable,
- is_printable_fn_t is_printable_fn)
- { fprintf(outfile, "%c", is_printable_fn(byte) ? byte : nonprintable); }
+static void charprint(FILE * outfile, unsigned char byte,
+ unsigned char nonprintable,
+ is_printable_fn_t is_printable_fn)
+{
+ fprintf(outfile, "%c", is_printable_fn(byte) ? byte : nonprintable);
+}
Modified: trunk/util/nvramtool/hexdump.h
===================================================================
--- trunk/util/nvramtool/hexdump.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/hexdump.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -81,17 +81,16 @@
* printable. A value of NULL will cause
* default_is_printable_fn to be used.
*--------------------------------------------------------------------------*/
-typedef struct
- { int bytes_per_line;
- int addrprint_width;
- const char *indent;
- const char *sep1;
- const char *sep2;
- const char *sep3;
- unsigned char nonprintable;
- is_printable_fn_t is_printable_fn;
- }
-hexdump_format_t;
+typedef struct {
+ int bytes_per_line;
+ int addrprint_width;
+ const char *indent;
+ const char *sep1;
+ const char *sep2;
+ const char *sep3;
+ unsigned char nonprintable;
+ is_printable_fn_t is_printable_fn;
+} hexdump_format_t;
/*--------------------------------------------------------------------------
* hexdump
@@ -109,8 +108,8 @@
* format: A structure specifying how the hex dump should be
* formatted.
*--------------------------------------------------------------------------*/
-void hexdump (const void *mem, int bytes, uint64_t addrprint_start,
- FILE *outfile, const hexdump_format_t *format);
+void hexdump(const void *mem, int bytes, uint64_t addrprint_start,
+ FILE * outfile, const hexdump_format_t * format);
/*--------------------------------------------------------------------------
* default_is_printable_fn
@@ -126,6 +125,6 @@
* return value:
* Return 1 if the input character is printable. Otherwise return 0.
*--------------------------------------------------------------------------*/
-int default_is_printable_fn (unsigned char c);
+int default_is_printable_fn(unsigned char c);
-#endif /* _HEXDUMP_H */
+#endif /* _HEXDUMP_H */
Modified: trunk/util/nvramtool/input_file.c
===================================================================
--- trunk/util/nvramtool/input_file.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/input_file.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -35,38 +35,35 @@
#include "cmos_lowlevel.h"
#include "reg_expr.h"
-static int get_input_file_line (FILE *f, char line[], int line_buf_size);
-static unsigned long long try_prepare_cmos_write (const cmos_entry_t *e,
- const char value_str[]);
+static int get_input_file_line(FILE * f, char line[], int line_buf_size);
+static unsigned long long try_prepare_cmos_write(const cmos_entry_t * e,
+ const char value_str[]);
/* matches either a blank line or a comment line */
static const char blank_or_comment_regex[] =
- /* a blank line */
- "(^[[:space:]]+$)"
+ /* a blank line */
+ "(^[[:space:]]+$)" "|" /* or ... */
+ /* a line consisting of: optional whitespace followed by */
+ "(^[[:space:]]*"
+ /* a '#' character and optionally, additional characters */
+ "#.*$)";
- "|" /* or ... */
-
- /* a line consisting of: optional whitespace followed by */
- "(^[[:space:]]*"
- /* a '#' character and optionally, additional characters */
- "#.*$)";
-
/* matches an assignment line */
const char assignment_regex[] =
- /* optional whitespace */
- "^[[:space:]]*"
- /* followed by a coreboot parameter name */
- "([^[:space:]]+)"
- /* followed by optional whitespace */
- "[[:space:]]*"
- /* followed by an '=' character */
- "="
- /* followed by optional whitespace */
- "[[:space:]]*"
- /* followed by a value that may contain embedded whitespace */
- "([^[:space:]]+([[:space:]]+[^[:space:]]+)*)+"
- /* followed by optional whitespace */
- "[[:space:]]*$";
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by a coreboot parameter name */
+ "([^[:space:]]+)"
+ /* followed by optional whitespace */
+ "[[:space:]]*"
+ /* followed by an '=' character */
+ "="
+ /* followed by optional whitespace */
+ "[[:space:]]*"
+ /* followed by a value that may contain embedded whitespace */
+ "([^[:space:]]+([[:space:]]+[^[:space:]]+)*)+"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
static int line_num;
@@ -77,77 +74,77 @@
* write operations. Perform sanity checking on all write operations and
* exit with an error message if there is a problem.
****************************************************************************/
-cmos_write_t * process_input_file (FILE *f)
- {
- static const int LINE_BUF_SIZE = 256;
- static const size_t N_MATCHES = 4;
- char line[LINE_BUF_SIZE];
- const char *name, *value;
- cmos_write_t *list, *item, **p;
- regex_t blank_or_comment, assignment;
- regmatch_t match[N_MATCHES];
- const cmos_entry_t *e;
+cmos_write_t *process_input_file(FILE * f)
+{
+ static const int LINE_BUF_SIZE = 256;
+ static const size_t N_MATCHES = 4;
+ char line[LINE_BUF_SIZE];
+ const char *name, *value;
+ cmos_write_t *list, *item, **p;
+ regex_t blank_or_comment, assignment;
+ regmatch_t match[N_MATCHES];
+ const cmos_entry_t *e;
- list = NULL;
- p = &list;
+ list = NULL;
+ p = &list;
- compile_reg_exprs(REG_EXTENDED | REG_NEWLINE, 2, blank_or_comment_regex,
- &blank_or_comment, assignment_regex, &assignment);
+ compile_reg_exprs(REG_EXTENDED | REG_NEWLINE, 2, blank_or_comment_regex,
+ &blank_or_comment, assignment_regex, &assignment);
- /* each iteration processes one line from input file */
- for (line_num = 1;
- get_input_file_line(f, line, LINE_BUF_SIZE) == OK;
- line_num++)
- { /* skip comments and blank lines */
- if (!regexec(&blank_or_comment, line, 0, NULL, 0))
- continue;
+ /* each iteration processes one line from input file */
+ for (line_num = 1; get_input_file_line(f, line, LINE_BUF_SIZE) == OK; line_num++) { /* skip comments and blank lines */
+ if (!regexec(&blank_or_comment, line, 0, NULL, 0))
+ continue;
- /* Is this a valid assignment line? If not, then it's a syntax
- * error.
- */
- if (regexec(&assignment, line, N_MATCHES, match, 0))
- { fprintf(stderr, "%s: Syntax error on line %d of input file.\n",
- prog_name, line_num);
- exit(1);
- }
+ /* Is this a valid assignment line? If not, then it's a syntax
+ * error.
+ */
+ if (regexec(&assignment, line, N_MATCHES, match, 0)) {
+ fprintf(stderr,
+ "%s: Syntax error on line %d of input file.\n",
+ prog_name, line_num);
+ exit(1);
+ }
- /* OK, we found an assignment. Break the line into substrings
- * representing the lefthand and righthand sides of the assignment.
- */
- line[match[1].rm_eo] = '\0';
- line[match[2].rm_eo] = '\0';
- name = &line[match[1].rm_so];
- value = &line[match[2].rm_so];
+ /* OK, we found an assignment. Break the line into substrings
+ * representing the lefthand and righthand sides of the assignment.
+ */
+ line[match[1].rm_eo] = '\0';
+ line[match[2].rm_eo] = '\0';
+ name = &line[match[1].rm_so];
+ value = &line[match[2].rm_so];
- /* now look up the coreboot parameter name */
- if (is_checksum_name(name) || (e = find_cmos_entry(name)) == NULL)
- { fprintf(stderr, "%s: Error on line %d of input file: CMOS parameter "
- "%s not found.\n", prog_name, line_num, name);
- exit(1);
- }
+ /* now look up the coreboot parameter name */
+ if (is_checksum_name(name)
+ || (e = find_cmos_entry(name)) == NULL) {
+ fprintf(stderr,
+ "%s: Error on line %d of input file: CMOS parameter "
+ "%s not found.\n", prog_name, line_num, name);
+ exit(1);
+ }
- /* At this point, we figure out what numeric value needs to be written
- * to which location. At the same time, we perform sanity checking on
- * the write operation.
- */
+ /* At this point, we figure out what numeric value needs to be written
+ * to which location. At the same time, we perform sanity checking on
+ * the write operation.
+ */
- if ((item = (cmos_write_t *) malloc(sizeof(*item))) == NULL)
- out_of_memory();
+ if ((item = (cmos_write_t *) malloc(sizeof(*item))) == NULL)
+ out_of_memory();
- item->bit = e->bit;
- item->length = e->length;
- item->config = e->config;
- item->value = try_prepare_cmos_write(e, value);
+ item->bit = e->bit;
+ item->length = e->length;
+ item->config = e->config;
+ item->value = try_prepare_cmos_write(e, value);
- /* Append write operation to pending write list. */
- item->next = NULL;
- *p = item;
- p = &item->next;
- }
+ /* Append write operation to pending write list. */
+ item->next = NULL;
+ *p = item;
+ p = &item->next;
+ }
- free_reg_exprs(2, &blank_or_comment, &assignment);
- return list;
- }
+ free_reg_exprs(2, &blank_or_comment, &assignment);
+ return list;
+}
/****************************************************************************
* do_cmos_writes
@@ -156,25 +153,26 @@
* all sanity checks. Perform all write operations, destroying the list as
* we go.
****************************************************************************/
-void do_cmos_writes (cmos_write_t *list)
- { cmos_write_t *item;
+void do_cmos_writes(cmos_write_t * list)
+{
+ cmos_write_t *item;
- set_iopl(3);
+ set_iopl(3);
- while (list != NULL)
- { cmos_entry_t e;
- item = list;
- e.bit = item->bit;
- e.length = item->length;
- e.config = item->config;
- list = item->next;
- cmos_write(&e, item->value);
- free(item);
- }
+ while (list != NULL) {
+ cmos_entry_t e;
+ item = list;
+ e.bit = item->bit;
+ e.length = item->length;
+ e.config = item->config;
+ list = item->next;
+ cmos_write(&e, item->value);
+ free(item);
+ }
- cmos_checksum_write(cmos_checksum_compute());
- set_iopl(0);
- }
+ cmos_checksum_write(cmos_checksum_compute());
+ set_iopl(0);
+}
/****************************************************************************
* get_input_file_line
@@ -183,27 +181,29 @@
* array of 'line_buf_size' bytes. Return OK on success or an error code on
* error.
****************************************************************************/
-static int get_input_file_line (FILE *f, char line[], int line_buf_size)
- { switch (get_line_from_file(f, line, line_buf_size))
- { case OK:
- return OK;
+static int get_input_file_line(FILE * f, char line[], int line_buf_size)
+{
+ switch (get_line_from_file(f, line, line_buf_size)) {
+ case OK:
+ return OK;
- case LINE_EOF:
- return LINE_EOF;
+ case LINE_EOF:
+ return LINE_EOF;
- case LINE_TOO_LONG:
- fprintf(stderr, "%s: Error on line %d of input file: Maximum line "
- "length exceeded. Max is %d characters.\n", prog_name,
- line_num, line_buf_size - 2);
- break;
+ case LINE_TOO_LONG:
+ fprintf(stderr,
+ "%s: Error on line %d of input file: Maximum line "
+ "length exceeded. Max is %d characters.\n", prog_name,
+ line_num, line_buf_size - 2);
+ break;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- exit(1);
- return 1; /* keep compiler happy */
- }
+ exit(1);
+ return 1; /* keep compiler happy */
+}
/****************************************************************************
* try_prepare_cmos_write
@@ -212,73 +212,83 @@
* CMOS memory. On success, return the converted value. On error, exit with
* an error message.
****************************************************************************/
-static unsigned long long try_prepare_cmos_write (const cmos_entry_t *e,
- const char value_str[])
- { unsigned long long value;
+static unsigned long long try_prepare_cmos_write(const cmos_entry_t * e,
+ const char value_str[])
+{
+ unsigned long long value;
- switch (prepare_cmos_write(e, value_str, &value))
- { case OK:
- return value;
+ switch (prepare_cmos_write(e, value_str, &value)) {
+ case OK:
+ return value;
- case CMOS_OP_BAD_ENUM_VALUE:
- fprintf(stderr, "%s: Error on line %d of input file: Bad value for "
- "parameter %s.", prog_name, line_num, e->name);
- break;
+ case CMOS_OP_BAD_ENUM_VALUE:
+ fprintf(stderr,
+ "%s: Error on line %d of input file: Bad value for "
+ "parameter %s.", prog_name, line_num, e->name);
+ break;
- case CMOS_OP_NEGATIVE_INT:
- fprintf(stderr, "%s: Error on line %d of input file: This program "
- "does not support assignment of negative numbers to "
- "coreboot parameters.", prog_name, line_num);
- break;
+ case CMOS_OP_NEGATIVE_INT:
+ fprintf(stderr,
+ "%s: Error on line %d of input file: This program "
+ "does not support assignment of negative numbers to "
+ "coreboot parameters.", prog_name, line_num);
+ break;
- case CMOS_OP_INVALID_INT:
- fprintf(stderr, "%s: Error on line %d of input file: %s is not a "
- "valid integer.", prog_name, line_num, value_str);
- break;
+ case CMOS_OP_INVALID_INT:
+ fprintf(stderr,
+ "%s: Error on line %d of input file: %s is not a "
+ "valid integer.", prog_name, line_num, value_str);
+ break;
- case CMOS_OP_RESERVED:
- fprintf(stderr, "%s: Error on line %d of input file: Can not modify "
- "reserved coreboot parameter %s.", prog_name, line_num,
- e->name);
- break;
+ case CMOS_OP_RESERVED:
+ fprintf(stderr,
+ "%s: Error on line %d of input file: Can not modify "
+ "reserved coreboot parameter %s.", prog_name, line_num,
+ e->name);
+ break;
- case CMOS_OP_VALUE_TOO_WIDE:
- fprintf(stderr, "%s: Error on line %d of input file: Can not write "
- "value %s to CMOS parameter %s that is only %d bits wide.",
- prog_name, line_num, value_str, e->name, e->length);
- break;
+ case CMOS_OP_VALUE_TOO_WIDE:
+ fprintf(stderr,
+ "%s: Error on line %d of input file: Can not write "
+ "value %s to CMOS parameter %s that is only %d bits wide.",
+ prog_name, line_num, value_str, e->name, e->length);
+ break;
- case CMOS_OP_NO_MATCHING_ENUM:
- fprintf(stderr, "%s: coreboot parameter %s has no matching enums.",
- prog_name, e->name);
- break;
+ case CMOS_OP_NO_MATCHING_ENUM:
+ fprintf(stderr,
+ "%s: coreboot parameter %s has no matching enums.",
+ prog_name, e->name);
+ break;
- case CMOS_AREA_OUT_OF_RANGE:
- fprintf(stderr, "%s: The CMOS area specified by the layout info for "
- "coreboot parameter %s is out of range.", prog_name,
- e->name);
- break;
+ case CMOS_AREA_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: The CMOS area specified by the layout info for "
+ "coreboot parameter %s is out of range.", prog_name,
+ e->name);
+ break;
- case CMOS_AREA_OVERLAPS_RTC:
- fprintf(stderr, "%s: The CMOS area specified by the layout info for "
- "coreboot parameter %s overlaps the realtime clock area.",
- prog_name, e->name);
- break;
+ case CMOS_AREA_OVERLAPS_RTC:
+ fprintf(stderr,
+ "%s: The CMOS area specified by the layout info for "
+ "coreboot parameter %s overlaps the realtime clock area.",
+ prog_name, e->name);
+ break;
- case CMOS_AREA_TOO_WIDE:
- fprintf(stderr, "%s: The CMOS area specified by the layout info for "
- "coreboot parameter %s is too wide.",
- prog_name, e->name);
- break;
+ case CMOS_AREA_TOO_WIDE:
+ fprintf(stderr,
+ "%s: The CMOS area specified by the layout info for "
+ "coreboot parameter %s is too wide.", prog_name,
+ e->name);
+ break;
- default:
- fprintf(stderr,
- "%s: Unknown error encountered while attempting to modify "
- "coreboot parameter %s.", prog_name, e->name);
- break;
- }
+ default:
+ fprintf(stderr,
+ "%s: Unknown error encountered while attempting to modify "
+ "coreboot parameter %s.", prog_name, e->name);
+ break;
+ }
- fprintf(stderr, " No CMOS writes performed.\n");
- exit(1);
- return 0; /* keep compiler happy */
- }
+ fprintf(stderr, " No CMOS writes performed.\n");
+ exit(1);
+ return 0; /* keep compiler happy */
+}
Modified: trunk/util/nvramtool/input_file.h
===================================================================
--- trunk/util/nvramtool/input_file.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/input_file.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -36,22 +36,22 @@
typedef struct cmos_write_t cmos_write_t;
-/* This represents a pending CMOS write operation. When changing multiple
- * CMOS parameter values, we first represent the changes as a list of pending
- * write operations. This allows us to sanity check all write operations
- * before any of them are performed.
+/* This represents a pending CMOS write operation. When changing
+ * multiple CMOS parameter values, we first represent the changes as a
+ * list of pending write operations. This allows us to sanity check all
+ * write operations before any of them are performed.
*/
-struct cmos_write_t
- { unsigned bit;
- unsigned length;
- cmos_entry_config_t config;
- unsigned long long value;
- cmos_write_t *next;
- };
+struct cmos_write_t {
+ unsigned bit;
+ unsigned length;
+ cmos_entry_config_t config;
+ unsigned long long value;
+ cmos_write_t *next;
+};
-cmos_write_t * process_input_file (FILE *f);
-void do_cmos_writes (cmos_write_t *list);
+cmos_write_t *process_input_file(FILE * f);
+void do_cmos_writes(cmos_write_t * list);
extern const char assignment_regex[];
-#endif /* INPUT_FILE_H */
+#endif /* INPUT_FILE_H */
Modified: trunk/util/nvramtool/ip_checksum.h
===================================================================
--- trunk/util/nvramtool/ip_checksum.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/ip_checksum.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -13,4 +13,4 @@
unsigned long compute_ip_checksum(void *addr, unsigned long length);
-#endif /* IP_CHECKSUM_H */
+#endif /* IP_CHECKSUM_H */
Modified: trunk/util/nvramtool/layout.c
===================================================================
--- trunk/util/nvramtool/layout.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/layout.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -34,23 +34,23 @@
typedef struct cmos_entry_item_t cmos_entry_item_t;
-struct cmos_entry_item_t
- { cmos_entry_t item;
- cmos_entry_item_t *next;
- };
+struct cmos_entry_item_t {
+ cmos_entry_t item;
+ cmos_entry_item_t *next;
+};
typedef struct cmos_enum_item_t cmos_enum_item_t;
-struct cmos_enum_item_t
- { cmos_enum_t item;
- cmos_enum_item_t *next;
- };
+struct cmos_enum_item_t {
+ cmos_enum_t item;
+ cmos_enum_item_t *next;
+};
-static void default_cmos_layout_get_fn (void);
-static int areas_overlap (unsigned area_0_start, unsigned area_0_length,
- unsigned area_1_start, unsigned area_1_length);
-static int entries_overlap (const cmos_entry_t *p, const cmos_entry_t *q);
-static const cmos_enum_item_t * find_first_cmos_enum_id (unsigned config_id);
+static void default_cmos_layout_get_fn(void);
+static int areas_overlap(unsigned area_0_start, unsigned area_0_length,
+ unsigned area_1_start, unsigned area_1_length);
+static int entries_overlap(const cmos_entry_t * p, const cmos_entry_t * q);
+static const cmos_enum_item_t *find_first_cmos_enum_id(unsigned config_id);
const char checksum_param_name[] = "check_sum";
@@ -99,39 +99,41 @@
*
* Return 1 if cmos entries 'p' and 'q' overlap. Else return 0.
****************************************************************************/
-static inline int entries_overlap (const cmos_entry_t *p,
- const cmos_entry_t *q)
- { return areas_overlap(p->bit, p->length, q->bit, q->length); }
+static inline int entries_overlap(const cmos_entry_t * p,
+ const cmos_entry_t * q)
+{
+ return areas_overlap(p->bit, p->length, q->bit, q->length);
+}
/****************************************************************************
* cmos_entry_to_const_item
*
* Return a pointer to the cmos_entry_item_t that 'p' is embedded within.
****************************************************************************/
-static inline const cmos_entry_item_t * cmos_entry_to_const_item
- (const cmos_entry_t *p)
- { static const cmos_entry_t *pos = &((cmos_entry_item_t *) 0)->item;
- unsigned long offset, address;
+static inline const cmos_entry_item_t *cmos_entry_to_const_item
+ (const cmos_entry_t * p) {
+ static const cmos_entry_t *pos = &((cmos_entry_item_t *) 0)->item;
+ unsigned long offset, address;
- offset = (unsigned long) pos;
- address = ((unsigned long) p) - offset;
- return (const cmos_entry_item_t *) address;
- }
+ offset = (unsigned long)pos;
+ address = ((unsigned long)p) - offset;
+ return (const cmos_entry_item_t *)address;
+}
/****************************************************************************
* cmos_enum_to_const_item
*
* Return a pointer to the cmos_enum_item_t that 'p' is embedded within.
****************************************************************************/
-static inline const cmos_enum_item_t * cmos_enum_to_const_item
- (const cmos_enum_t *p)
- { static const cmos_enum_t *pos = &((cmos_enum_item_t *) 0)->item;
- unsigned long offset, address;
+static inline const cmos_enum_item_t *cmos_enum_to_const_item
+ (const cmos_enum_t * p) {
+ static const cmos_enum_t *pos = &((cmos_enum_item_t *) 0)->item;
+ unsigned long offset, address;
- offset = (unsigned long) pos;
- address = ((unsigned long) p) - offset;
- return (const cmos_enum_item_t *) address;
- }
+ offset = (unsigned long)pos;
+ address = ((unsigned long)p) - offset;
+ return (const cmos_enum_item_t *)address;
+}
/****************************************************************************
* register_cmos_layout_get_fn
@@ -139,16 +141,20 @@
* Set 'fn' as the function that will be called to retrieve CMOS layout
* information.
****************************************************************************/
-void register_cmos_layout_get_fn (cmos_layout_get_fn_t fn)
- { cmos_layout_get_fn = fn; }
+void register_cmos_layout_get_fn(cmos_layout_get_fn_t fn)
+{
+ cmos_layout_get_fn = fn;
+}
/****************************************************************************
* get_cmos_layout
*
* Retrieve CMOS layout information and store it in our internal repository.
****************************************************************************/
-void get_cmos_layout (void)
- { cmos_layout_get_fn(); }
+void get_cmos_layout(void)
+{
+ cmos_layout_get_fn();
+}
/****************************************************************************
* add_cmos_entry
@@ -158,61 +164,63 @@
* operation fails because 'e' overlaps an existing CMOS entry, '*conflict'
* will be set to point to the overlapping entry.
****************************************************************************/
-int add_cmos_entry (const cmos_entry_t *e, const cmos_entry_t **conflict)
- { cmos_entry_item_t *item, *prev, *new_entry;
+int add_cmos_entry(const cmos_entry_t * e, const cmos_entry_t ** conflict)
+{
+ cmos_entry_item_t *item, *prev, *new_entry;
- *conflict = NULL;
+ *conflict = NULL;
- if (e->length < 1)
- return LAYOUT_ENTRY_BAD_LENGTH;
+ if (e->length < 1)
+ return LAYOUT_ENTRY_BAD_LENGTH;
- if ((new_entry = (cmos_entry_item_t *) malloc(sizeof(*new_entry))) == NULL)
- out_of_memory();
+ if ((new_entry =
+ (cmos_entry_item_t *) malloc(sizeof(*new_entry))) == NULL)
+ out_of_memory();
- new_entry->item = *e;
+ new_entry->item = *e;
- if (cmos_entry_list == NULL)
- { new_entry->next = NULL;
- cmos_entry_list = new_entry;
- return OK;
- }
+ if (cmos_entry_list == NULL) {
+ new_entry->next = NULL;
+ cmos_entry_list = new_entry;
+ return OK;
+ }
- /* Find place in list to insert new entry. List is sorted in ascending
- * order.
- */
- for (item = cmos_entry_list, prev = NULL;
- (item != NULL) && (item->item.bit < e->bit);
- prev = item, item = item->next);
+ /* Find place in list to insert new entry. List is sorted in ascending
+ * order.
+ */
+ for (item = cmos_entry_list, prev = NULL;
+ (item != NULL) && (item->item.bit < e->bit);
+ prev = item, item = item->next) ;
- if (prev == NULL)
- { if (entries_overlap(e, &cmos_entry_list->item))
- { *conflict = &cmos_entry_list->item;
- goto fail;
- }
+ if (prev == NULL) {
+ if (entries_overlap(e, &cmos_entry_list->item)) {
+ *conflict = &cmos_entry_list->item;
+ goto fail;
+ }
- new_entry->next = cmos_entry_list;
- cmos_entry_list = new_entry;
- return OK;
- }
+ new_entry->next = cmos_entry_list;
+ cmos_entry_list = new_entry;
+ return OK;
+ }
- if (entries_overlap(&prev->item, e))
- { *conflict = &prev->item;
- goto fail;
- }
+ if (entries_overlap(&prev->item, e)) {
+ *conflict = &prev->item;
+ goto fail;
+ }
- if ((item != NULL) && entries_overlap(e, &item->item))
- { *conflict = &item->item;
- goto fail;
- }
+ if ((item != NULL) && entries_overlap(e, &item->item)) {
+ *conflict = &item->item;
+ goto fail;
+ }
- new_entry->next = item;
- prev->next = new_entry;
- return OK;
+ new_entry->next = item;
+ prev->next = new_entry;
+ return OK;
-fail:
- free(new_entry);
- return LAYOUT_ENTRY_OVERLAP;
- }
+ fail:
+ free(new_entry);
+ return LAYOUT_ENTRY_OVERLAP;
+}
/****************************************************************************
* find_cmos_entry
@@ -220,16 +228,17 @@
* Search for a CMOS entry whose name is 'name'. Return pointer to matching
* entry or NULL if entry not found.
****************************************************************************/
-const cmos_entry_t * find_cmos_entry (const char name[])
- { cmos_entry_item_t *item;
+const cmos_entry_t *find_cmos_entry(const char name[])
+{
+ cmos_entry_item_t *item;
- for (item = cmos_entry_list; item != NULL; item = item->next)
- { if (!strcmp(item->item.name, name))
- return &item->item;
- }
+ for (item = cmos_entry_list; item != NULL; item = item->next) {
+ if (!strcmp(item->item.name, name))
+ return &item->item;
+ }
- return NULL;
- }
+ return NULL;
+}
/****************************************************************************
* first_cmos_entry
@@ -237,8 +246,10 @@
* Return a pointer to the first CMOS entry in our list or NULL if list is
* empty.
****************************************************************************/
-const cmos_entry_t * first_cmos_entry (void)
- { return (cmos_entry_list == NULL) ? NULL : &cmos_entry_list->item; }
+const cmos_entry_t *first_cmos_entry(void)
+{
+ return (cmos_entry_list == NULL) ? NULL : &cmos_entry_list->item;
+}
/****************************************************************************
* next_cmos_entry
@@ -246,13 +257,14 @@
* Return a pointer to next entry in list after 'last' or NULL if no more
* entries.
****************************************************************************/
-const cmos_entry_t * next_cmos_entry (const cmos_entry_t *last)
- { const cmos_entry_item_t *last_item, *next_item;
+const cmos_entry_t *next_cmos_entry(const cmos_entry_t * last)
+{
+ const cmos_entry_item_t *last_item, *next_item;
- last_item = cmos_entry_to_const_item(last);
- next_item = last_item->next;
- return (next_item == NULL) ? NULL : &next_item->item;
- }
+ last_item = cmos_entry_to_const_item(last);
+ next_item = last_item->next;
+ return (next_item == NULL) ? NULL : &next_item->item;
+}
/****************************************************************************
* add_cmos_enum
@@ -260,73 +272,75 @@
* Attempt to add CMOS enum 'e' to our internal repository of layout
* information. Return OK on success or an error code on failure.
****************************************************************************/
-int add_cmos_enum (const cmos_enum_t *e)
- { cmos_enum_item_t *item, *prev, *new_enum;
+int add_cmos_enum(const cmos_enum_t * e)
+{
+ cmos_enum_item_t *item, *prev, *new_enum;
- if ((new_enum = (cmos_enum_item_t *) malloc(sizeof(*new_enum))) == NULL)
- out_of_memory();
+ if ((new_enum = (cmos_enum_item_t *) malloc(sizeof(*new_enum))) == NULL)
+ out_of_memory();
- new_enum->item = *e;
+ new_enum->item = *e;
- if (cmos_enum_list == NULL)
- { new_enum->next = NULL;
- cmos_enum_list = new_enum;
- return OK;
- }
+ if (cmos_enum_list == NULL) {
+ new_enum->next = NULL;
+ cmos_enum_list = new_enum;
+ return OK;
+ }
- /* The list of enums is sorted in ascending order, first by 'config_id' and
- * then by 'value'. Look for the first enum whose 'config_id' field
- * matches 'e'.
- */
- for (item = cmos_enum_list, prev = NULL;
- (item != NULL) && (item->item.config_id < e->config_id);
- prev = item, item = item->next);
+ /* The list of enums is sorted in ascending order, first by
+ * 'config_id' and then by 'value'. Look for the first enum
+ * whose 'config_id' field matches 'e'.
+ */
+ for (item = cmos_enum_list, prev = NULL;
+ (item != NULL) && (item->item.config_id < e->config_id);
+ prev = item, item = item->next) ;
- if (item == NULL)
- { new_enum->next = NULL;
- prev->next = new_enum;
- return OK;
- }
+ if (item == NULL) {
+ new_enum->next = NULL;
+ prev->next = new_enum;
+ return OK;
+ }
- if (item->item.config_id > e->config_id)
- { new_enum->next = item;
+ if (item->item.config_id > e->config_id) {
+ new_enum->next = item;
- if (prev == NULL)
- cmos_enum_list = new_enum;
- else
- prev->next = new_enum;
+ if (prev == NULL)
+ cmos_enum_list = new_enum;
+ else
+ prev->next = new_enum;
- return OK;
- }
+ return OK;
+ }
- /* List already contains at least one enum whose 'config_id' matches 'e'.
- * Now find proper place to insert 'e' based on 'value'.
- */
- while (item->item.value < e->value)
- { prev = item;
- item = item->next;
+ /* List already contains at least one enum whose 'config_id'
+ * matches 'e'. Now find proper place to insert 'e' based on
+ * 'value'.
+ */
+ while (item->item.value < e->value) {
+ prev = item;
+ item = item->next;
- if ((item == NULL) || (item->item.config_id != e->config_id))
- { new_enum->next = item;
- prev->next = new_enum;
- return OK;
- }
- }
+ if ((item == NULL) || (item->item.config_id != e->config_id)) {
+ new_enum->next = item;
+ prev->next = new_enum;
+ return OK;
+ }
+ }
- if (item->item.value == e->value)
- { free(new_enum);
- return LAYOUT_DUPLICATE_ENUM;
- }
+ if (item->item.value == e->value) {
+ free(new_enum);
+ return LAYOUT_DUPLICATE_ENUM;
+ }
- new_enum->next = item;
+ new_enum->next = item;
- if (prev == NULL)
- cmos_enum_list = new_enum;
- else
- prev->next = new_enum;
+ if (prev == NULL)
+ cmos_enum_list = new_enum;
+ else
+ prev->next = new_enum;
- return OK;
- }
+ return OK;
+}
/****************************************************************************
* find_cmos_enum
@@ -334,22 +348,22 @@
* Search for an enum that matches 'config_id' and 'value'. If found, return
* a pointer to the mathcing enum. Else return NULL.
****************************************************************************/
-const cmos_enum_t * find_cmos_enum (unsigned config_id,
- unsigned long long value)
- { const cmos_enum_item_t *item;
+const cmos_enum_t *find_cmos_enum(unsigned config_id, unsigned long long value)
+{
+ const cmos_enum_item_t *item;
- if ((item = find_first_cmos_enum_id(config_id)) == NULL)
- return NULL;
+ if ((item = find_first_cmos_enum_id(config_id)) == NULL)
+ return NULL;
- while (item->item.value < value)
- { item = item->next;
+ while (item->item.value < value) {
+ item = item->next;
- if ((item == NULL) || (item->item.config_id != config_id))
- return NULL;
- }
+ if ((item == NULL) || (item->item.config_id != config_id))
+ return NULL;
+ }
- return (item->item.value == value) ? &item->item : NULL;
- }
+ return (item->item.value == value) ? &item->item : NULL;
+}
/****************************************************************************
* first_cmos_enum
@@ -357,8 +371,10 @@
* Return a pointer to the first CMOS enum in our list or NULL if list is
* empty.
****************************************************************************/
-const cmos_enum_t * first_cmos_enum (void)
- { return (cmos_enum_list == NULL) ? NULL : &cmos_enum_list->item; }
+const cmos_enum_t *first_cmos_enum(void)
+{
+ return (cmos_enum_list == NULL) ? NULL : &cmos_enum_list->item;
+}
/****************************************************************************
* next_cmos_enum
@@ -366,13 +382,14 @@
* Return a pointer to next enum in list after 'last' or NULL if no more
* enums.
****************************************************************************/
-const cmos_enum_t * next_cmos_enum (const cmos_enum_t *last)
- { const cmos_enum_item_t *last_item, *next_item;
+const cmos_enum_t *next_cmos_enum(const cmos_enum_t * last)
+{
+ const cmos_enum_item_t *last_item, *next_item;
- last_item = cmos_enum_to_const_item(last);
- next_item = last_item->next;
- return (next_item == NULL) ? NULL : &next_item->item;
- }
+ last_item = cmos_enum_to_const_item(last);
+ next_item = last_item->next;
+ return (next_item == NULL) ? NULL : &next_item->item;
+}
/****************************************************************************
* first_cmos_enum_id
@@ -380,12 +397,13 @@
* Return a pointer to the first CMOS enum in our list that matches
* 'config_id' or NULL if there are no matching enums.
****************************************************************************/
-const cmos_enum_t * first_cmos_enum_id (unsigned config_id)
- { const cmos_enum_item_t *item;
+const cmos_enum_t *first_cmos_enum_id(unsigned config_id)
+{
+ const cmos_enum_item_t *item;
- item = find_first_cmos_enum_id(config_id);
- return (item == NULL) ? NULL : &item->item;
- }
+ item = find_first_cmos_enum_id(config_id);
+ return (item == NULL) ? NULL : &item->item;
+}
/****************************************************************************
* next_cmos_enum_id
@@ -393,13 +411,14 @@
* Return a pointer to next enum in list after 'last' that matches the
* 'config_id' field of 'last' or NULL if there are no more matching enums.
****************************************************************************/
-const cmos_enum_t * next_cmos_enum_id (const cmos_enum_t *last)
- { const cmos_enum_item_t *item;
+const cmos_enum_t *next_cmos_enum_id(const cmos_enum_t * last)
+{
+ const cmos_enum_item_t *item;
- item = cmos_enum_to_const_item(last)->next;
- return ((item == NULL) || (item->item.config_id != last->config_id)) ?
- NULL : &item->item;
- }
+ item = cmos_enum_to_const_item(last)->next;
+ return ((item == NULL) || (item->item.config_id != last->config_id)) ?
+ NULL : &item->item;
+}
/****************************************************************************
* is_checksum_name
@@ -407,8 +426,10 @@
* Return 1 if 'name' matches the name of the parameter representing the CMOS
* checksum. Else return 0.
****************************************************************************/
-int is_checksum_name (const char name[])
- { return !strcmp(name, checksum_param_name); }
+int is_checksum_name(const char name[])
+{
+ return !strcmp(name, checksum_param_name);
+}
/****************************************************************************
* checksum_layout_to_bytes
@@ -418,45 +439,46 @@
* bit positions to byte positions. Return OK on success or an error code if
* a sanity check fails.
****************************************************************************/
-int checksum_layout_to_bytes (cmos_checksum_layout_t *layout)
- { unsigned start, end, index;
+int checksum_layout_to_bytes(cmos_checksum_layout_t * layout)
+{
+ unsigned start, end, index;
- start = layout->summed_area_start;
- end = layout->summed_area_end;
- index = layout->checksum_at;
+ start = layout->summed_area_start;
+ end = layout->summed_area_end;
+ index = layout->checksum_at;
- if (start % 8)
- return LAYOUT_SUMMED_AREA_START_NOT_ALIGNED;
+ if (start % 8)
+ return LAYOUT_SUMMED_AREA_START_NOT_ALIGNED;
- if ((end % 8) != 7)
- return LAYOUT_SUMMED_AREA_END_NOT_ALIGNED;
+ if ((end % 8) != 7)
+ return LAYOUT_SUMMED_AREA_END_NOT_ALIGNED;
- if (index % 8)
- return LAYOUT_CHECKSUM_LOCATION_NOT_ALIGNED;
+ if (index % 8)
+ return LAYOUT_CHECKSUM_LOCATION_NOT_ALIGNED;
- if (end <= start)
- return LAYOUT_INVALID_SUMMED_AREA;
+ if (end <= start)
+ return LAYOUT_INVALID_SUMMED_AREA;
- /* Convert bit positions to byte positions. */
- start /= 8;
- end /= 8; /* equivalent to "end = ((end - 7) / 8)" */
- index /= 8;
+ /* Convert bit positions to byte positions. */
+ start /= 8;
+ end /= 8; /* equivalent to "end = ((end - 7) / 8)" */
+ index /= 8;
- if (verify_cmos_byte_index(start) || verify_cmos_byte_index(end))
- return LAYOUT_SUMMED_AREA_OUT_OF_RANGE;
+ if (verify_cmos_byte_index(start) || verify_cmos_byte_index(end))
+ return LAYOUT_SUMMED_AREA_OUT_OF_RANGE;
- if (verify_cmos_byte_index(index))
- return LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE;
+ if (verify_cmos_byte_index(index))
+ return LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE;
- /* checksum occupies 16 bits */
- if (areas_overlap(start, end - start + 1, index, index + 1))
- return LAYOUT_CHECKSUM_OVERLAPS_SUMMED_AREA;
+ /* checksum occupies 16 bits */
+ if (areas_overlap(start, end - start + 1, index, index + 1))
+ return LAYOUT_CHECKSUM_OVERLAPS_SUMMED_AREA;
- layout->summed_area_start = start;
- layout->summed_area_end = end;
- layout->checksum_at = index;
- return OK;
- }
+ layout->summed_area_start = start;
+ layout->summed_area_end = end;
+ layout->checksum_at = index;
+ return OK;
+}
/****************************************************************************
* checksum_layout_to_bits
@@ -464,11 +486,12 @@
* On entry, '*layout' contains checksum-related layout information expressed
* in bytes. Convert this information to bit positions.
****************************************************************************/
-void checksum_layout_to_bits (cmos_checksum_layout_t *layout)
- { layout->summed_area_start *= 8;
- layout->summed_area_end = (layout->summed_area_end * 8) + 7;
- layout->checksum_at *= 8;
- }
+void checksum_layout_to_bits(cmos_checksum_layout_t * layout)
+{
+ layout->summed_area_start *= 8;
+ layout->summed_area_end = (layout->summed_area_end * 8) + 7;
+ layout->checksum_at *= 8;
+}
/****************************************************************************
* default_cmos_layout_get_fn
@@ -477,22 +500,25 @@
* obtaining CMOS layout information was not set before attempting to
* retrieve layout information.
****************************************************************************/
-static void default_cmos_layout_get_fn (void)
- { BUG(); }
+static void default_cmos_layout_get_fn(void)
+{
+ BUG();
+}
/****************************************************************************
* areas_overlap
*
* Return 1 if the two given areas overlap. Else return 0.
****************************************************************************/
-static int areas_overlap (unsigned area_0_start, unsigned area_0_length,
- unsigned area_1_start, unsigned area_1_length)
- { unsigned area_0_end, area_1_end;
+static int areas_overlap(unsigned area_0_start, unsigned area_0_length,
+ unsigned area_1_start, unsigned area_1_length)
+{
+ unsigned area_0_end, area_1_end;
- area_0_end = area_0_start + area_0_length - 1;
- area_1_end = area_1_start + area_1_length - 1;
- return ((area_1_start <= area_0_end) && (area_0_start <= area_1_end));
- }
+ area_0_end = area_0_start + area_0_length - 1;
+ area_1_end = area_1_start + area_1_length - 1;
+ return ((area_1_start <= area_0_end) && (area_0_start <= area_1_end));
+}
/****************************************************************************
* find_first_cmos_enum_id
@@ -500,13 +526,14 @@
* Return a pointer to the first item in our list of enums that matches
* 'config_id'. Return NULL if there is no matching enum.
****************************************************************************/
-static const cmos_enum_item_t * find_first_cmos_enum_id (unsigned config_id)
- { cmos_enum_item_t *item;
+static const cmos_enum_item_t *find_first_cmos_enum_id(unsigned config_id)
+{
+ cmos_enum_item_t *item;
- for (item = cmos_enum_list;
- (item != NULL) && (item->item.config_id < config_id);
- item = item->next);
+ for (item = cmos_enum_list;
+ (item != NULL) && (item->item.config_id < config_id);
+ item = item->next) ;
- return ((item == NULL) || (item->item.config_id > config_id)) ?
- NULL : item;
- }
+ return ((item == NULL) || (item->item.config_id > config_id)) ?
+ NULL : item;
+}
Modified: trunk/util/nvramtool/layout.h
===================================================================
--- trunk/util/nvramtool/layout.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/layout.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -45,44 +45,40 @@
#define LAYOUT_SUMMED_AREA_OUT_OF_RANGE (LAYOUT_RESULT_START + 8)
#define LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE (LAYOUT_RESULT_START + 9)
-typedef enum
- { CMOS_ENTRY_ENUM,
- CMOS_ENTRY_HEX,
- CMOS_ENTRY_STRING,
- CMOS_ENTRY_RESERVED
- }
-cmos_entry_config_t;
+typedef enum {
+ CMOS_ENTRY_ENUM,
+ CMOS_ENTRY_HEX,
+ CMOS_ENTRY_STRING,
+ CMOS_ENTRY_RESERVED
+} cmos_entry_config_t;
/* This represents a CMOS parameter. */
-typedef struct
- { unsigned bit;
- unsigned length;
- cmos_entry_config_t config;
- unsigned config_id;
- char name[CMOS_MAX_NAME_LENGTH + 1];
- }
-cmos_entry_t;
+typedef struct {
+ unsigned bit;
+ unsigned length;
+ cmos_entry_config_t config;
+ unsigned config_id;
+ char name[CMOS_MAX_NAME_LENGTH + 1];
+} cmos_entry_t;
/* This represents a possible value for a CMOS parameter of type
* CMOS_ENTRY_ENUM.
*/
-typedef struct
- { unsigned config_id;
- unsigned long long value;
- char text[CMOS_MAX_TEXT_LENGTH + 1];
- }
-cmos_enum_t;
+typedef struct {
+ unsigned config_id;
+ unsigned long long value;
+ char text[CMOS_MAX_TEXT_LENGTH + 1];
+} cmos_enum_t;
-/* This represents the location of the CMOS checksum and the area over which
- * it is computed. Depending on the context, the values may be represented as
- * either bit positions or byte positions.
+/* This represents the location of the CMOS checksum and the area over
+ * which it is computed. Depending on the context, the values may be
+ * represented as either bit positions or byte positions.
*/
-typedef struct
- { unsigned summed_area_start; /* first checksummed location */
- unsigned summed_area_end; /* last checksummed location */
- unsigned checksum_at; /* location of checksum */
- }
-cmos_checksum_layout_t;
+typedef struct {
+ unsigned summed_area_start; /* first checksummed location */
+ unsigned summed_area_end; /* last checksummed location */
+ unsigned checksum_at; /* location of checksum */
+} cmos_checksum_layout_t;
extern const char checksum_param_name[];
@@ -94,21 +90,20 @@
typedef void (*cmos_layout_get_fn_t) (void);
-void register_cmos_layout_get_fn (cmos_layout_get_fn_t fn);
-void get_cmos_layout (void);
-int add_cmos_entry (const cmos_entry_t *e, const cmos_entry_t **conflict);
-const cmos_entry_t * find_cmos_entry (const char name[]);
-const cmos_entry_t * first_cmos_entry (void);
-const cmos_entry_t * next_cmos_entry (const cmos_entry_t *last);
-int add_cmos_enum (const cmos_enum_t *e);
-const cmos_enum_t * find_cmos_enum (unsigned config_id,
- unsigned long long value);
-const cmos_enum_t * first_cmos_enum (void);
-const cmos_enum_t * next_cmos_enum (const cmos_enum_t *last);
-const cmos_enum_t * first_cmos_enum_id (unsigned config_id);
-const cmos_enum_t * next_cmos_enum_id (const cmos_enum_t *last);
-int is_checksum_name (const char name[]);
-int checksum_layout_to_bytes (cmos_checksum_layout_t *layout);
-void checksum_layout_to_bits (cmos_checksum_layout_t *layout);
+void register_cmos_layout_get_fn(cmos_layout_get_fn_t fn);
+void get_cmos_layout(void);
+int add_cmos_entry(const cmos_entry_t * e, const cmos_entry_t ** conflict);
+const cmos_entry_t *find_cmos_entry(const char name[]);
+const cmos_entry_t *first_cmos_entry(void);
+const cmos_entry_t *next_cmos_entry(const cmos_entry_t * last);
+int add_cmos_enum(const cmos_enum_t * e);
+const cmos_enum_t *find_cmos_enum(unsigned config_id, unsigned long long value);
+const cmos_enum_t *first_cmos_enum(void);
+const cmos_enum_t *next_cmos_enum(const cmos_enum_t * last);
+const cmos_enum_t *first_cmos_enum_id(unsigned config_id);
+const cmos_enum_t *next_cmos_enum_id(const cmos_enum_t * last);
+int is_checksum_name(const char name[]);
+int checksum_layout_to_bytes(cmos_checksum_layout_t * layout);
+void checksum_layout_to_bits(cmos_checksum_layout_t * layout);
-#endif /* LAYOUT_H */
+#endif /* LAYOUT_H */
Modified: trunk/util/nvramtool/layout_file.c
===================================================================
--- trunk/util/nvramtool/layout_file.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/layout_file.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -34,55 +34,52 @@
#include "cmos_lowlevel.h"
#include "reg_expr.h"
-static void process_layout_file (FILE *f);
-static void skip_past_start (FILE *f);
-static int process_entry (FILE *f, int skip_add);
-static int process_enum (FILE *f, int skip_add);
-static void process_checksum_info (FILE *f);
-static void skip_remaining_lines (FILE *f);
-static void create_entry (cmos_entry_t *cmos_entry,
- const char start_bit_str[], const char length_str[],
- const char config_str[], const char config_id_str[],
- const char name_str[]);
-static void try_add_layout_file_entry (const cmos_entry_t *cmos_entry);
-static void create_enum (cmos_enum_t *cmos_enum, const char id_str[],
- const char value_str[], const char text_str[]);
-static void try_add_cmos_enum (const cmos_enum_t *cmos_enum);
-static void set_checksum_info (const char start_str[], const char end_str[],
- const char index_str[]);
-static char cmos_entry_char_value (cmos_entry_config_t config);
-static int get_layout_file_line (FILE *f, char line[], int line_buf_size);
-static unsigned string_to_unsigned (const char str[], const char str_name[]);
-static unsigned long string_to_unsigned_long (const char str[],
- const char str_name[]);
-static unsigned long do_string_to_unsigned_long (const char str[],
- const char str_name[],
- const char blurb[]);
+static void process_layout_file(FILE * f);
+static void skip_past_start(FILE * f);
+static int process_entry(FILE * f, int skip_add);
+static int process_enum(FILE * f, int skip_add);
+static void process_checksum_info(FILE * f);
+static void skip_remaining_lines(FILE * f);
+static void create_entry(cmos_entry_t * cmos_entry,
+ const char start_bit_str[], const char length_str[],
+ const char config_str[], const char config_id_str[],
+ const char name_str[]);
+static void try_add_layout_file_entry(const cmos_entry_t * cmos_entry);
+static void create_enum(cmos_enum_t * cmos_enum, const char id_str[],
+ const char value_str[], const char text_str[]);
+static void try_add_cmos_enum(const cmos_enum_t * cmos_enum);
+static void set_checksum_info(const char start_str[], const char end_str[],
+ const char index_str[]);
+static char cmos_entry_char_value(cmos_entry_config_t config);
+static int get_layout_file_line(FILE * f, char line[], int line_buf_size);
+static unsigned string_to_unsigned(const char str[], const char str_name[]);
+static unsigned long string_to_unsigned_long(const char str[],
+ const char str_name[]);
+static unsigned long do_string_to_unsigned_long(const char str[],
+ const char str_name[],
+ const char blurb[]);
/* matches either a blank line or a comment line */
static const char blank_or_comment_regex[] =
- /* a blank line */
- "(^[[:space:]]+$)"
+ /* a blank line */
+ "(^[[:space:]]+$)" "|" /* or ... */
+ /* a line consisting of: optional whitespace followed by */
+ "(^[[:space:]]*"
+ /* a '#' character and optionally, additional characters */
+ "#.*$)";
- "|" /* or ... */
-
- /* a line consisting of: optional whitespace followed by */
- "(^[[:space:]]*"
- /* a '#' character and optionally, additional characters */
- "#.*$)";
-
static regex_t blank_or_comment_expr;
/* matches the line in a CMOS layout file indicating the start of the
* "entries" section.
*/
static const char start_entries_regex[] =
- /* optional whitespace */
- "^[[:space:]]*"
- /* followed by "entries" */
- "entries"
- /* followed by optional whitespace */
- "[[:space:]]*$";
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by "entries" */
+ "entries"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
static regex_t start_entries_expr;
@@ -90,12 +87,12 @@
* "enumerations" section
*/
static const char start_enums_regex[] =
- /* optional whitespace */
- "^[[:space:]]*"
- /* followed by "enumerations" */
- "enumerations"
- /* followed by optional whitespace */
- "[[:space:]]*$";
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by "enumerations" */
+ "enumerations"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
static regex_t start_enums_expr;
@@ -103,58 +100,58 @@
* "checksums" section
*/
static const char start_checksums_regex[] =
- /* optional whitespace */
- "^[[:space:]]*"
- /* followed by "checksums" */
- "checksums"
- /* followed by optional whitespace */
- "[[:space:]]*$";
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by "checksums" */
+ "checksums"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
static regex_t start_checksums_expr;
/* matches a line in a CMOS layout file specifying a CMOS entry */
static const char entries_line_regex[] =
- /* optional whitespace */
- "^[[:space:]]*"
- /* followed by a chunk of nonwhitespace for start-bit field */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for length field */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for config field */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for config-ID field */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for name field */
- "([^[:space:]]+)"
- /* followed by optional whitespace */
- "[[:space:]]*$";
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by a chunk of nonwhitespace for start-bit field */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for length field */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for config field */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for config-ID field */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for name field */
+ "([^[:space:]]+)"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
static regex_t entries_line_expr;
/* matches a line in a CMOS layout file specifying a CMOS enumeration */
static const char enums_line_regex[] =
- /* optional whitespace */
- "^[[:space:]]*"
- /* followed by a chunk of nonwhitespace for ID field */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for value field */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for text field */
- "([^[:space:]]+)"
- /* followed by optional whitespace */
- "[[:space:]]*$";
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by a chunk of nonwhitespace for ID field */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for value field */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for text field */
+ "([^[:space:]]+)"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
static regex_t enums_line_expr;
@@ -162,24 +159,24 @@
* information
*/
static const char checksum_line_regex[] =
- /* optional whitespace */
- "^[[:space:]]*"
- /* followed by "checksum" */
- "checksum"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for first bit of summed area */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for last bit of summed area */
- "([^[:space:]]+)"
- /* followed by one or more whitespace characters */
- "[[:space:]]+"
- /* followed by a chunk of nonwhitespace for checksum location bit */
- "([^[:space:]]+)"
- /* followed by optional whitespace */
- "[[:space:]]*$";
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by "checksum" */
+ "checksum"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for first bit of summed area */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for last bit of summed area */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for checksum location bit */
+ "([^[:space:]]+)"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
static regex_t checksum_line_expr;
@@ -194,28 +191,32 @@
*
* Set the name of the file we will obtain CMOS layout information from.
****************************************************************************/
-void set_layout_filename (const char filename[])
- { layout_filename = filename; }
+void set_layout_filename(const char filename[])
+{
+ layout_filename = filename;
+}
/****************************************************************************
* get_layout_from_file
*
* Read CMOS layout information from the user-specified CMOS layout file.
****************************************************************************/
-void get_layout_from_file (void)
- { FILE *f;
+void get_layout_from_file(void)
+{
+ FILE *f;
- assert(layout_filename != NULL);
+ assert(layout_filename != NULL);
- if ((f = fopen(layout_filename, "r")) == NULL)
- { fprintf(stderr, "%s: Can not open CMOS layout file %s for reading: "
- "%s\n", prog_name, layout_filename, strerror(errno));
- exit(1);
- }
+ if ((f = fopen(layout_filename, "r")) == NULL) {
+ fprintf(stderr,
+ "%s: Can not open CMOS layout file %s for reading: "
+ "%s\n", prog_name, layout_filename, strerror(errno));
+ exit(1);
+ }
- process_layout_file(f);
- fclose(f);
- }
+ process_layout_file(f);
+ fclose(f);
+}
/****************************************************************************
* write_cmos_layout
@@ -223,35 +224,35 @@
* Write CMOS layout information to file 'f'. The output is written in the
* format that CMOS layout files adhere to.
****************************************************************************/
-void write_cmos_layout (FILE *f)
- { const cmos_entry_t *cmos_entry;
- const cmos_enum_t *cmos_enum;
- cmos_checksum_layout_t layout;
+void write_cmos_layout(FILE * f)
+{
+ const cmos_entry_t *cmos_entry;
+ const cmos_enum_t *cmos_enum;
+ cmos_checksum_layout_t layout;
- fprintf(f, "entries\n");
+ fprintf(f, "entries\n");
- for (cmos_entry = first_cmos_entry();
- cmos_entry != NULL;
- cmos_entry = next_cmos_entry(cmos_entry))
- fprintf(f, "%u %u %c %u %s\n", cmos_entry->bit, cmos_entry->length,
- cmos_entry_char_value(cmos_entry->config),
- cmos_entry->config_id, cmos_entry->name);
+ for (cmos_entry = first_cmos_entry();
+ cmos_entry != NULL; cmos_entry = next_cmos_entry(cmos_entry))
+ fprintf(f, "%u %u %c %u %s\n", cmos_entry->bit,
+ cmos_entry->length,
+ cmos_entry_char_value(cmos_entry->config),
+ cmos_entry->config_id, cmos_entry->name);
- fprintf(f, "\nenumerations\n");
+ fprintf(f, "\nenumerations\n");
- for (cmos_enum = first_cmos_enum();
- cmos_enum != NULL;
- cmos_enum = next_cmos_enum(cmos_enum))
- fprintf(f, "%u %llu %s\n", cmos_enum->config_id, cmos_enum->value,
- cmos_enum->text);
+ for (cmos_enum = first_cmos_enum();
+ cmos_enum != NULL; cmos_enum = next_cmos_enum(cmos_enum))
+ fprintf(f, "%u %llu %s\n", cmos_enum->config_id,
+ cmos_enum->value, cmos_enum->text);
- layout.summed_area_start = cmos_checksum_start;
- layout.summed_area_end = cmos_checksum_end;
- layout.checksum_at = cmos_checksum_index;
- checksum_layout_to_bits(&layout);
- fprintf(f, "\nchecksums\nchecksum %u %u %u\n", layout.summed_area_start,
- layout.summed_area_end, layout.checksum_at);
- }
+ layout.summed_area_start = cmos_checksum_start;
+ layout.summed_area_end = cmos_checksum_end;
+ layout.checksum_at = cmos_checksum_index;
+ checksum_layout_to_bits(&layout);
+ fprintf(f, "\nchecksums\nchecksum %u %u %u\n", layout.summed_area_start,
+ layout.summed_area_end, layout.checksum_at);
+}
/****************************************************************************
* process_layout_file
@@ -259,99 +260,105 @@
* Read CMOS layout information from file 'f' and add it to our internal
* repository.
****************************************************************************/
-static void process_layout_file (FILE *f)
- { compile_reg_exprs(REG_EXTENDED | REG_NEWLINE, 7,
- blank_or_comment_regex, &blank_or_comment_expr,
- start_entries_regex, &start_entries_expr,
- entries_line_regex, &entries_line_expr,
- start_enums_regex, &start_enums_expr,
- enums_line_regex, &enums_line_expr,
- start_checksums_regex, &start_checksums_expr,
- checksum_line_regex, &checksum_line_expr);
- line_num = 1;
- skip_past_start(f);
+static void process_layout_file(FILE * f)
+{
+ compile_reg_exprs(REG_EXTENDED | REG_NEWLINE, 7,
+ blank_or_comment_regex, &blank_or_comment_expr,
+ start_entries_regex, &start_entries_expr,
+ entries_line_regex, &entries_line_expr,
+ start_enums_regex, &start_enums_expr,
+ enums_line_regex, &enums_line_expr,
+ start_checksums_regex, &start_checksums_expr,
+ checksum_line_regex, &checksum_line_expr);
+ line_num = 1;
+ skip_past_start(f);
- /* Skip past all entries. We will process these later when we make a
- * second pass through the file.
- */
- while (!process_entry(f, 1));
+ /* Skip past all entries. We will process these later when we
+ * make a second pass through the file.
+ */
+ while (!process_entry(f, 1)) ;
- /* Process all enums, adding them to our internal repository as we go. */
+ /* Process all enums, adding them to our internal repository as
+ * we go. */
- if (process_enum(f, 0))
- { fprintf(stderr, "%s: Error: CMOS layout file contains no "
- "enumerations.\n", prog_name);
- exit(1);
- }
+ if (process_enum(f, 0)) {
+ fprintf(stderr, "%s: Error: CMOS layout file contains no "
+ "enumerations.\n", prog_name);
+ exit(1);
+ }
- while (!process_enum(f, 0));
+ while (!process_enum(f, 0)) ;
- /* Go back to start of file. */
- line_num = 1;
- fseek(f, 0, SEEK_SET);
+ /* Go back to start of file. */
+ line_num = 1;
+ fseek(f, 0, SEEK_SET);
- skip_past_start(f);
+ skip_past_start(f);
- /* Process all entries, adding them to the repository as we go. We must
- * add the entries after the enums, even though they appear in the layout
- * file before the enums. This is because the entries are sanity checked
- * against the enums as they are added.
- */
+ /* Process all entries, adding them to the repository as we go.
+ * We must add the entries after the enums, even though they
+ * appear in the layout file before the enums. This is because
+ * the entries are sanity checked against the enums as they are
+ * added.
+ */
- if (process_entry(f, 0))
- { fprintf(stderr, "%s: Error: CMOS layout file contains no entries.\n",
- prog_name);
- exit(1);
- }
+ if (process_entry(f, 0)) {
+ fprintf(stderr,
+ "%s: Error: CMOS layout file contains no entries.\n",
+ prog_name);
+ exit(1);
+ }
- while (!process_entry(f, 0));
+ while (!process_entry(f, 0)) ;
- /* Skip past all enums. They have already been processed. */
- while (!process_enum(f, 1));
+ /* Skip past all enums. They have already been processed. */
+ while (!process_enum(f, 1)) ;
- /* Process CMOS checksum info. */
- process_checksum_info(f);
+ /* Process CMOS checksum info. */
+ process_checksum_info(f);
- /* See if there are any lines left to process. If so, verify that they are
- * all either blank lines or comments.
- */
- skip_remaining_lines(f);
+ /* See if there are any lines left to process. If so, verify
+ * that they are all either blank lines or comments.
+ */
+ skip_remaining_lines(f);
- free_reg_exprs(7, &blank_or_comment_expr, &start_entries_expr,
- &entries_line_expr, &start_enums_expr,
- &enums_line_expr, &start_checksums_expr,
- &checksum_line_expr);
- }
+ free_reg_exprs(7, &blank_or_comment_expr, &start_entries_expr,
+ &entries_line_expr, &start_enums_expr,
+ &enums_line_expr, &start_checksums_expr,
+ &checksum_line_expr);
+}
/****************************************************************************
* skip_past_start
*
* Skip past the line that marks the start of the "entries" section.
****************************************************************************/
-static void skip_past_start (FILE *f)
- { char line[LINE_BUF_SIZE];
+static void skip_past_start(FILE * f)
+{
+ char line[LINE_BUF_SIZE];
- for (; ; line_num++)
- { if (get_layout_file_line(f, line, LINE_BUF_SIZE))
- { fprintf(stderr,
- "%s: \"entries\" line not found in CMOS layout file.\n",
- prog_name);
- exit(1);
- }
+ for (;; line_num++) {
+ if (get_layout_file_line(f, line, LINE_BUF_SIZE)) {
+ fprintf(stderr,
+ "%s: \"entries\" line not found in CMOS layout file.\n",
+ prog_name);
+ exit(1);
+ }
- if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
- continue;
+ if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
+ continue;
- if (!regexec(&start_entries_expr, line, 0, NULL, 0))
- break;
+ if (!regexec(&start_entries_expr, line, 0, NULL, 0))
+ break;
- fprintf(stderr, "%s: Syntax error on line %d of CMOS layout file. "
- "\"entries\" line expected.\n", prog_name, line_num);
- exit(1);
- }
+ fprintf(stderr,
+ "%s: Syntax error on line %d of CMOS layout file. "
+ "\"entries\" line expected.\n", prog_name, line_num);
+ exit(1);
+ }
- line_num++;
- }
+ line_num++;
+}
/****************************************************************************
* process_entry
@@ -360,56 +367,58 @@
* of layout information. Return 0 if an entry was found and processed.
* Return 1 if there are no more entries.
****************************************************************************/
-static int process_entry (FILE *f, int skip_add)
- { static const size_t N_MATCHES = 6;
- char line[LINE_BUF_SIZE];
- regmatch_t match[N_MATCHES];
- cmos_entry_t cmos_entry;
- int result;
+static int process_entry(FILE * f, int skip_add)
+{
+ static const size_t N_MATCHES = 6;
+ char line[LINE_BUF_SIZE];
+ regmatch_t match[N_MATCHES];
+ cmos_entry_t cmos_entry;
+ int result;
- result = 1;
+ result = 1;
- for (; ; line_num++)
- { if (get_layout_file_line(f, line, LINE_BUF_SIZE))
- { fprintf(stderr,
- "%s: Unexpected end of CMOS layout file reached while "
- "reading \"entries\" section.\n", prog_name);
- exit(1);
- }
+ for (;; line_num++) {
+ if (get_layout_file_line(f, line, LINE_BUF_SIZE)) {
+ fprintf(stderr,
+ "%s: Unexpected end of CMOS layout file reached while "
+ "reading \"entries\" section.\n", prog_name);
+ exit(1);
+ }
- if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
- continue;
+ if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
+ continue;
- if (regexec(&entries_line_expr, line, N_MATCHES, match, 0))
- { if (regexec(&start_enums_expr, line, 0, NULL, 0))
- { fprintf(stderr, "%s: Syntax error on line %d of CMOS layout "
- "file.\n", prog_name, line_num);
- exit(1);
- }
+ if (regexec(&entries_line_expr, line, N_MATCHES, match, 0)) {
+ if (regexec(&start_enums_expr, line, 0, NULL, 0)) {
+ fprintf(stderr,
+ "%s: Syntax error on line %d of CMOS layout "
+ "file.\n", prog_name, line_num);
+ exit(1);
+ }
- break; /* start of enumerations reached: no more entries */
- }
+ break; /* start of enumerations reached: no more entries */
+ }
- result = 0; /* next layout entry found */
+ result = 0; /* next layout entry found */
- if (skip_add)
- break;
+ if (skip_add)
+ break;
- line[match[1].rm_eo] = '\0';
- line[match[2].rm_eo] = '\0';
- line[match[3].rm_eo] = '\0';
- line[match[4].rm_eo] = '\0';
- line[match[5].rm_eo] = '\0';
- create_entry(&cmos_entry, &line[match[1].rm_so], &line[match[2].rm_so],
- &line[match[3].rm_so], &line[match[4].rm_so],
- &line[match[5].rm_so]);
- try_add_layout_file_entry(&cmos_entry);
- break;
- }
+ line[match[1].rm_eo] = '\0';
+ line[match[2].rm_eo] = '\0';
+ line[match[3].rm_eo] = '\0';
+ line[match[4].rm_eo] = '\0';
+ line[match[5].rm_eo] = '\0';
+ create_entry(&cmos_entry, &line[match[1].rm_so],
+ &line[match[2].rm_so], &line[match[3].rm_so],
+ &line[match[4].rm_so], &line[match[5].rm_so]);
+ try_add_layout_file_entry(&cmos_entry);
+ break;
+ }
- line_num++;
- return result;
- }
+ line_num++;
+ return result;
+}
/****************************************************************************
* process_enum
@@ -418,91 +427,96 @@
* repository of layout information. Return 0 if an enumeration was found
* and processed. Return 1 if there are no more enumerations.
****************************************************************************/
-static int process_enum (FILE *f, int skip_add)
- { static const size_t N_MATCHES = 4;
- char line[LINE_BUF_SIZE];
- regmatch_t match[N_MATCHES];
- cmos_enum_t cmos_enum;
- int result;
+static int process_enum(FILE * f, int skip_add)
+{
+ static const size_t N_MATCHES = 4;
+ char line[LINE_BUF_SIZE];
+ regmatch_t match[N_MATCHES];
+ cmos_enum_t cmos_enum;
+ int result;
- result = 1;
+ result = 1;
- for (; ; line_num++)
- { if (get_layout_file_line(f, line, LINE_BUF_SIZE))
- { fprintf(stderr,
- "%s: Unexpected end of CMOS layout file reached while "
- "reading \"enumerations\" section.\n", prog_name);
- exit(1);
- }
+ for (;; line_num++) {
+ if (get_layout_file_line(f, line, LINE_BUF_SIZE)) {
+ fprintf(stderr,
+ "%s: Unexpected end of CMOS layout file reached while "
+ "reading \"enumerations\" section.\n",
+ prog_name);
+ exit(1);
+ }
- if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
- continue;
+ if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
+ continue;
- if (regexec(&enums_line_expr, line, N_MATCHES, match, 0))
- { if (regexec(&start_checksums_expr, line, 0, NULL, 0))
- { fprintf(stderr, "%s: Syntax error on line %d of CMOS layout "
- "file.\n", prog_name, line_num);
- exit(1);
- }
+ if (regexec(&enums_line_expr, line, N_MATCHES, match, 0)) {
+ if (regexec(&start_checksums_expr, line, 0, NULL, 0)) {
+ fprintf(stderr,
+ "%s: Syntax error on line %d of CMOS layout "
+ "file.\n", prog_name, line_num);
+ exit(1);
+ }
- break; /* start of checksums reached: no more enumerations */
- }
+ break; /* start of checksums reached: no more enumerations */
+ }
- result = 0; /* next layout enumeration found */
+ result = 0; /* next layout enumeration found */
- if (skip_add)
- break;
+ if (skip_add)
+ break;
- line[match[1].rm_eo] = '\0';
- line[match[2].rm_eo] = '\0';
- line[match[3].rm_eo] = '\0';
- create_enum(&cmos_enum, &line[match[1].rm_so], &line[match[2].rm_so],
- &line[match[3].rm_so]);
- try_add_cmos_enum(&cmos_enum);
- break;
- }
+ line[match[1].rm_eo] = '\0';
+ line[match[2].rm_eo] = '\0';
+ line[match[3].rm_eo] = '\0';
+ create_enum(&cmos_enum, &line[match[1].rm_so],
+ &line[match[2].rm_so], &line[match[3].rm_so]);
+ try_add_cmos_enum(&cmos_enum);
+ break;
+ }
- line_num++;
- return result;
- }
+ line_num++;
+ return result;
+}
/****************************************************************************
* process_checksum_info
*
* Get line conatining CMOS checksum information.
****************************************************************************/
-static void process_checksum_info (FILE *f)
- { static const size_t N_MATCHES = 4;
- char line[LINE_BUF_SIZE];
- regmatch_t match[N_MATCHES];
+static void process_checksum_info(FILE * f)
+{
+ static const size_t N_MATCHES = 4;
+ char line[LINE_BUF_SIZE];
+ regmatch_t match[N_MATCHES];
- for (; ; line_num++)
- { if (get_layout_file_line(f, line, LINE_BUF_SIZE))
- { fprintf(stderr,
- "%s: Unexpected end of CMOS layout file reached while "
- "reading \"checksums\" section.\n", prog_name);
- exit(1);
- }
+ for (;; line_num++) {
+ if (get_layout_file_line(f, line, LINE_BUF_SIZE)) {
+ fprintf(stderr,
+ "%s: Unexpected end of CMOS layout file reached while "
+ "reading \"checksums\" section.\n", prog_name);
+ exit(1);
+ }
- if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
- continue;
+ if (!regexec(&blank_or_comment_expr, line, 0, NULL, 0))
+ continue;
- if (regexec(&checksum_line_expr, line, N_MATCHES, match, 0))
- { fprintf(stderr, "%s: Syntax error on line %d of CMOS layout "
- "file. \"checksum\" line expected.\n", prog_name,
- line_num);
- exit(1);
- }
+ if (regexec(&checksum_line_expr, line, N_MATCHES, match, 0)) {
+ fprintf(stderr,
+ "%s: Syntax error on line %d of CMOS layout "
+ "file. \"checksum\" line expected.\n",
+ prog_name, line_num);
+ exit(1);
+ }
- /* checksum line found */
- line[match[1].rm_eo] = '\0';
- line[match[2].rm_eo] = '\0';
- line[match[3].rm_eo] = '\0';
- set_checksum_info(&line[match[1].rm_so], &line[match[2].rm_so],
- &line[match[3].rm_so]);
- break;
- }
- }
+ /* checksum line found */
+ line[match[1].rm_eo] = '\0';
+ line[match[2].rm_eo] = '\0';
+ line[match[3].rm_eo] = '\0';
+ set_checksum_info(&line[match[1].rm_so], &line[match[2].rm_so],
+ &line[match[3].rm_so]);
+ break;
+ }
+}
/****************************************************************************
* skip_remaining_lines
@@ -510,20 +524,21 @@
* Get any remaining lines of unprocessed input. Complain if we find a line
* that contains anything other than comments and whitespace.
****************************************************************************/
-static void skip_remaining_lines (FILE *f)
- { char line[LINE_BUF_SIZE];
+static void skip_remaining_lines(FILE * f)
+{
+ char line[LINE_BUF_SIZE];
- for (line_num++;
- get_layout_file_line(f, line, LINE_BUF_SIZE) == OK;
- line_num++)
- { if (regexec(&blank_or_comment_expr, line, 0, NULL, 0))
- { fprintf(stderr, "%s: Syntax error on line %d of CMOS layout file: "
- "Only comments and/or whitespace allowed after "
- "\"checksum\" line.\n", prog_name, line_num);
- exit(1);
- }
- }
- }
+ for (line_num++;
+ get_layout_file_line(f, line, LINE_BUF_SIZE) == OK; line_num++) {
+ if (regexec(&blank_or_comment_expr, line, 0, NULL, 0)) {
+ fprintf(stderr,
+ "%s: Syntax error on line %d of CMOS layout file: "
+ "Only comments and/or whitespace allowed after "
+ "\"checksum\" line.\n", prog_name, line_num);
+ exit(1);
+ }
+ }
+}
/****************************************************************************
* create_entry
@@ -531,54 +546,57 @@
* Create a CMOS entry structure representing the given information. Perform
* sanity checking on input parameters.
****************************************************************************/
-static void create_entry (cmos_entry_t *cmos_entry,
- const char start_bit_str[], const char length_str[],
- const char config_str[], const char config_id_str[],
- const char name_str[])
- { cmos_entry->bit = string_to_unsigned(start_bit_str, "start-bit");
- cmos_entry->length = string_to_unsigned(length_str, "length");
+static void create_entry(cmos_entry_t * cmos_entry,
+ const char start_bit_str[], const char length_str[],
+ const char config_str[], const char config_id_str[],
+ const char name_str[])
+{
+ cmos_entry->bit = string_to_unsigned(start_bit_str, "start-bit");
+ cmos_entry->length = string_to_unsigned(length_str, "length");
- if (config_str[1] != '\0')
- goto bad_config_str;
+ if (config_str[1] != '\0')
+ goto bad_config_str;
- switch (config_str[0])
- { case 'e':
- cmos_entry->config = CMOS_ENTRY_ENUM;
- break;
+ switch (config_str[0]) {
+ case 'e':
+ cmos_entry->config = CMOS_ENTRY_ENUM;
+ break;
- case 'h':
- cmos_entry->config = CMOS_ENTRY_HEX;
- break;
+ case 'h':
+ cmos_entry->config = CMOS_ENTRY_HEX;
+ break;
- case 's':
- cmos_entry->config = CMOS_ENTRY_STRING;
- break;
+ case 's':
+ cmos_entry->config = CMOS_ENTRY_STRING;
+ break;
- case 'r':
- cmos_entry->config = CMOS_ENTRY_RESERVED;
- break;
+ case 'r':
+ cmos_entry->config = CMOS_ENTRY_RESERVED;
+ break;
- default:
- goto bad_config_str;
- }
+ default:
+ goto bad_config_str;
+ }
- cmos_entry->config_id = string_to_unsigned(config_id_str, "config-ID");
+ cmos_entry->config_id = string_to_unsigned(config_id_str, "config-ID");
- if (strlen(name_str) >= CMOS_MAX_NAME_LENGTH)
- { fprintf(stderr, "%s: Error on line %d of CMOS layout file: name too "
- "long (max length is %d).\n", prog_name, line_num,
- CMOS_MAX_NAME_LENGTH - 1);
- exit(1);
- }
+ if (strlen(name_str) >= CMOS_MAX_NAME_LENGTH) {
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file: name too "
+ "long (max length is %d).\n", prog_name, line_num,
+ CMOS_MAX_NAME_LENGTH - 1);
+ exit(1);
+ }
- strcpy(cmos_entry->name, name_str);
- return;
+ strcpy(cmos_entry->name, name_str);
+ return;
-bad_config_str:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file: 'e', 'h', or "
- "'r' expected for config value.\n", prog_name, line_num);
- exit(1);
- }
+ bad_config_str:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file: 'e', 'h', or "
+ "'r' expected for config value.\n", prog_name, line_num);
+ exit(1);
+}
/****************************************************************************
* try_add_layout_file_entry
@@ -586,44 +604,48 @@
* Attempt to add the given CMOS entry to our internal repository. Exit with
* an error message on failure.
****************************************************************************/
-static void try_add_layout_file_entry (const cmos_entry_t *cmos_entry)
- { const cmos_entry_t *conflict;
+static void try_add_layout_file_entry(const cmos_entry_t * cmos_entry)
+{
+ const cmos_entry_t *conflict;
- switch (add_cmos_entry(cmos_entry, &conflict))
- { case OK:
- return;
+ switch (add_cmos_entry(cmos_entry, &conflict)) {
+ case OK:
+ return;
- case CMOS_AREA_OUT_OF_RANGE:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. Area "
- "covered by entry %s is out of range.\n", prog_name,
- line_num, cmos_entry->name);
- break;
+ case CMOS_AREA_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. Area "
+ "covered by entry %s is out of range.\n", prog_name,
+ line_num, cmos_entry->name);
+ break;
- case CMOS_AREA_TOO_WIDE:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. Area "
- "covered by entry %s is too wide.\n", prog_name, line_num,
- cmos_entry->name);
- break;
+ case CMOS_AREA_TOO_WIDE:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. Area "
+ "covered by entry %s is too wide.\n", prog_name,
+ line_num, cmos_entry->name);
+ break;
- case LAYOUT_ENTRY_OVERLAP:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. Layouts "
- "overlap for entries %s and %s.\n", prog_name, line_num,
- cmos_entry->name, conflict->name);
- break;
+ case LAYOUT_ENTRY_OVERLAP:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. Layouts "
+ "overlap for entries %s and %s.\n", prog_name, line_num,
+ cmos_entry->name, conflict->name);
+ break;
- case LAYOUT_ENTRY_BAD_LENGTH:
- /* Silently ignore entries with zero length. Although this should
- * never happen in practice, we should handle the case in a
- * reasonable manner just to be safe.
- */
- return;
+ case LAYOUT_ENTRY_BAD_LENGTH:
+ /* Silently ignore entries with zero length. Although this should
+ * never happen in practice, we should handle the case in a
+ * reasonable manner just to be safe.
+ */
+ return;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- exit(1);
- }
+ exit(1);
+}
/****************************************************************************
* create_enum
@@ -631,20 +653,22 @@
* Create a CMOS enumeration structure representing the given information.
* Perform sanity checking on input parameters.
****************************************************************************/
-static void create_enum (cmos_enum_t *cmos_enum, const char id_str[],
- const char value_str[], const char text_str[])
- { cmos_enum->config_id = string_to_unsigned(id_str, "ID");
- cmos_enum->value = string_to_unsigned_long(value_str, "value");
+static void create_enum(cmos_enum_t * cmos_enum, const char id_str[],
+ const char value_str[], const char text_str[])
+{
+ cmos_enum->config_id = string_to_unsigned(id_str, "ID");
+ cmos_enum->value = string_to_unsigned_long(value_str, "value");
- if (strlen(text_str) >= CMOS_MAX_TEXT_LENGTH)
- { fprintf(stderr, "%s: Error on line %d of CMOS layout file: text too "
- "long (max length is %d).\n", prog_name, line_num,
- CMOS_MAX_TEXT_LENGTH - 1);
- exit(1);
- }
+ if (strlen(text_str) >= CMOS_MAX_TEXT_LENGTH) {
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file: text too "
+ "long (max length is %d).\n", prog_name, line_num,
+ CMOS_MAX_TEXT_LENGTH - 1);
+ exit(1);
+ }
- strcpy(cmos_enum->text, text_str);
- }
+ strcpy(cmos_enum->text, text_str);
+}
/****************************************************************************
* try_add_cmos_enum
@@ -652,23 +676,24 @@
* Attempt to add the given CMOS enum to our internal repository. Exit with
* an error message on failure.
****************************************************************************/
-static void try_add_cmos_enum (const cmos_enum_t *cmos_enum)
- { switch (add_cmos_enum(cmos_enum))
- { case OK:
- return;
+static void try_add_cmos_enum(const cmos_enum_t * cmos_enum)
+{
+ switch (add_cmos_enum(cmos_enum)) {
+ case OK:
+ return;
- case LAYOUT_DUPLICATE_ENUM:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file: "
- "Enumeration found with duplicate ID/value combination.\n",
- prog_name, line_num);
- break;
+ case LAYOUT_DUPLICATE_ENUM:
+ fprintf(stderr, "%s: Error on line %d of CMOS layout file: "
+ "Enumeration found with duplicate ID/value combination.\n",
+ prog_name, line_num);
+ break;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- exit(1);
- }
+ exit(1);
+}
/****************************************************************************
* set_checksum_info
@@ -676,100 +701,111 @@
* Set CMOS checksum information according to input parameters and perform
* sanity checking on input parameters.
****************************************************************************/
-static void set_checksum_info (const char start_str[], const char end_str[],
- const char index_str[])
- { cmos_checksum_layout_t layout;
+static void set_checksum_info(const char start_str[], const char end_str[],
+ const char index_str[])
+{
+ cmos_checksum_layout_t layout;
- /* These are bit positions that we want to convert to byte positions. */
- layout.summed_area_start =
- string_to_unsigned(start_str, "CMOS checksummed area start");
- layout.summed_area_end =
- string_to_unsigned(end_str, "CMOS checksummed area end");
- layout.checksum_at =
- string_to_unsigned(index_str, "CMOS checksum location");
+ /* These are bit positions that we want to convert to byte positions. */
+ layout.summed_area_start =
+ string_to_unsigned(start_str, "CMOS checksummed area start");
+ layout.summed_area_end =
+ string_to_unsigned(end_str, "CMOS checksummed area end");
+ layout.checksum_at =
+ string_to_unsigned(index_str, "CMOS checksum location");
- switch (checksum_layout_to_bytes(&layout))
- { case OK:
- break;
+ switch (checksum_layout_to_bytes(&layout)) {
+ case OK:
+ break;
- case LAYOUT_SUMMED_AREA_START_NOT_ALIGNED:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. CMOS "
- "checksummed area start is not byte-aligned.\n", prog_name,
- line_num);
- goto fail;
+ case LAYOUT_SUMMED_AREA_START_NOT_ALIGNED:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. CMOS "
+ "checksummed area start is not byte-aligned.\n",
+ prog_name, line_num);
+ goto fail;
- case LAYOUT_SUMMED_AREA_END_NOT_ALIGNED:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. CMOS "
- "checksummed area end is not byte-aligned.\n", prog_name,
- line_num);
- goto fail;
+ case LAYOUT_SUMMED_AREA_END_NOT_ALIGNED:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. CMOS "
+ "checksummed area end is not byte-aligned.\n",
+ prog_name, line_num);
+ goto fail;
- case LAYOUT_CHECKSUM_LOCATION_NOT_ALIGNED:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. CMOS "
- "checksum location is not byte-aligned.\n", prog_name,
- line_num);
- goto fail;
+ case LAYOUT_CHECKSUM_LOCATION_NOT_ALIGNED:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. CMOS "
+ "checksum location is not byte-aligned.\n", prog_name,
+ line_num);
+ goto fail;
- case LAYOUT_INVALID_SUMMED_AREA:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. CMOS "
- "checksummed area end must be greater than CMOS checksummed "
- "area start.\n", prog_name, line_num);
- goto fail;
+ case LAYOUT_INVALID_SUMMED_AREA:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. CMOS "
+ "checksummed area end must be greater than CMOS checksummed "
+ "area start.\n", prog_name, line_num);
+ goto fail;
- case LAYOUT_CHECKSUM_OVERLAPS_SUMMED_AREA:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. CMOS "
- "checksum overlaps checksummed area.\n", prog_name,
- line_num);
- goto fail;
+ case LAYOUT_CHECKSUM_OVERLAPS_SUMMED_AREA:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. CMOS "
+ "checksum overlaps checksummed area.\n", prog_name,
+ line_num);
+ goto fail;
- case LAYOUT_SUMMED_AREA_OUT_OF_RANGE:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. CMOS "
- "checksummed area out of range.\n", prog_name, line_num);
- goto fail;
+ case LAYOUT_SUMMED_AREA_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. CMOS "
+ "checksummed area out of range.\n", prog_name,
+ line_num);
+ goto fail;
- case LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file. CMOS "
- "checksum location out of range.\n", prog_name, line_num);
- goto fail;
+ case LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file. CMOS "
+ "checksum location out of range.\n", prog_name,
+ line_num);
+ goto fail;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- cmos_checksum_start = layout.summed_area_start;
- cmos_checksum_end = layout.summed_area_end;
- cmos_checksum_index = layout.checksum_at;
- return;
+ cmos_checksum_start = layout.summed_area_start;
+ cmos_checksum_end = layout.summed_area_end;
+ cmos_checksum_index = layout.checksum_at;
+ return;
-fail:
- exit(1);
- }
+ fail:
+ exit(1);
+}
/****************************************************************************
* cmos_entry_char_value
*
* Return the character representation of 'config'.
****************************************************************************/
-static char cmos_entry_char_value (cmos_entry_config_t config)
- { switch (config)
- { case CMOS_ENTRY_ENUM:
- return 'e';
+static char cmos_entry_char_value(cmos_entry_config_t config)
+{
+ switch (config) {
+ case CMOS_ENTRY_ENUM:
+ return 'e';
- case CMOS_ENTRY_HEX:
- return 'h';
+ case CMOS_ENTRY_HEX:
+ return 'h';
- case CMOS_ENTRY_RESERVED:
- return 'r';
+ case CMOS_ENTRY_RESERVED:
+ return 'r';
- case CMOS_ENTRY_STRING:
- return 's';
+ case CMOS_ENTRY_STRING:
+ return 's';
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- return 0; /* not reached */
- }
+ return 0; /* not reached */
+}
/****************************************************************************
* get_layout_file_line
@@ -778,56 +814,62 @@
* array of 'line_buf_size' bytes. Return OK on success or an error code on
* failure.
****************************************************************************/
-static int get_layout_file_line (FILE *f, char line[], int line_buf_size)
- { switch (get_line_from_file(f, line, line_buf_size))
- { case OK:
- return OK;
+static int get_layout_file_line(FILE * f, char line[], int line_buf_size)
+{
+ switch (get_line_from_file(f, line, line_buf_size)) {
+ case OK:
+ return OK;
- case LINE_EOF:
- return LINE_EOF;
+ case LINE_EOF:
+ return LINE_EOF;
- case LINE_TOO_LONG:
- fprintf(stderr, "%s: Error on line %d of CMOS layout file: Maximum "
- "line length exceeded. Max is %d characters.\n", prog_name,
- line_num, line_buf_size - 2);
- break;
- }
+ case LINE_TOO_LONG:
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file: Maximum "
+ "line length exceeded. Max is %d characters.\n",
+ prog_name, line_num, line_buf_size - 2);
+ break;
+ }
- exit(1);
- return 1; /* keep compiler happy */
- }
+ exit(1);
+ return 1; /* keep compiler happy */
+}
/****************************************************************************
* string_to_unsigned
*
* Convert the string 'str' to an unsigned and return the result.
****************************************************************************/
-static unsigned string_to_unsigned (const char str[], const char str_name[])
- { unsigned long n;
- unsigned z;
+static unsigned string_to_unsigned(const char str[], const char str_name[])
+{
+ unsigned long n;
+ unsigned z;
- n = do_string_to_unsigned_long(str, str_name, "");
+ n = do_string_to_unsigned_long(str, str_name, "");
- if ((z = (unsigned) n) != n)
- { /* This could happen on an architecture in which sizeof(unsigned) <
- * sizeof(unsigned long).
- */
- fprintf(stderr, "%s: Error on line %d of CMOS layout file: %s value is "
- "out of range.\n", prog_name, line_num, str_name);
- exit(1);
- }
+ if ((z = (unsigned)n) != n) {
+ /* This could happen on an architecture in which
+ * sizeof(unsigned) < sizeof(unsigned long).
+ */
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file: %s value is "
+ "out of range.\n", prog_name, line_num, str_name);
+ exit(1);
+ }
- return z;
- }
+ return z;
+}
/****************************************************************************
* string_to_unsigned_long
*
* Convert the string 'str' to an unsigned long and return the result.
****************************************************************************/
-static unsigned long string_to_unsigned_long (const char str[],
- const char str_name[])
- { return do_string_to_unsigned_long(str, str_name, " long"); }
+static unsigned long string_to_unsigned_long(const char str[],
+ const char str_name[])
+{
+ return do_string_to_unsigned_long(str, str_name, " long");
+}
/****************************************************************************
* do_string_to_unsigned_long
@@ -835,20 +877,22 @@
* Convert the string 'str' to an unsigned long and return the result. Exit
* with an appropriate error message on failure.
****************************************************************************/
-static unsigned long do_string_to_unsigned_long (const char str[],
- const char str_name[],
- const char blurb[])
- { unsigned long n;
- char *p;
+static unsigned long do_string_to_unsigned_long(const char str[],
+ const char str_name[],
+ const char blurb[])
+{
+ unsigned long n;
+ char *p;
- n = strtoul(str, &p, 0);
+ n = strtoul(str, &p, 0);
- if (*p != '\0')
- { fprintf(stderr, "%s: Error on line %d of CMOS layout file: %s is not a "
- "valid unsigned%s integer.\n", prog_name,
- line_num, str_name, blurb);
- exit(1);
- }
+ if (*p != '\0') {
+ fprintf(stderr,
+ "%s: Error on line %d of CMOS layout file: %s is not a "
+ "valid unsigned%s integer.\n", prog_name, line_num,
+ str_name, blurb);
+ exit(1);
+ }
- return n;
- }
+ return n;
+}
Modified: trunk/util/nvramtool/layout_file.h
===================================================================
--- trunk/util/nvramtool/layout_file.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/layout_file.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -34,8 +34,8 @@
#include "common.h"
#include "coreboot_tables.h"
-void set_layout_filename (const char filename[]);
-void get_layout_from_file (void);
-void write_cmos_layout (FILE *f);
+void set_layout_filename(const char filename[]);
+void get_layout_from_file(void);
+void write_cmos_layout(FILE * f);
-#endif /* LAYOUT_FILE_H */
+#endif /* LAYOUT_FILE_H */
Modified: trunk/util/nvramtool/lbtable.c
===================================================================
--- trunk/util/nvramtool/lbtable.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/lbtable.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -39,115 +39,110 @@
#include "cmos_lowlevel.h"
#include "hexdump.h"
-typedef void (*lbtable_print_fn_t) (const struct lb_record *rec);
+typedef void (*lbtable_print_fn_t) (const struct lb_record * rec);
/* This structure represents an item in the coreboot table that may be
* displayed using the -l option.
*/
-typedef struct
- { uint32_t tag;
- const char *name;
- const char *description;
- const char *nofound_msg;
- lbtable_print_fn_t print_fn;
- }
-lbtable_choice_t;
+typedef struct {
+ uint32_t tag;
+ const char *name;
+ const char *description;
+ const char *nofound_msg;
+ lbtable_print_fn_t print_fn;
+} lbtable_choice_t;
-typedef struct
- { unsigned long start; /* address of first byte of memory range */
- unsigned long end; /* address of last byte of memory range */
- }
-mem_range_t;
+typedef struct {
+ unsigned long start; /* address of first byte of memory range */
+ unsigned long end; /* address of last byte of memory range */
+} mem_range_t;
-static const struct lb_header * lbtable_scan (unsigned long start,
- unsigned long end,
- int *bad_header_count,
- int *bad_table_count);
-static void process_cmos_table (void);
-static void get_cmos_checksum_info (void);
-static void try_convert_checksum_layout (cmos_checksum_layout_t *layout);
-static void try_add_cmos_table_enum (cmos_enum_t *cmos_enum);
-static void try_add_cmos_table_entry (cmos_entry_t *cmos_entry);
-static const struct lb_record * find_lbrec (uint32_t tag);
-static const char * lbrec_tag_to_str (uint32_t tag);
-static const struct cmos_entries * first_cmos_table_entry (void);
-static const struct cmos_entries *
- next_cmos_table_entry (const struct cmos_entries *last);
-static const struct cmos_enums * first_cmos_table_enum (void);
-static const struct cmos_enums * next_cmos_table_enum
- (const struct cmos_enums *last);
-static const struct lb_record * first_cmos_rec (uint32_t tag);
-static const struct lb_record * next_cmos_rec (const struct lb_record *last,
- uint32_t tag);
-static void memory_print_fn (const struct lb_record *rec);
-static void mainboard_print_fn (const struct lb_record *rec);
-static void cmos_opt_table_print_fn (const struct lb_record *rec);
-static void print_option_record (const struct cmos_entries *cmos_entry);
-static void print_enum_record (const struct cmos_enums *cmos_enum);
-static void print_defaults_record (const struct cmos_defaults *cmos_defaults);
-static void print_unknown_record (const struct lb_record *cmos_item);
-static void option_checksum_print_fn (const struct lb_record *rec);
-static void string_print_fn (const struct lb_record *rec);
-static void uint64_to_hex_string (char str[], uint64_t n);
+static const struct lb_header *lbtable_scan(unsigned long start,
+ unsigned long end,
+ int *bad_header_count,
+ int *bad_table_count);
+static void process_cmos_table(void);
+static void get_cmos_checksum_info(void);
+static void try_convert_checksum_layout(cmos_checksum_layout_t * layout);
+static void try_add_cmos_table_enum(cmos_enum_t * cmos_enum);
+static void try_add_cmos_table_entry(cmos_entry_t * cmos_entry);
+static const struct lb_record *find_lbrec(uint32_t tag);
+static const char *lbrec_tag_to_str(uint32_t tag);
+static const struct cmos_entries *first_cmos_table_entry(void);
+static const struct cmos_entries *next_cmos_table_entry(const struct
+ cmos_entries *last);
+static const struct cmos_enums *first_cmos_table_enum(void);
+static const struct cmos_enums *next_cmos_table_enum
+ (const struct cmos_enums *last);
+static const struct lb_record *first_cmos_rec(uint32_t tag);
+static const struct lb_record *next_cmos_rec(const struct lb_record *last,
+ uint32_t tag);
+static void memory_print_fn(const struct lb_record *rec);
+static void mainboard_print_fn(const struct lb_record *rec);
+static void cmos_opt_table_print_fn(const struct lb_record *rec);
+static void print_option_record(const struct cmos_entries *cmos_entry);
+static void print_enum_record(const struct cmos_enums *cmos_enum);
+static void print_defaults_record(const struct cmos_defaults *cmos_defaults);
+static void print_unknown_record(const struct lb_record *cmos_item);
+static void option_checksum_print_fn(const struct lb_record *rec);
+static void string_print_fn(const struct lb_record *rec);
+static void uint64_to_hex_string(char str[], uint64_t n);
static const char memory_desc[] =
-" This shows information about system memory.\n";
+ " This shows information about system memory.\n";
static const char mainboard_desc[] =
-" This shows information about your mainboard.\n";
+ " This shows information about your mainboard.\n";
static const char version_desc[] =
-" This shows coreboot version information.\n";
+ " This shows coreboot version information.\n";
static const char extra_version_desc[] =
-" This shows extra coreboot version information.\n";
+ " This shows extra coreboot version information.\n";
-static const char build_desc[] =
-" This shows coreboot build information.\n";
+static const char build_desc[] = " This shows coreboot build information.\n";
static const char compile_time_desc[] =
-" This shows when coreboot was compiled.\n";
+ " This shows when coreboot was compiled.\n";
-static const char compile_by_desc[] =
-" This shows who compiled coreboot.\n";
+static const char compile_by_desc[] = " This shows who compiled coreboot.\n";
static const char compile_host_desc[] =
-" This shows the name of the machine that compiled coreboot.\n";
+ " This shows the name of the machine that compiled coreboot.\n";
static const char compile_domain_desc[] =
-" This shows the domain name of the machine that compiled coreboot.\n";
+ " This shows the domain name of the machine that compiled coreboot.\n";
static const char compiler_desc[] =
-" This shows the name of the compiler used to build coreboot.\n";
+ " This shows the name of the compiler used to build coreboot.\n";
static const char linker_desc[] =
-" This shows the name of the linker used to build coreboot.\n";
+ " This shows the name of the linker used to build coreboot.\n";
static const char assembler_desc[] =
-" This shows the name of the assembler used to build coreboot.\n";
+ " This shows the name of the assembler used to build coreboot.\n";
static const char cmos_opt_table_desc[] =
-" This does a low-level dump of the CMOS option table. The table "
-"contains\n"
-" information about the layout of the values that coreboot stores in\n"
-" nonvolatile RAM.\n";
+ " This does a low-level dump of the CMOS option table. The table "
+ "contains\n"
+ " information about the layout of the values that coreboot stores in\n"
+ " nonvolatile RAM.\n";
static const char option_checksum_desc[] =
-" This shows the location of the CMOS checksum and the area over which it "
-"is\n"
-" calculated.\n";
+ " This shows the location of the CMOS checksum and the area over which it "
+ "is\n" " calculated.\n";
static const char generic_nofound_msg[] =
-"%s: Item %s not found in coreboot table.\n";
+ "%s: Item %s not found in coreboot table.\n";
static const char nofound_msg_cmos_opt_table[] =
-"%s: Item %s not found in coreboot table. Apparently, the "
-"coreboot installed on this system was built without specifying "
-"CONFIG_HAVE_OPTION_TABLE.\n";
+ "%s: Item %s not found in coreboot table. Apparently, the "
+ "coreboot installed on this system was built without specifying "
+ "CONFIG_HAVE_OPTION_TABLE.\n";
static const char nofound_msg_option_checksum[] =
-"%s: Item %s not found in coreboot table. Apparently, you are "
-"using coreboot v1.\n";
+ "%s: Item %s not found in coreboot table. Apparently, you are "
+ "using coreboot v1.\n";
int fd;
@@ -160,63 +155,49 @@
* displayed using the -l option.
*/
static const lbtable_choice_t lbtable_choices[NUM_LBTABLE_CHOICES] =
- { { LB_TAG_MEMORY, "memory",
- memory_desc, generic_nofound_msg,
- memory_print_fn
- },
- { LB_TAG_MAINBOARD, "mainboard",
- mainboard_desc, generic_nofound_msg,
- mainboard_print_fn
- },
- { LB_TAG_VERSION, "version",
- version_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_EXTRA_VERSION, "extra_version",
- extra_version_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_BUILD, "build",
- build_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_COMPILE_TIME, "compile_time",
- compile_time_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_COMPILE_BY, "compile_by",
- compile_by_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_COMPILE_HOST, "compile_host",
- compile_host_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_COMPILE_DOMAIN, "compile_domain",
- compile_domain_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_COMPILER, "compiler",
- compiler_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_LINKER, "linker",
- linker_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_ASSEMBLER, "assembler",
- assembler_desc, generic_nofound_msg,
- string_print_fn
- },
- { LB_TAG_CMOS_OPTION_TABLE, "cmos_opt_table",
- cmos_opt_table_desc, nofound_msg_cmos_opt_table,
- cmos_opt_table_print_fn
- },
- { LB_TAG_OPTION_CHECKSUM, "option_checksum",
- option_checksum_desc, nofound_msg_option_checksum,
- option_checksum_print_fn
- }
- };
+ { {LB_TAG_MEMORY, "memory",
+ memory_desc, generic_nofound_msg,
+ memory_print_fn},
+{LB_TAG_MAINBOARD, "mainboard",
+ mainboard_desc, generic_nofound_msg,
+ mainboard_print_fn},
+{LB_TAG_VERSION, "version",
+ version_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_EXTRA_VERSION, "extra_version",
+ extra_version_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_BUILD, "build",
+ build_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_COMPILE_TIME, "compile_time",
+ compile_time_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_COMPILE_BY, "compile_by",
+ compile_by_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_COMPILE_HOST, "compile_host",
+ compile_host_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_COMPILE_DOMAIN, "compile_domain",
+ compile_domain_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_COMPILER, "compiler",
+ compiler_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_LINKER, "linker",
+ linker_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_ASSEMBLER, "assembler",
+ assembler_desc, generic_nofound_msg,
+ string_print_fn},
+{LB_TAG_CMOS_OPTION_TABLE, "cmos_opt_table",
+ cmos_opt_table_desc, nofound_msg_cmos_opt_table,
+ cmos_opt_table_print_fn},
+{LB_TAG_OPTION_CHECKSUM, "option_checksum",
+ option_checksum_desc, nofound_msg_option_checksum,
+ option_checksum_print_fn}
+};
/* The coreboot table resides in low physical memory, which we access using
* /dev/mem. These are ranges of physical memory that should be scanned for a
@@ -226,9 +207,9 @@
#define NUM_MEM_RANGES 2
static const mem_range_t mem_ranges[NUM_MEM_RANGES] =
- { { 0x00000000, 0x00000fff },
- { 0x000f0000, 0x000fffff }
- };
+ { {0x00000000, 0x00000fff},
+{0x000f0000, 0x000fffff}
+};
/* This is the number of bytes of physical memory to map, starting at physical
* address 0. This value must be large enough to contain all memory ranges
@@ -253,7 +234,7 @@
static const struct cmos_option_table *cmos_table = NULL;
static const hexdump_format_t format =
- { 12, 4, " ", " | ", " ", " | ", '.', NULL };
+ { 12, 4, " ", " | ", " ", " | ", '.', NULL };
/****************************************************************************
* vtophys
@@ -282,56 +263,57 @@
*
* Find the coreboot table and set global variable lbtable to point to it.
****************************************************************************/
-void get_lbtable (void)
- { int i, bad_header_count, bad_table_count, bad_headers, bad_tables;
+void get_lbtable(void)
+{
+ int i, bad_header_count, bad_table_count, bad_headers, bad_tables;
- if (lbtable != NULL)
- return;
+ if (lbtable != NULL)
+ return;
- /* The coreboot table is located in low physical memory, which may be
- * conveniently accessed by calling mmap() on /dev/mem.
- */
+ /* The coreboot table is located in low physical memory, which may be
+ * conveniently accessed by calling mmap() on /dev/mem.
+ */
- if ((fd = open("/dev/mem", O_RDONLY, 0)) < 0)
- { fprintf(stderr, "%s: Can not open /dev/mem for reading: %s\n",
- prog_name, strerror(errno));
- exit(1);
- }
+ if ((fd = open("/dev/mem", O_RDONLY, 0)) < 0) {
+ fprintf(stderr, "%s: Can not open /dev/mem for reading: %s\n",
+ prog_name, strerror(errno));
+ exit(1);
+ }
- if ((low_phys_mem = mmap(NULL, BYTES_TO_MAP, PROT_READ, MAP_SHARED, fd, 0))
- == MAP_FAILED)
- { fprintf(stderr, "%s: Failed to mmap /dev/mem: %s\n", prog_name,
- strerror(errno));
- exit(1);
- }
+ if ((low_phys_mem =
+ mmap(NULL, BYTES_TO_MAP, PROT_READ, MAP_SHARED, fd, 0))
+ == MAP_FAILED) {
+ fprintf(stderr, "%s: Failed to mmap /dev/mem: %s\n", prog_name,
+ strerror(errno));
+ exit(1);
+ }
- bad_header_count = 0;
- bad_table_count = 0;
+ bad_header_count = 0;
+ bad_table_count = 0;
- for (i = 0; i < NUM_MEM_RANGES; i++)
- { lbtable = lbtable_scan(phystov(mem_ranges[i].start),
- phystov(mem_ranges[i].end),
- &bad_headers, &bad_tables);
+ for (i = 0; i < NUM_MEM_RANGES; i++) {
+ lbtable = lbtable_scan(phystov(mem_ranges[i].start),
+ phystov(mem_ranges[i].end),
+ &bad_headers, &bad_tables);
- if (lbtable != NULL)
- return; /* success: we found it! */
+ if (lbtable != NULL)
+ return; /* success: we found it! */
- bad_header_count += bad_headers;
- bad_table_count += bad_tables;
- }
+ bad_header_count += bad_headers;
+ bad_table_count += bad_tables;
+ }
- fprintf(stderr,
- "%s: coreboot table not found. coreboot does not appear to\n"
- " be installed on this system. Scanning for the table "
- "produced the\n"
- " following results:\n\n"
- " %d valid signatures were found with bad header "
- "checksums.\n"
- " %d valid headers were found with bad table "
- "checksums.\n",
- prog_name, bad_header_count, bad_table_count);
- exit(1);
- }
+ fprintf(stderr,
+ "%s: coreboot table not found. coreboot does not appear to\n"
+ " be installed on this system. Scanning for the table "
+ "produced the\n"
+ " following results:\n\n"
+ " %d valid signatures were found with bad header "
+ "checksums.\n"
+ " %d valid headers were found with bad table "
+ "checksums.\n", prog_name, bad_header_count, bad_table_count);
+ exit(1);
+}
/****************************************************************************
* get_layout_from_cmos_table
@@ -339,84 +321,87 @@
* Find the CMOS table which is stored within the coreboot table and set the
* global variable cmos_table to point to it.
****************************************************************************/
-void get_layout_from_cmos_table (void)
- {
+void get_layout_from_cmos_table(void)
+{
- get_lbtable();
- cmos_table = (const struct cmos_option_table *)
- find_lbrec(LB_TAG_CMOS_OPTION_TABLE);
+ get_lbtable();
+ cmos_table = (const struct cmos_option_table *)
+ find_lbrec(LB_TAG_CMOS_OPTION_TABLE);
- if ((cmos_table) == NULL)
- { fprintf(stderr,
- "%s: CMOS option table not found in coreboot table. "
- "Apparently, the coreboot installed on this system was "
- "built without specifying CONFIG_HAVE_OPTION_TABLE.\n",
- prog_name);
- exit(1);
- }
+ if ((cmos_table) == NULL) {
+ fprintf(stderr,
+ "%s: CMOS option table not found in coreboot table. "
+ "Apparently, the coreboot installed on this system was "
+ "built without specifying CONFIG_HAVE_OPTION_TABLE.\n",
+ prog_name);
+ exit(1);
+ }
- process_cmos_table();
- get_cmos_checksum_info();
- }
+ process_cmos_table();
+ get_cmos_checksum_info();
+}
/****************************************************************************
* dump_lbtable
*
* Do a low-level dump of the coreboot table.
****************************************************************************/
-void dump_lbtable (void)
- { const char *p, *data;
- uint32_t bytes_processed;
- const struct lb_record *lbrec;
+void dump_lbtable(void)
+{
+ const char *p, *data;
+ uint32_t bytes_processed;
+ const struct lb_record *lbrec;
- p = ((const char *) lbtable) + lbtable->header_bytes;
- printf("Coreboot table at physical address 0x%lx:\n"
- " signature: 0x%x (ASCII: %c%c%c%c)\n"
- " header_bytes: 0x%x (decimal: %d)\n"
- " header_checksum: 0x%x (decimal: %d)\n"
- " table_bytes: 0x%x (decimal: %d)\n"
- " table_checksum: 0x%x (decimal: %d)\n"
- " table_entries: 0x%x (decimal: %d)\n\n",
- vtophys(lbtable), *((uint32_t *) lbtable->signature),
- lbtable->signature[0], lbtable->signature[1],lbtable->signature[2],
- lbtable->signature[3], lbtable->header_bytes, lbtable->header_bytes,
- lbtable->header_checksum, lbtable->header_checksum,
- lbtable->table_bytes, lbtable->table_bytes, lbtable->table_checksum,
- lbtable->table_checksum, lbtable->table_entries,
- lbtable->table_entries);
+ p = ((const char *)lbtable) + lbtable->header_bytes;
+ printf("Coreboot table at physical address 0x%lx:\n"
+ " signature: 0x%x (ASCII: %c%c%c%c)\n"
+ " header_bytes: 0x%x (decimal: %d)\n"
+ " header_checksum: 0x%x (decimal: %d)\n"
+ " table_bytes: 0x%x (decimal: %d)\n"
+ " table_checksum: 0x%x (decimal: %d)\n"
+ " table_entries: 0x%x (decimal: %d)\n\n",
+ vtophys(lbtable), *((uint32_t *) lbtable->signature),
+ lbtable->signature[0], lbtable->signature[1],
+ lbtable->signature[2], lbtable->signature[3],
+ lbtable->header_bytes, lbtable->header_bytes,
+ lbtable->header_checksum, lbtable->header_checksum,
+ lbtable->table_bytes, lbtable->table_bytes,
+ lbtable->table_checksum, lbtable->table_checksum,
+ lbtable->table_entries, lbtable->table_entries);
- if ((lbtable->table_bytes == 0) != (lbtable->table_entries == 0))
- { printf("Inconsistent values for table_bytes and table_entries!!!\n"
- "They should be either both 0 or both nonzero.\n");
- return;
- }
+ if ((lbtable->table_bytes == 0) != (lbtable->table_entries == 0)) {
+ printf
+ ("Inconsistent values for table_bytes and table_entries!!!\n"
+ "They should be either both 0 or both nonzero.\n");
+ return;
+ }
- if (lbtable->table_bytes == 0)
- { printf("The coreboot table is empty!!!\n");
- return;
- }
+ if (lbtable->table_bytes == 0) {
+ printf("The coreboot table is empty!!!\n");
+ return;
+ }
- for (bytes_processed = 0; ; )
- { lbrec = (const struct lb_record *) &p[bytes_processed];
- printf(" %s record at physical address 0x%lx:\n"
- " tag: 0x%x (decimal: %d)\n"
- " size: 0x%x (decimal: %d)\n"
- " data:\n",
- lbrec_tag_to_str(lbrec->tag), vtophys(lbrec), lbrec->tag,
- lbrec->tag, lbrec->size, lbrec->size);
+ for (bytes_processed = 0;;) {
+ lbrec = (const struct lb_record *)&p[bytes_processed];
+ printf(" %s record at physical address 0x%lx:\n"
+ " tag: 0x%x (decimal: %d)\n"
+ " size: 0x%x (decimal: %d)\n"
+ " data:\n",
+ lbrec_tag_to_str(lbrec->tag), vtophys(lbrec), lbrec->tag,
+ lbrec->tag, lbrec->size, lbrec->size);
- data = ((const char *) lbrec) + sizeof(*lbrec);
- hexdump(data, lbrec->size - sizeof(*lbrec), vtophys(data), stdout,
- &format);
+ data = ((const char *)lbrec) + sizeof(*lbrec);
+ hexdump(data, lbrec->size - sizeof(*lbrec), vtophys(data),
+ stdout, &format);
- bytes_processed += lbrec->size;
+ bytes_processed += lbrec->size;
- if (bytes_processed >= lbtable->table_bytes)
- break;
+ if (bytes_processed >= lbtable->table_bytes)
+ break;
- printf("\n");
- }
- }
+ printf("\n");
+ }
+}
/****************************************************************************
* list_lbtable_choices
@@ -424,48 +409,50 @@
* List names and informational blurbs for items from the coreboot table
* that may be displayed using the -l option.
****************************************************************************/
-void list_lbtable_choices (void)
- { int i;
+void list_lbtable_choices(void)
+{
+ int i;
- for (i = 0; ; )
- { printf("%s:\n%s",
- lbtable_choices[i].name, lbtable_choices[i].description);
+ for (i = 0;;) {
+ printf("%s:\n%s",
+ lbtable_choices[i].name, lbtable_choices[i].description);
- if (++i >= NUM_LBTABLE_CHOICES)
- break;
+ if (++i >= NUM_LBTABLE_CHOICES)
+ break;
- printf("\n");
- }
- }
+ printf("\n");
+ }
+}
/****************************************************************************
* list_lbtable_item
*
* Show the coreboot table item specified by 'item'.
****************************************************************************/
-void list_lbtable_item (const char item[])
- { int i;
- const struct lb_record *rec;
+void list_lbtable_item(const char item[])
+{
+ int i;
+ const struct lb_record *rec;
- for (i = 0; i < NUM_LBTABLE_CHOICES; i++)
- { if (strcmp(item, lbtable_choices[i].name) == 0)
- break;
- }
+ for (i = 0; i < NUM_LBTABLE_CHOICES; i++) {
+ if (strcmp(item, lbtable_choices[i].name) == 0)
+ break;
+ }
- if (i == NUM_LBTABLE_CHOICES)
- { fprintf(stderr, "%s: Invalid coreboot table item %s.\n", prog_name,
- item);
- exit(1);
- }
+ if (i == NUM_LBTABLE_CHOICES) {
+ fprintf(stderr, "%s: Invalid coreboot table item %s.\n",
+ prog_name, item);
+ exit(1);
+ }
- if ((rec = find_lbrec(lbtable_choices[i].tag)) == NULL)
- { fprintf(stderr, lbtable_choices[i].nofound_msg, prog_name,
- lbtable_choices[i].name);
- exit(1);
- }
+ if ((rec = find_lbrec(lbtable_choices[i].tag)) == NULL) {
+ fprintf(stderr, lbtable_choices[i].nofound_msg, prog_name,
+ lbtable_choices[i].name);
+ exit(1);
+ }
- lbtable_choices[i].print_fn(rec);
- }
+ lbtable_choices[i].print_fn(rec);
+}
/****************************************************************************
* lbtable_scan
@@ -491,197 +478,210 @@
* Indicates the number of times in which a header with a valid
* checksum was found but the table checksum was invalid.
****************************************************************************/
-static const struct lb_header * lbtable_scan (unsigned long start,
- unsigned long end,
- int *bad_header_count,
- int *bad_table_count)
- { static const char signature[] = { 'L', 'B', 'I', 'O' };
- const struct lb_header *table;
- const struct lb_forward *forward;
- const uint32_t *p;
- uint32_t sig;
+static const struct lb_header *lbtable_scan(unsigned long start,
+ unsigned long end,
+ int *bad_header_count,
+ int *bad_table_count)
+{
+ static const char signature[] = { 'L', 'B', 'I', 'O' };
+ const struct lb_header *table;
+ const struct lb_forward *forward;
+ const uint32_t *p;
+ uint32_t sig;
- assert(end >= start);
- sig = (*((const uint32_t *) signature));
- table = NULL;
- *bad_header_count = 0;
- *bad_table_count = 0;
+ assert(end >= start);
+ sig = (*((const uint32_t *)signature));
+ table = NULL;
+ *bad_header_count = 0;
+ *bad_table_count = 0;
- /* Look for signature. Table is aligned on 16-byte boundary. Therefore
- * only check every fourth 32-bit memory word. As the loop is coded below,
- * this function will behave in a reasonable manner for ALL possible values
- * for 'start' and 'end': even weird boundary cases like 0x00000000 and
- * 0xffffffff on a 32-bit architecture.
- */
- for (p = (const uint32_t *) start;
- (((unsigned long) p) <= end) &&
- ((end - (unsigned long) p) >= (sizeof(uint32_t) - 1));
- p += 4)
- { if (*p != sig)
- continue;
+ /* Look for signature. Table is aligned on 16-byte boundary. Therefore
+ * only check every fourth 32-bit memory word. As the loop is coded below,
+ * this function will behave in a reasonable manner for ALL possible values
+ * for 'start' and 'end': even weird boundary cases like 0x00000000 and
+ * 0xffffffff on a 32-bit architecture.
+ */
+ for (p = (const uint32_t *)start;
+ (((unsigned long)p) <= end) &&
+ ((end - (unsigned long)p) >= (sizeof(uint32_t) - 1)); p += 4) {
+ if (*p != sig)
+ continue;
- /* We found a valid signature. */
- table = (const struct lb_header *) p;
+ /* We found a valid signature. */
+ table = (const struct lb_header *)p;
- /* validate header checksum */
- if (compute_ip_checksum((void *) table, sizeof(*table)))
- { (*bad_header_count)++;
- continue;
- }
+ /* validate header checksum */
+ if (compute_ip_checksum((void *)table, sizeof(*table))) {
+ (*bad_header_count)++;
+ continue;
+ }
- /* validate table checksum */
- if (table->table_checksum !=
- compute_ip_checksum(((char *) table) + sizeof(*table),
- table->table_bytes))
- { (*bad_table_count)++;
- continue;
- }
+ /* validate table checksum */
+ if (table->table_checksum !=
+ compute_ip_checksum(((char *)table) + sizeof(*table),
+ table->table_bytes)) {
+ (*bad_table_count)++;
+ continue;
+ }
- /* checksums are ok: we found it! */
- /* But it may just be a forwarding table, so look if there's a forwarder */
- lbtable = table;
- forward = (struct lb_forward *)find_lbrec(LB_TAG_FORWARD);
- lbtable = NULL;
+ /* checksums are ok: we found it! */
+ /* But it may just be a forwarding table, so look if there's a forwarder */
+ lbtable = table;
+ forward = (struct lb_forward *)find_lbrec(LB_TAG_FORWARD);
+ lbtable = NULL;
- if (forward) {
- uint64_t new_phys = forward->forward;
+ if (forward) {
+ uint64_t new_phys = forward->forward;
- new_phys &= ~(getpagesize()-1);
-
- munmap((void *)low_phys_mem, BYTES_TO_MAP);
- if ((low_phys_mem = mmap(NULL, BYTES_TO_MAP, PROT_READ, MAP_SHARED, fd, (off_t)new_phys)) == MAP_FAILED)
- { fprintf(stderr, "%s: Failed to mmap /dev/mem: %s\n", prog_name,
- strerror(errno));
- exit(1);
- }
- low_phys_base = new_phys;
- table = lbtable_scan(phystov(low_phys_base), phystov(low_phys_base + BYTES_TO_MAP), bad_header_count, bad_table_count);
- }
- return table;
- }
+ new_phys &= ~(getpagesize() - 1);
- return NULL;
- }
+ munmap((void *)low_phys_mem, BYTES_TO_MAP);
+ if ((low_phys_mem =
+ mmap(NULL, BYTES_TO_MAP, PROT_READ, MAP_SHARED, fd,
+ (off_t) new_phys)) == MAP_FAILED) {
+ fprintf(stderr,
+ "%s: Failed to mmap /dev/mem: %s\n",
+ prog_name, strerror(errno));
+ exit(1);
+ }
+ low_phys_base = new_phys;
+ table =
+ lbtable_scan(phystov(low_phys_base),
+ phystov(low_phys_base + BYTES_TO_MAP),
+ bad_header_count, bad_table_count);
+ }
+ return table;
+ }
+ return NULL;
+}
+
/****************************************************************************
* process_cmos_table
*
* Extract layout information from the CMOS option table and store it in our
* internal repository.
****************************************************************************/
-static void process_cmos_table (void)
- { const struct cmos_enums *p;
- const struct cmos_entries *q;
- cmos_enum_t cmos_enum;
- cmos_entry_t cmos_entry;
+static void process_cmos_table(void)
+{
+ const struct cmos_enums *p;
+ const struct cmos_entries *q;
+ cmos_enum_t cmos_enum;
+ cmos_entry_t cmos_entry;
- /* First add the enums. */
- for (p = first_cmos_table_enum(); p != NULL; p = next_cmos_table_enum(p))
- { cmos_enum.config_id = p->config_id;
- cmos_enum.value = p->value;
- strncpy(cmos_enum.text, (char *)p->text, CMOS_MAX_TEXT_LENGTH);
- cmos_enum.text[CMOS_MAX_TEXT_LENGTH] = '\0';
- try_add_cmos_table_enum(&cmos_enum);
- }
+ /* First add the enums. */
+ for (p = first_cmos_table_enum(); p != NULL;
+ p = next_cmos_table_enum(p)) {
+ cmos_enum.config_id = p->config_id;
+ cmos_enum.value = p->value;
+ strncpy(cmos_enum.text, (char *)p->text, CMOS_MAX_TEXT_LENGTH);
+ cmos_enum.text[CMOS_MAX_TEXT_LENGTH] = '\0';
+ try_add_cmos_table_enum(&cmos_enum);
+ }
- /* Now add the entries. We must add the entries after the enums because
- * the entries are sanity checked against the enums as they are added.
- */
- for (q = first_cmos_table_entry(); q != NULL; q = next_cmos_table_entry(q))
- { cmos_entry.bit = q->bit;
- cmos_entry.length = q->length;
+ /* Now add the entries. We must add the entries after the enums because
+ * the entries are sanity checked against the enums as they are added.
+ */
+ for (q = first_cmos_table_entry(); q != NULL;
+ q = next_cmos_table_entry(q)) {
+ cmos_entry.bit = q->bit;
+ cmos_entry.length = q->length;
- switch (q->config)
- { case 'e':
- cmos_entry.config = CMOS_ENTRY_ENUM;
- break;
+ switch (q->config) {
+ case 'e':
+ cmos_entry.config = CMOS_ENTRY_ENUM;
+ break;
- case 'h':
- cmos_entry.config = CMOS_ENTRY_HEX;
- break;
+ case 'h':
+ cmos_entry.config = CMOS_ENTRY_HEX;
+ break;
- case 'r':
- cmos_entry.config = CMOS_ENTRY_RESERVED;
- break;
+ case 'r':
+ cmos_entry.config = CMOS_ENTRY_RESERVED;
+ break;
- case 's':
- cmos_entry.config = CMOS_ENTRY_STRING;
- break;
+ case 's':
+ cmos_entry.config = CMOS_ENTRY_STRING;
+ break;
- default:
- fprintf(stderr,
- "%s: Entry in CMOS option table has unknown config "
- "value.\n", prog_name);
- exit(1);
- }
+ default:
+ fprintf(stderr,
+ "%s: Entry in CMOS option table has unknown config "
+ "value.\n", prog_name);
+ exit(1);
+ }
- cmos_entry.config_id = q->config_id;
- strncpy(cmos_entry.name, (char *)q->name, CMOS_MAX_NAME_LENGTH);
- cmos_entry.name[CMOS_MAX_NAME_LENGTH] = '\0';
- try_add_cmos_table_entry(&cmos_entry);
- }
- }
+ cmos_entry.config_id = q->config_id;
+ strncpy(cmos_entry.name, (char *)q->name, CMOS_MAX_NAME_LENGTH);
+ cmos_entry.name[CMOS_MAX_NAME_LENGTH] = '\0';
+ try_add_cmos_table_entry(&cmos_entry);
+ }
+}
/****************************************************************************
* get_cmos_checksum_info
*
* Get layout information for CMOS checksum.
****************************************************************************/
-static void get_cmos_checksum_info (void)
- { const cmos_entry_t *e;
- struct cmos_checksum *checksum;
- cmos_checksum_layout_t layout;
- unsigned index, index2;
+static void get_cmos_checksum_info(void)
+{
+ const cmos_entry_t *e;
+ struct cmos_checksum *checksum;
+ cmos_checksum_layout_t layout;
+ unsigned index, index2;
- checksum = (struct cmos_checksum *) find_lbrec(LB_TAG_OPTION_CHECKSUM);
+ checksum = (struct cmos_checksum *)find_lbrec(LB_TAG_OPTION_CHECKSUM);
- if (checksum != NULL)
- { /* We are lucky. The coreboot table hints us to the checksum.
- * We might have to check the type field here though.
- */
- layout.summed_area_start = checksum->range_start;
- layout.summed_area_end = checksum->range_end;
- layout.checksum_at = checksum->location;
- try_convert_checksum_layout(&layout);
- cmos_checksum_start = layout.summed_area_start;
- cmos_checksum_end = layout.summed_area_end;
- cmos_checksum_index = layout.checksum_at;
- return;
- }
+ if (checksum != NULL) { /* We are lucky. The coreboot table hints us to the checksum.
+ * We might have to check the type field here though.
+ */
+ layout.summed_area_start = checksum->range_start;
+ layout.summed_area_end = checksum->range_end;
+ layout.checksum_at = checksum->location;
+ try_convert_checksum_layout(&layout);
+ cmos_checksum_start = layout.summed_area_start;
+ cmos_checksum_end = layout.summed_area_end;
+ cmos_checksum_index = layout.checksum_at;
+ return;
+ }
- if ((e = find_cmos_entry(checksum_param_name)) == NULL)
- return;
+ if ((e = find_cmos_entry(checksum_param_name)) == NULL)
+ return;
- /* If we get here, we are unlucky. The CMOS option table contains the
- * location of the CMOS checksum. However, there is no information
- * regarding which bytes of the CMOS area the checksum is computed over.
- * Thus we have to hope our presets will be fine.
- */
+ /* If we get here, we are unlucky. The CMOS option table contains the
+ * location of the CMOS checksum. However, there is no information
+ * regarding which bytes of the CMOS area the checksum is computed over.
+ * Thus we have to hope our presets will be fine.
+ */
- if (e->bit % 8)
- { fprintf(stderr, "%s: Error: CMOS checksum is not byte-aligned.\n",
- prog_name);
- exit(1);
- }
+ if (e->bit % 8) {
+ fprintf(stderr,
+ "%s: Error: CMOS checksum is not byte-aligned.\n",
+ prog_name);
+ exit(1);
+ }
- index = e->bit / 8;
- index2 = index + 1; /* The CMOS checksum occupies 16 bits. */
+ index = e->bit / 8;
+ index2 = index + 1; /* The CMOS checksum occupies 16 bits. */
- if (verify_cmos_byte_index(index) || verify_cmos_byte_index(index2))
- { fprintf(stderr, "%s: Error: CMOS checksum location out of range.\n",
- prog_name);
- exit(1);
- }
+ if (verify_cmos_byte_index(index) || verify_cmos_byte_index(index2)) {
+ fprintf(stderr,
+ "%s: Error: CMOS checksum location out of range.\n",
+ prog_name);
+ exit(1);
+ }
- if (((index >= cmos_checksum_start) && (index <= cmos_checksum_end)) ||
- (((index2) >= cmos_checksum_start) && ((index2) <= cmos_checksum_end)))
- { fprintf(stderr, "%s: Error: CMOS checksum overlaps checksummed area.\n",
- prog_name);
- exit(1);
- }
+ if (((index >= cmos_checksum_start) && (index <= cmos_checksum_end)) ||
+ (((index2) >= cmos_checksum_start)
+ && ((index2) <= cmos_checksum_end))) {
+ fprintf(stderr,
+ "%s: Error: CMOS checksum overlaps checksummed area.\n",
+ prog_name);
+ exit(1);
+ }
- cmos_checksum_index = index;
- }
+ cmos_checksum_index = index;
+}
/****************************************************************************
* try_convert_checksum_layout
@@ -690,60 +690,59 @@
* convert information from bit positions to byte positions. Return OK on
* success or an error code on failure.
****************************************************************************/
-static void try_convert_checksum_layout (cmos_checksum_layout_t *layout)
- { switch (checksum_layout_to_bytes(layout))
- { case OK:
- return;
+static void try_convert_checksum_layout(cmos_checksum_layout_t * layout)
+{
+ switch (checksum_layout_to_bytes(layout)) {
+ case OK:
+ return;
- case LAYOUT_SUMMED_AREA_START_NOT_ALIGNED:
- fprintf(stderr,
- "%s: CMOS checksummed area start is not byte-aligned.\n",
- prog_name);
- break;
+ case LAYOUT_SUMMED_AREA_START_NOT_ALIGNED:
+ fprintf(stderr,
+ "%s: CMOS checksummed area start is not byte-aligned.\n",
+ prog_name);
+ break;
- case LAYOUT_SUMMED_AREA_END_NOT_ALIGNED:
- fprintf(stderr,
- "%s: CMOS checksummed area end is not byte-aligned.\n",
- prog_name);
- break;
+ case LAYOUT_SUMMED_AREA_END_NOT_ALIGNED:
+ fprintf(stderr,
+ "%s: CMOS checksummed area end is not byte-aligned.\n",
+ prog_name);
+ break;
- case LAYOUT_CHECKSUM_LOCATION_NOT_ALIGNED:
- fprintf(stderr,
- "%s: CMOS checksum location is not byte-aligned.\n",
- prog_name);
- break;
+ case LAYOUT_CHECKSUM_LOCATION_NOT_ALIGNED:
+ fprintf(stderr,
+ "%s: CMOS checksum location is not byte-aligned.\n",
+ prog_name);
+ break;
- case LAYOUT_INVALID_SUMMED_AREA:
- fprintf(stderr,
- "%s: CMOS checksummed area end must be greater than "
- "CMOS checksummed area start.\n",
- prog_name);
- break;
+ case LAYOUT_INVALID_SUMMED_AREA:
+ fprintf(stderr,
+ "%s: CMOS checksummed area end must be greater than "
+ "CMOS checksummed area start.\n", prog_name);
+ break;
- case LAYOUT_CHECKSUM_OVERLAPS_SUMMED_AREA:
- fprintf(stderr,
- "%s: CMOS checksum overlaps checksummed area.\n",
- prog_name);
- break;
+ case LAYOUT_CHECKSUM_OVERLAPS_SUMMED_AREA:
+ fprintf(stderr,
+ "%s: CMOS checksum overlaps checksummed area.\n",
+ prog_name);
+ break;
- case LAYOUT_SUMMED_AREA_OUT_OF_RANGE:
- fprintf(stderr,
- "%s: CMOS checksummed area out of range.\n",
- prog_name);
- break;
+ case LAYOUT_SUMMED_AREA_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: CMOS checksummed area out of range.\n", prog_name);
+ break;
- case LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE:
- fprintf(stderr,
- "%s: CMOS checksum location out of range.\n",
- prog_name);
- break;
+ case LAYOUT_CHECKSUM_LOCATION_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: CMOS checksum location out of range.\n",
+ prog_name);
+ break;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- exit(1);
- }
+ exit(1);
+}
/****************************************************************************
* try_add_cmos_table_enum
@@ -751,22 +750,23 @@
* Attempt to add a CMOS enum to our internal repository. Exit with an error
* message on failure.
****************************************************************************/
-static void try_add_cmos_table_enum (cmos_enum_t *cmos_enum)
- { switch (add_cmos_enum(cmos_enum))
- { case OK:
- return;
+static void try_add_cmos_table_enum(cmos_enum_t * cmos_enum)
+{
+ switch (add_cmos_enum(cmos_enum)) {
+ case OK:
+ return;
- case LAYOUT_DUPLICATE_ENUM:
- fprintf(stderr, "%s: Duplicate enum %s found in CMOS option "
- "table.\n", prog_name, cmos_enum->text);
- break;
+ case LAYOUT_DUPLICATE_ENUM:
+ fprintf(stderr, "%s: Duplicate enum %s found in CMOS option "
+ "table.\n", prog_name, cmos_enum->text);
+ break;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- exit(1);
- }
+ exit(1);
+}
/****************************************************************************
* try_add_cmos_table_entry
@@ -774,44 +774,46 @@
* Attempt to add a CMOS entry to our internal repository. Exit with an
* error message on failure.
****************************************************************************/
-static void try_add_cmos_table_entry (cmos_entry_t *cmos_entry)
- { const cmos_entry_t *conflict;
+static void try_add_cmos_table_entry(cmos_entry_t * cmos_entry)
+{
+ const cmos_entry_t *conflict;
- switch (add_cmos_entry(cmos_entry, &conflict))
- { case OK:
- return;
+ switch (add_cmos_entry(cmos_entry, &conflict)) {
+ case OK:
+ return;
- case CMOS_AREA_OUT_OF_RANGE:
- fprintf(stderr,
- "%s: Bad CMOS option layout in CMOS option table entry "
- "%s.\n", prog_name, cmos_entry->name);
- break;
+ case CMOS_AREA_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: Bad CMOS option layout in CMOS option table entry "
+ "%s.\n", prog_name, cmos_entry->name);
+ break;
- case CMOS_AREA_TOO_WIDE:
- fprintf(stderr,
- "%s: Area too wide for CMOS option table entry %s.\n",
- prog_name, cmos_entry->name);
- break;
+ case CMOS_AREA_TOO_WIDE:
+ fprintf(stderr,
+ "%s: Area too wide for CMOS option table entry %s.\n",
+ prog_name, cmos_entry->name);
+ break;
- case LAYOUT_ENTRY_OVERLAP:
- fprintf(stderr,
- "%s: CMOS option table entries %s and %s have overlapping "
- "layouts.\n", prog_name, cmos_entry->name, conflict->name);
- break;
+ case LAYOUT_ENTRY_OVERLAP:
+ fprintf(stderr,
+ "%s: CMOS option table entries %s and %s have overlapping "
+ "layouts.\n", prog_name, cmos_entry->name,
+ conflict->name);
+ break;
- case LAYOUT_ENTRY_BAD_LENGTH:
- /* Silently ignore entries with zero length. Although this should
- * never happen in practice, we should handle the case in a
- * reasonable manner just to be safe.
- */
- return;
+ case LAYOUT_ENTRY_BAD_LENGTH:
+ /* Silently ignore entries with zero length. Although this should
+ * never happen in practice, we should handle the case in a
+ * reasonable manner just to be safe.
+ */
+ return;
- default:
- BUG();
- }
+ default:
+ BUG();
+ }
- exit(1);
- }
+ exit(1);
+}
/****************************************************************************
* find_lbrec
@@ -819,24 +821,25 @@
* Find the record in the coreboot table that matches 'tag'. Return pointer
* to record on success or NULL if record not found.
****************************************************************************/
-static const struct lb_record * find_lbrec (uint32_t tag)
- { const char *p;
- uint32_t bytes_processed;
- const struct lb_record *lbrec;
+static const struct lb_record *find_lbrec(uint32_t tag)
+{
+ const char *p;
+ uint32_t bytes_processed;
+ const struct lb_record *lbrec;
- p = ((const char *) lbtable) + lbtable->header_bytes;
+ p = ((const char *)lbtable) + lbtable->header_bytes;
- for (bytes_processed = 0;
- bytes_processed < lbtable->table_bytes;
- bytes_processed += lbrec->size)
- { lbrec = (const struct lb_record *) &p[bytes_processed];
+ for (bytes_processed = 0;
+ bytes_processed < lbtable->table_bytes;
+ bytes_processed += lbrec->size) {
+ lbrec = (const struct lb_record *)&p[bytes_processed];
- if (lbrec->tag == tag)
- return lbrec;
- }
+ if (lbrec->tag == tag)
+ return lbrec;
+ }
- return NULL;
- }
+ return NULL;
+}
/****************************************************************************
* lbrec_tag_to_str
@@ -844,71 +847,72 @@
* Return a pointer to the string representation of the given coreboot table
* tag.
****************************************************************************/
-static const char * lbrec_tag_to_str (uint32_t tag)
- { switch (tag)
- { case LB_TAG_UNUSED:
- return "UNUSED";
+static const char *lbrec_tag_to_str(uint32_t tag)
+{
+ switch (tag) {
+ case LB_TAG_UNUSED:
+ return "UNUSED";
- case LB_TAG_MEMORY:
- return "MEMORY";
+ case LB_TAG_MEMORY:
+ return "MEMORY";
- case LB_TAG_HWRPB:
- return "HWRPB";
+ case LB_TAG_HWRPB:
+ return "HWRPB";
- case LB_TAG_MAINBOARD:
- return "MAINBOARD";
+ case LB_TAG_MAINBOARD:
+ return "MAINBOARD";
- case LB_TAG_VERSION:
- return "VERSION";
+ case LB_TAG_VERSION:
+ return "VERSION";
- case LB_TAG_EXTRA_VERSION:
- return "EXTRA_VERSION";
+ case LB_TAG_EXTRA_VERSION:
+ return "EXTRA_VERSION";
- case LB_TAG_BUILD:
- return "BUILD";
+ case LB_TAG_BUILD:
+ return "BUILD";
- case LB_TAG_COMPILE_TIME:
- return "COMPILE_TIME";
+ case LB_TAG_COMPILE_TIME:
+ return "COMPILE_TIME";
- case LB_TAG_COMPILE_BY:
- return "COMPILE_BY";
+ case LB_TAG_COMPILE_BY:
+ return "COMPILE_BY";
- case LB_TAG_COMPILE_HOST:
- return "COMPILE_HOST";
+ case LB_TAG_COMPILE_HOST:
+ return "COMPILE_HOST";
- case LB_TAG_COMPILE_DOMAIN:
- return "COMPILE_DOMAIN";
+ case LB_TAG_COMPILE_DOMAIN:
+ return "COMPILE_DOMAIN";
- case LB_TAG_COMPILER:
- return "COMPILER";
+ case LB_TAG_COMPILER:
+ return "COMPILER";
- case LB_TAG_LINKER:
- return "LINKER";
+ case LB_TAG_LINKER:
+ return "LINKER";
- case LB_TAG_ASSEMBLER:
- return "ASSEMBLER";
+ case LB_TAG_ASSEMBLER:
+ return "ASSEMBLER";
- case LB_TAG_SERIAL:
- return "SERIAL";
+ case LB_TAG_SERIAL:
+ return "SERIAL";
- case LB_TAG_CONSOLE:
- return "CONSOLE";
+ case LB_TAG_CONSOLE:
+ return "CONSOLE";
- case LB_TAG_FORWARD:
- return "FORWARD";
+ case LB_TAG_FORWARD:
+ return "FORWARD";
- case LB_TAG_CMOS_OPTION_TABLE:
- return "CMOS_OPTION_TABLE";
+ case LB_TAG_CMOS_OPTION_TABLE:
+ return "CMOS_OPTION_TABLE";
- case LB_TAG_OPTION_CHECKSUM:
- return "OPTION_CHECKSUM";
+ case LB_TAG_OPTION_CHECKSUM:
+ return "OPTION_CHECKSUM";
- default:
- break;
- }
+ default:
+ break;
+ }
- return "UNKNOWN";
- }
+ return "UNKNOWN";
+}
/****************************************************************************
* first_cmos_table_entry
@@ -916,8 +920,10 @@
* Return a pointer to the first entry in the CMOS table that represents a
* CMOS parameter. Return NULL if CMOS table is empty.
****************************************************************************/
-static const struct cmos_entries * first_cmos_table_entry (void)
- { return (const struct cmos_entries *) first_cmos_rec(LB_TAG_OPTION); }
+static const struct cmos_entries *first_cmos_table_entry(void)
+{
+ return (const struct cmos_entries *)first_cmos_rec(LB_TAG_OPTION);
+}
/****************************************************************************
* next_cmos_table_entry
@@ -925,11 +931,12 @@
* Return a pointer to the next entry after 'last' in the CMOS table that
* represents a CMOS parameter. Return NULL if there are no more parameters.
****************************************************************************/
-static const struct cmos_entries *
- next_cmos_table_entry (const struct cmos_entries *last)
- { return (const struct cmos_entries *)
- next_cmos_rec((const struct lb_record *) last, LB_TAG_OPTION);
- }
+static const struct cmos_entries *next_cmos_table_entry(const struct
+ cmos_entries *last)
+{
+ return (const struct cmos_entries *)
+ next_cmos_rec((const struct lb_record *)last, LB_TAG_OPTION);
+}
/****************************************************************************
* first_cmos_table_enum
@@ -938,8 +945,10 @@
* possible CMOS parameter value. Return NULL if the table does not contain
* any such entries.
****************************************************************************/
-static const struct cmos_enums * first_cmos_table_enum (void)
- { return (const struct cmos_enums *) first_cmos_rec(LB_TAG_OPTION_ENUM); }
+static const struct cmos_enums *first_cmos_table_enum(void)
+{
+ return (const struct cmos_enums *)first_cmos_rec(LB_TAG_OPTION_ENUM);
+}
/****************************************************************************
* next_cmos_table_enum
@@ -948,11 +957,11 @@
* represents a possible CMOS parameter value. Return NULL if there are no
* more parameter values.
****************************************************************************/
-static const struct cmos_enums * next_cmos_table_enum
- (const struct cmos_enums *last)
- { return (const struct cmos_enums *)
- next_cmos_rec((const struct lb_record *) last, LB_TAG_OPTION_ENUM);
- }
+static const struct cmos_enums *next_cmos_table_enum
+ (const struct cmos_enums *last) {
+ return (const struct cmos_enums *)
+ next_cmos_rec((const struct lb_record *)last, LB_TAG_OPTION_ENUM);
+}
/****************************************************************************
* first_cmos_rec
@@ -970,25 +979,26 @@
* parameter values and specifies their types as 'enum', 'hex', or
* 'reserved'.
****************************************************************************/
-static const struct lb_record * first_cmos_rec (uint32_t tag)
- { const char *p;
- uint32_t bytes_processed, bytes_for_entries;
- const struct lb_record *lbrec;
+static const struct lb_record *first_cmos_rec(uint32_t tag)
+{
+ const char *p;
+ uint32_t bytes_processed, bytes_for_entries;
+ const struct lb_record *lbrec;
- p = ((const char *) cmos_table) + cmos_table->header_length;
- bytes_for_entries = cmos_table->size - cmos_table->header_length;
+ p = ((const char *)cmos_table) + cmos_table->header_length;
+ bytes_for_entries = cmos_table->size - cmos_table->header_length;
- for (bytes_processed = 0;
- bytes_processed < bytes_for_entries;
- bytes_processed += lbrec->size)
- { lbrec = (const struct lb_record *) &p[bytes_processed];
+ for (bytes_processed = 0;
+ bytes_processed < bytes_for_entries;
+ bytes_processed += lbrec->size) {
+ lbrec = (const struct lb_record *)&p[bytes_processed];
- if (lbrec->tag == tag)
- return lbrec;
- }
+ if (lbrec->tag == tag)
+ return lbrec;
+ }
- return NULL;
- }
+ return NULL;
+}
/****************************************************************************
* next_cmos_rec
@@ -997,279 +1007,290 @@
* type matches 'tag'. Return NULL if the table contains no more entries of
* this type.
****************************************************************************/
-static const struct lb_record * next_cmos_rec (const struct lb_record *last,
- uint32_t tag)
- { const char *p;
- uint32_t bytes_processed, bytes_for_entries, last_offset;
- const struct lb_record *lbrec;
+static const struct lb_record *next_cmos_rec(const struct lb_record *last,
+ uint32_t tag)
+{
+ const char *p;
+ uint32_t bytes_processed, bytes_for_entries, last_offset;
+ const struct lb_record *lbrec;
- p = ((const char *) cmos_table) + cmos_table->header_length;
- bytes_for_entries = cmos_table->size - cmos_table->header_length;
- last_offset = ((const char *) last) - p;
+ p = ((const char *)cmos_table) + cmos_table->header_length;
+ bytes_for_entries = cmos_table->size - cmos_table->header_length;
+ last_offset = ((const char *)last) - p;
- for (bytes_processed = last_offset + last->size;
- bytes_processed < bytes_for_entries;
- bytes_processed += lbrec->size)
- { lbrec = (const struct lb_record *) &p[bytes_processed];
+ for (bytes_processed = last_offset + last->size;
+ bytes_processed < bytes_for_entries;
+ bytes_processed += lbrec->size) {
+ lbrec = (const struct lb_record *)&p[bytes_processed];
- if (lbrec->tag == tag)
- return lbrec;
- }
+ if (lbrec->tag == tag)
+ return lbrec;
+ }
- return NULL;
- }
+ return NULL;
+}
/****************************************************************************
* memory_print_fn
*
* Display function for 'memory' item of coreboot table.
****************************************************************************/
-static void memory_print_fn (const struct lb_record *rec)
- { char start_str[19], end_str[19], size_str[19];
- const struct lb_memory *p;
- const char *mem_type;
- const struct lb_memory_range *ranges;
- uint64_t size, start, end;
- int i, entries;
+static void memory_print_fn(const struct lb_record *rec)
+{
+ char start_str[19], end_str[19], size_str[19];
+ const struct lb_memory *p;
+ const char *mem_type;
+ const struct lb_memory_range *ranges;
+ uint64_t size, start, end;
+ int i, entries;
- p = (const struct lb_memory *) rec;
- entries = (p->size - sizeof(*p)) / sizeof(p->map[0]);
- ranges = p->map;
+ p = (const struct lb_memory *)rec;
+ entries = (p->size - sizeof(*p)) / sizeof(p->map[0]);
+ ranges = p->map;
- if (entries == 0)
- { printf("No memory ranges were found.\n");
- return;
- }
+ if (entries == 0) {
+ printf("No memory ranges were found.\n");
+ return;
+ }
- for (i = 0; ; )
- { switch (ranges[i].type)
- { case LB_MEM_RAM:
- mem_type = "AVAILABLE";
- break;
+ for (i = 0;;) {
+ switch (ranges[i].type) {
+ case LB_MEM_RAM:
+ mem_type = "AVAILABLE";
+ break;
- case LB_MEM_RESERVED:
- mem_type = "RESERVED";
- break;
+ case LB_MEM_RESERVED:
+ mem_type = "RESERVED";
+ break;
- case LB_MEM_TABLE:
- mem_type = "CONFIG_TABLE";
- break;
+ case LB_MEM_TABLE:
+ mem_type = "CONFIG_TABLE";
+ break;
- default:
- mem_type = "UNKNOWN";
- break;
- }
+ default:
+ mem_type = "UNKNOWN";
+ break;
+ }
- size = unpack_lb64(ranges[i].size);
- start = unpack_lb64(ranges[i].start);
- end = start + size - 1;
- uint64_to_hex_string(start_str, start);
- uint64_to_hex_string(end_str, end);
- uint64_to_hex_string(size_str, size);
- printf("%s memory:\n"
- " from physical addresses %s to %s\n"
- " size is %s bytes (%lld in decimal)\n",
- mem_type, start_str, end_str, size_str,
- (unsigned long long) size);
+ size = unpack_lb64(ranges[i].size);
+ start = unpack_lb64(ranges[i].start);
+ end = start + size - 1;
+ uint64_to_hex_string(start_str, start);
+ uint64_to_hex_string(end_str, end);
+ uint64_to_hex_string(size_str, size);
+ printf("%s memory:\n"
+ " from physical addresses %s to %s\n"
+ " size is %s bytes (%lld in decimal)\n",
+ mem_type, start_str, end_str, size_str,
+ (unsigned long long)size);
- if (++i >= entries)
- break;
+ if (++i >= entries)
+ break;
- printf("\n");
- }
- }
+ printf("\n");
+ }
+}
/****************************************************************************
* mainboard_print_fn
*
* Display function for 'mainboard' item of coreboot table.
****************************************************************************/
-static void mainboard_print_fn (const struct lb_record *rec)
- { const struct lb_mainboard *p;
+static void mainboard_print_fn(const struct lb_record *rec)
+{
+ const struct lb_mainboard *p;
- p = (const struct lb_mainboard *) rec;
- printf("Vendor: %s\n"
- "Part number: %s\n",
- &p->strings[p->vendor_idx],
- &p->strings[p->part_number_idx]);
- }
+ p = (const struct lb_mainboard *)rec;
+ printf("Vendor: %s\n"
+ "Part number: %s\n",
+ &p->strings[p->vendor_idx], &p->strings[p->part_number_idx]);
+}
/****************************************************************************
* cmos_opt_table_print_fn
*
* Display function for 'cmos_opt_table' item of coreboot table.
****************************************************************************/
-static void cmos_opt_table_print_fn (const struct lb_record *rec)
- {
- const struct cmos_option_table *p;
- const struct lb_record *cmos_item;
- uint32_t bytes_processed, bytes_for_entries;
- const char *q;
+static void cmos_opt_table_print_fn(const struct lb_record *rec)
+{
+ const struct cmos_option_table *p;
+ const struct lb_record *cmos_item;
+ uint32_t bytes_processed, bytes_for_entries;
+ const char *q;
- p = (const struct cmos_option_table *) rec;
- q = ((const char *) p) + p->header_length;
- bytes_for_entries = p->size - p->header_length;
+ p = (const struct cmos_option_table *)rec;
+ q = ((const char *)p) + p->header_length;
+ bytes_for_entries = p->size - p->header_length;
- printf("CMOS option table at physical address 0x%lx:\n"
- " tag: 0x%x (decimal: %d)\n"
- " size: 0x%x (decimal: %d)\n"
- " header_length: 0x%x (decimal: %d)\n\n",
- vtophys(p), p->tag, p->tag, p->size, p->size, p->header_length,
- p->header_length);
+ printf("CMOS option table at physical address 0x%lx:\n"
+ " tag: 0x%x (decimal: %d)\n"
+ " size: 0x%x (decimal: %d)\n"
+ " header_length: 0x%x (decimal: %d)\n\n",
+ vtophys(p), p->tag, p->tag, p->size, p->size, p->header_length,
+ p->header_length);
- if (p->header_length > p->size)
- { printf("Header length for CMOS option table is greater than the size "
- "of the entire table including header!!!\n");
- return;
- }
+ if (p->header_length > p->size) {
+ printf
+ ("Header length for CMOS option table is greater than the size "
+ "of the entire table including header!!!\n");
+ return;
+ }
- if (bytes_for_entries == 0)
- { printf("The CMOS option table is empty!!!\n");
- return;
- }
+ if (bytes_for_entries == 0) {
+ printf("The CMOS option table is empty!!!\n");
+ return;
+ }
- for (bytes_processed = 0; ; )
- { cmos_item = (const struct lb_record *) &q[bytes_processed];
+ for (bytes_processed = 0;;) {
+ cmos_item = (const struct lb_record *)&q[bytes_processed];
- switch (cmos_item->tag)
- { case LB_TAG_OPTION:
- print_option_record((const struct cmos_entries *) cmos_item);
- break;
+ switch (cmos_item->tag) {
+ case LB_TAG_OPTION:
+ print_option_record((const struct cmos_entries *)
+ cmos_item);
+ break;
- case LB_TAG_OPTION_ENUM:
- print_enum_record((const struct cmos_enums *) cmos_item);
- break;
+ case LB_TAG_OPTION_ENUM:
+ print_enum_record((const struct cmos_enums *)cmos_item);
+ break;
- case LB_TAG_OPTION_DEFAULTS:
- print_defaults_record((const struct cmos_defaults *) cmos_item);
- break;
+ case LB_TAG_OPTION_DEFAULTS:
+ print_defaults_record((const struct cmos_defaults *)
+ cmos_item);
+ break;
- default:
- print_unknown_record(cmos_item);
- break;
- }
+ default:
+ print_unknown_record(cmos_item);
+ break;
+ }
- bytes_processed += cmos_item->size;
+ bytes_processed += cmos_item->size;
- if (bytes_processed >= bytes_for_entries)
- break;
+ if (bytes_processed >= bytes_for_entries)
+ break;
- printf("\n");
- }
- }
+ printf("\n");
+ }
+}
/****************************************************************************
* print_option_record
*
* Display "option" record from CMOS option table.
****************************************************************************/
-static void print_option_record (const struct cmos_entries *cmos_entry)
- { static const size_t S_BUFSIZE = 80;
- char s[S_BUFSIZE];
+static void print_option_record(const struct cmos_entries *cmos_entry)
+{
+ static const size_t S_BUFSIZE = 80;
+ char s[S_BUFSIZE];
- switch (cmos_entry->config)
- { case 'e':
- strcpy(s, "ENUM");
- break;
+ switch (cmos_entry->config) {
+ case 'e':
+ strcpy(s, "ENUM");
+ break;
- case 'h':
- strcpy(s, "HEX");
- break;
+ case 'h':
+ strcpy(s, "HEX");
+ break;
- case 'r':
- strcpy(s, "RESERVED");
- break;
+ case 'r':
+ strcpy(s, "RESERVED");
+ break;
- default:
- snprintf(s, S_BUFSIZE, "UNKNOWN: value is 0x%x (decimal: %d)",
- cmos_entry->config, cmos_entry->config);
- break;
- }
+ default:
+ snprintf(s, S_BUFSIZE, "UNKNOWN: value is 0x%x (decimal: %d)",
+ cmos_entry->config, cmos_entry->config);
+ break;
+ }
- printf(" OPTION record at physical address 0x%lx:\n"
- " tag: 0x%x (decimal: %d)\n"
- " size: 0x%x (decimal: %d)\n"
- " bit: 0x%x (decimal: %d)\n"
- " length: 0x%x (decimal: %d)\n"
- " config: %s\n"
- " config_id: 0x%x (decimal: %d)\n"
- " name: %s\n",
- vtophys(cmos_entry), cmos_entry->tag, cmos_entry->tag,
- cmos_entry->size, cmos_entry->size, cmos_entry->bit,
- cmos_entry->bit, cmos_entry->length, cmos_entry->length, s,
- cmos_entry->config_id, cmos_entry->config_id, cmos_entry->name);
- }
+ printf(" OPTION record at physical address 0x%lx:\n"
+ " tag: 0x%x (decimal: %d)\n"
+ " size: 0x%x (decimal: %d)\n"
+ " bit: 0x%x (decimal: %d)\n"
+ " length: 0x%x (decimal: %d)\n"
+ " config: %s\n"
+ " config_id: 0x%x (decimal: %d)\n"
+ " name: %s\n",
+ vtophys(cmos_entry), cmos_entry->tag, cmos_entry->tag,
+ cmos_entry->size, cmos_entry->size, cmos_entry->bit,
+ cmos_entry->bit, cmos_entry->length, cmos_entry->length, s,
+ cmos_entry->config_id, cmos_entry->config_id, cmos_entry->name);
+}
/****************************************************************************
* print_enum_record
*
* Display "enum" record from CMOS option table.
****************************************************************************/
-static void print_enum_record (const struct cmos_enums *cmos_enum)
- { printf(" ENUM record at physical address 0x%lx:\n"
- " tag: 0x%x (decimal: %d)\n"
- " size: 0x%x (decimal: %d)\n"
- " config_id: 0x%x (decimal: %d)\n"
- " value: 0x%x (decimal: %d)\n"
- " text: %s\n",
- vtophys(cmos_enum), cmos_enum->tag, cmos_enum->tag, cmos_enum->size,
- cmos_enum->size, cmos_enum->config_id, cmos_enum->config_id,
- cmos_enum->value, cmos_enum->value, cmos_enum->text);
- }
+static void print_enum_record(const struct cmos_enums *cmos_enum)
+{
+ printf(" ENUM record at physical address 0x%lx:\n"
+ " tag: 0x%x (decimal: %d)\n"
+ " size: 0x%x (decimal: %d)\n"
+ " config_id: 0x%x (decimal: %d)\n"
+ " value: 0x%x (decimal: %d)\n"
+ " text: %s\n",
+ vtophys(cmos_enum), cmos_enum->tag, cmos_enum->tag,
+ cmos_enum->size, cmos_enum->size, cmos_enum->config_id,
+ cmos_enum->config_id, cmos_enum->value, cmos_enum->value,
+ cmos_enum->text);
+}
/****************************************************************************
* print_defaults_record
*
* Display "defaults" record from CMOS option table.
****************************************************************************/
-static void print_defaults_record (const struct cmos_defaults *cmos_defaults)
- { printf(" DEFAULTS record at physical address 0x%lx:\n"
- " tag: 0x%x (decimal: %d)\n"
- " size: 0x%x (decimal: %d)\n"
- " name_length: 0x%x (decimal: %d)\n"
- " name: %s\n"
- " default_set:\n",
- vtophys(cmos_defaults), cmos_defaults->tag, cmos_defaults->tag,
- cmos_defaults->size, cmos_defaults->size,
- cmos_defaults->name_length, cmos_defaults->name_length,
- cmos_defaults->name);
- hexdump(cmos_defaults->default_set, CMOS_IMAGE_BUFFER_SIZE,
- vtophys(cmos_defaults->default_set), stdout, &format);
- }
+static void print_defaults_record(const struct cmos_defaults *cmos_defaults)
+{
+ printf(" DEFAULTS record at physical address 0x%lx:\n"
+ " tag: 0x%x (decimal: %d)\n"
+ " size: 0x%x (decimal: %d)\n"
+ " name_length: 0x%x (decimal: %d)\n"
+ " name: %s\n"
+ " default_set:\n",
+ vtophys(cmos_defaults), cmos_defaults->tag, cmos_defaults->tag,
+ cmos_defaults->size, cmos_defaults->size,
+ cmos_defaults->name_length, cmos_defaults->name_length,
+ cmos_defaults->name);
+ hexdump(cmos_defaults->default_set, CMOS_IMAGE_BUFFER_SIZE,
+ vtophys(cmos_defaults->default_set), stdout, &format);
+}
/****************************************************************************
* print_unknown_record
*
* Display record of unknown type from CMOS option table.
****************************************************************************/
-static void print_unknown_record (const struct lb_record *cmos_item)
- { const char *data;
+static void print_unknown_record(const struct lb_record *cmos_item)
+{
+ const char *data;
- printf(" UNKNOWN record at physical address 0x%lx:\n"
- " tag: 0x%x (decimal: %d)\n"
- " size: 0x%x (decimal: %d)\n"
- " data:\n",
- vtophys(cmos_item), cmos_item->tag, cmos_item->tag,
- cmos_item->size, cmos_item->size);
- data = ((const char *) cmos_item) + sizeof(*cmos_item);
- hexdump(data, cmos_item->size - sizeof(*cmos_item), vtophys(data), stdout,
- &format);
- }
+ printf(" UNKNOWN record at physical address 0x%lx:\n"
+ " tag: 0x%x (decimal: %d)\n"
+ " size: 0x%x (decimal: %d)\n"
+ " data:\n",
+ vtophys(cmos_item), cmos_item->tag, cmos_item->tag,
+ cmos_item->size, cmos_item->size);
+ data = ((const char *)cmos_item) + sizeof(*cmos_item);
+ hexdump(data, cmos_item->size - sizeof(*cmos_item), vtophys(data),
+ stdout, &format);
+}
/****************************************************************************
* option_checksum_print_fn
*
* Display function for 'option_checksum' item of coreboot table.
****************************************************************************/
-static void option_checksum_print_fn (const struct lb_record *rec)
- { struct cmos_checksum *p;
+static void option_checksum_print_fn(const struct lb_record *rec)
+{
+ struct cmos_checksum *p;
- p = (struct cmos_checksum *) rec;
- printf("CMOS checksum from bit %d to bit %d\n"
- "at position %d is type %s.\n",
- p->range_start, p->range_end, p->location,
- (p->type == CHECKSUM_PCBIOS) ? "PC BIOS" : "NONE");
- }
+ p = (struct cmos_checksum *)rec;
+ printf("CMOS checksum from bit %d to bit %d\n"
+ "at position %d is type %s.\n",
+ p->range_start, p->range_end, p->location,
+ (p->type == CHECKSUM_PCBIOS) ? "PC BIOS" : "NONE");
+}
/****************************************************************************
* string_print_fn
@@ -1277,12 +1298,13 @@
* Display function for a generic item of coreboot table that simply
* consists of a string.
****************************************************************************/
-static void string_print_fn (const struct lb_record *rec)
- { const struct lb_string *p;
+static void string_print_fn(const struct lb_record *rec)
+{
+ const struct lb_string *p;
- p = (const struct lb_string *) rec;
- printf("%s\n", p->string);
- }
+ p = (const struct lb_string *)rec;
+ printf("%s\n", p->string);
+}
/****************************************************************************
* uint64_to_hex_string
@@ -1293,14 +1315,15 @@
* make a 16-digit hex number including a 0x prefix (example: the number 1
* will be displayed as "0x0000000000000001").
****************************************************************************/
-static void uint64_to_hex_string (char str[], uint64_t n)
- { int chars_printed;
+static void uint64_to_hex_string(char str[], uint64_t n)
+{
+ int chars_printed;
- str[0] = '0';
- str[1] = 'x';
+ str[0] = '0';
+ str[1] = 'x';
- /* Print the result right-justified with leading spaces in a
- * 16-character field. */
- chars_printed = sprintf(&str[2], "%016llx", (unsigned long long) n);
- assert(chars_printed == 16);
- }
+ /* Print the result right-justified with leading spaces in a
+ * 16-character field. */
+ chars_printed = sprintf(&str[2], "%016llx", (unsigned long long)n);
+ assert(chars_printed == 16);
+}
Modified: trunk/util/nvramtool/lbtable.h
===================================================================
--- trunk/util/nvramtool/lbtable.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/lbtable.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -33,10 +33,10 @@
#include "common.h"
-void get_lbtable (void);
-void get_layout_from_cmos_table (void);
-void dump_lbtable (void);
-void list_lbtable_choices (void);
-void list_lbtable_item (const char item[]);
+void get_lbtable(void);
+void get_layout_from_cmos_table(void);
+void dump_lbtable(void);
+void list_lbtable_choices(void);
+void list_lbtable_item(const char item[]);
-#endif /* LBTABLE_H */
+#endif /* LBTABLE_H */
Modified: trunk/util/nvramtool/nvramtool.c
===================================================================
--- trunk/util/nvramtool/nvramtool.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/nvramtool.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -41,74 +41,72 @@
typedef void (*op_fn_t) (void);
-static void op_show_version (void);
-static void op_show_usage (void);
-static void op_lbtable_show_info (void);
-static void op_lbtable_dump (void);
-static void op_show_param_values (void);
-static void op_cmos_show_one_param (void);
-static void op_cmos_show_all_params (void);
-static void op_cmos_set_one_param (void);
-static void op_cmos_set_params_stdin (void);
-static void op_cmos_set_params_file (void);
-static void op_cmos_checksum (void);
-static void op_show_layout (void);
-static void op_write_cmos_dump (void);
-static void op_read_cmos_dump (void);
-static void op_show_cmos_hex_dump (void);
-static void op_show_cmos_dumpfile (void);
-static int list_one_param (const char name[], int show_name);
-static int list_all_params (void);
-static void list_param_enums (const char name[]);
-static void set_one_param (const char name[], const char value[]);
-static void set_params (FILE *f);
-static void parse_assignment (char arg[], const char **name,
- const char **value);
-static int list_cmos_entry (const cmos_entry_t *e, int show_name);
-static uint16_t convert_checksum_value (const char value[]);
+static void op_show_version(void);
+static void op_show_usage(void);
+static void op_lbtable_show_info(void);
+static void op_lbtable_dump(void);
+static void op_show_param_values(void);
+static void op_cmos_show_one_param(void);
+static void op_cmos_show_all_params(void);
+static void op_cmos_set_one_param(void);
+static void op_cmos_set_params_stdin(void);
+static void op_cmos_set_params_file(void);
+static void op_cmos_checksum(void);
+static void op_show_layout(void);
+static void op_write_cmos_dump(void);
+static void op_read_cmos_dump(void);
+static void op_show_cmos_hex_dump(void);
+static void op_show_cmos_dumpfile(void);
+static int list_one_param(const char name[], int show_name);
+static int list_all_params(void);
+static void list_param_enums(const char name[]);
+static void set_one_param(const char name[], const char value[]);
+static void set_params(FILE * f);
+static void parse_assignment(char arg[], const char **name, const char **value);
+static int list_cmos_entry(const cmos_entry_t * e, int show_name);
+static uint16_t convert_checksum_value(const char value[]);
-static const op_fn_t op_fns[] =
- { op_show_version,
- op_show_usage,
- op_lbtable_show_info,
- op_lbtable_dump,
- op_show_param_values,
- op_cmos_show_one_param,
- op_cmos_show_all_params,
- op_cmos_set_one_param,
- op_cmos_set_params_stdin,
- op_cmos_set_params_file,
- op_cmos_checksum,
- op_show_layout,
- op_write_cmos_dump,
- op_read_cmos_dump,
- op_show_cmos_hex_dump,
- op_show_cmos_dumpfile
- };
+static const op_fn_t op_fns[] = { op_show_version,
+ op_show_usage,
+ op_lbtable_show_info,
+ op_lbtable_dump,
+ op_show_param_values,
+ op_cmos_show_one_param,
+ op_cmos_show_all_params,
+ op_cmos_set_one_param,
+ op_cmos_set_params_stdin,
+ op_cmos_set_params_file,
+ op_cmos_checksum,
+ op_show_layout,
+ op_write_cmos_dump,
+ op_read_cmos_dump,
+ op_show_cmos_hex_dump,
+ op_show_cmos_dumpfile
+};
static const hexdump_format_t cmos_dump_format =
- { 16, 2, "", " | ", " ", " | ", '.', NULL };
+ { 16, 2, "", " | ", " ", " | ", '.', NULL };
/****************************************************************************
* main
****************************************************************************/
-int main (int argc, char *argv[])
- { cmos_layout_get_fn_t fn;
+int main(int argc, char *argv[])
+{
+ cmos_layout_get_fn_t fn;
- parse_nvramtool_args(argc, argv);
+ parse_nvramtool_args(argc, argv);
- if (nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found)
- { set_layout_filename(
- nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].param);
- fn = get_layout_from_file;
- }
- else
- fn = get_layout_from_cmos_table;
+ if (nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found) {
+ set_layout_filename(nvramtool_op_modifiers
+ [NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].param);
+ fn = get_layout_from_file;
+ } else
+ fn = get_layout_from_cmos_table;
- register_cmos_layout_get_fn(fn);
- op_fns[nvramtool_op.op]();
- return 0;
- }
+ register_cmos_layout_get_fn(fn);
+ op_fns[nvramtool_op.op] ();
+ return 0;
+}
/****************************************************************************
* op_show_version
@@ -117,8 +115,10 @@
*
* Show version information for this program.
****************************************************************************/
-static void op_show_version (void)
- { printf("This is %s version %s.\n", prog_name, prog_version); }
+static void op_show_version(void)
+{
+ printf("This is %s version %s.\n", prog_name, prog_version);
+}
/****************************************************************************
* op_show_usage
@@ -127,8 +127,10 @@
*
* Show a usage message for this program.
****************************************************************************/
-static void op_show_usage (void)
- { usage(stdout); }
+static void op_show_usage(void)
+{
+ usage(stdout);
+}
/****************************************************************************
* op_lbtable_show_info
@@ -138,14 +140,15 @@
* If ARG is present, show coreboot table information specified by ARG.
* Else show all possible values for ARG.
****************************************************************************/
-static void op_lbtable_show_info (void)
- { if (nvramtool_op.param == NULL)
- list_lbtable_choices();
- else
- { get_lbtable();
- list_lbtable_item(nvramtool_op.param);
- }
- }
+static void op_lbtable_show_info(void)
+{
+ if (nvramtool_op.param == NULL)
+ list_lbtable_choices();
+ else {
+ get_lbtable();
+ list_lbtable_item(nvramtool_op.param);
+ }
+}
/****************************************************************************
* op_lbtable_dump
@@ -154,10 +157,11 @@
*
* Do low-level dump of coreboot table.
****************************************************************************/
-static void op_lbtable_dump (void)
- { get_lbtable();
- dump_lbtable();
- }
+static void op_lbtable_dump(void)
+{
+ get_lbtable();
+ dump_lbtable();
+}
/****************************************************************************
* op_show_param_values
@@ -166,10 +170,11 @@
*
* Show all possible values for parameter NAME.
****************************************************************************/
-static void op_show_param_values (void)
- { get_cmos_layout();
- list_param_enums(nvramtool_op.param);
- }
+static void op_show_param_values(void)
+{
+ get_cmos_layout();
+ list_param_enums(nvramtool_op.param);
+}
/****************************************************************************
* op_cmos_show_one_param
@@ -179,17 +184,19 @@
* Show parameter NAME. If -n is specified, show value only. Else show name
* and value.
****************************************************************************/
-static void op_cmos_show_one_param (void)
- { int result;
+static void op_cmos_show_one_param(void)
+{
+ int result;
- get_cmos_layout();
- result = list_one_param(nvramtool_op.param,
- !nvramtool_op_modifiers[NVRAMTOOL_MOD_SHOW_VALUE_ONLY].found);
- cmos_checksum_verify();
+ get_cmos_layout();
+ result = list_one_param(nvramtool_op.param,
+ !nvramtool_op_modifiers
+ [NVRAMTOOL_MOD_SHOW_VALUE_ONLY].found);
+ cmos_checksum_verify();
- if (result)
- exit(1);
- }
+ if (result)
+ exit(1);
+}
/****************************************************************************
* op_cmos_show_all_params
@@ -198,16 +205,17 @@
*
* Show names and values for all parameters.
****************************************************************************/
-static void op_cmos_show_all_params (void)
- { int result;
+static void op_cmos_show_all_params(void)
+{
+ int result;
- get_cmos_layout();
- result = list_all_params();
- cmos_checksum_verify();
+ get_cmos_layout();
+ result = list_all_params();
+ cmos_checksum_verify();
- if (result)
- exit(1);
- }
+ if (result)
+ exit(1);
+}
/****************************************************************************
* op_cmos_set_one_param
@@ -216,18 +224,19 @@
*
* Set parameter NAME to VALUE.
****************************************************************************/
-static void op_cmos_set_one_param (void)
- { const char *name, *value;
+static void op_cmos_set_one_param(void)
+{
+ const char *name, *value;
- get_cmos_layout();
+ get_cmos_layout();
- /* Separate 'NAME=VALUE' syntax into two strings representing NAME and
- * VALUE.
- */
- parse_assignment(nvramtool_op.param, &name, &value);
+ /* Separate 'NAME=VALUE' syntax into two strings representing NAME and
+ * VALUE.
+ */
+ parse_assignment(nvramtool_op.param, &name, &value);
- set_one_param(name, value);
- }
+ set_one_param(name, value);
+}
/****************************************************************************
* op_cmos_set_params_stdin
@@ -236,10 +245,11 @@
*
* Set parameters according to standard input.
****************************************************************************/
-static void op_cmos_set_params_stdin (void)
- { get_cmos_layout();
- set_params(stdin);
- }
+static void op_cmos_set_params_stdin(void)
+{
+ get_cmos_layout();
+ set_params(stdin);
+}
/****************************************************************************
* op_cmos_set_params_file
@@ -248,19 +258,20 @@
*
* Set parameters according to INPUT_FILE.
****************************************************************************/
-static void op_cmos_set_params_file (void)
- { FILE *f;
+static void op_cmos_set_params_file(void)
+{
+ FILE *f;
- if ((f = fopen(nvramtool_op.param, "r")) == NULL)
- { fprintf(stderr, "%s: Can not open file %s for reading: %s\n",
- prog_name, nvramtool_op.param, strerror(errno));
- exit(1);
- }
+ if ((f = fopen(nvramtool_op.param, "r")) == NULL) {
+ fprintf(stderr, "%s: Can not open file %s for reading: %s\n",
+ prog_name, nvramtool_op.param, strerror(errno));
+ exit(1);
+ }
- get_cmos_layout();
- set_params(f);
- fclose(f);
- }
+ get_cmos_layout();
+ set_params(f);
+ fclose(f);
+}
/****************************************************************************
* op_cmos_checksum
@@ -270,24 +281,24 @@
* If VALUE is present, set coreboot CMOS checksum to VALUE. Else show
* checksum value.
****************************************************************************/
-static void op_cmos_checksum (void)
- { uint16_t checksum;
+static void op_cmos_checksum(void)
+{
+ uint16_t checksum;
- get_cmos_layout();
+ get_cmos_layout();
- if (nvramtool_op.param == NULL)
- { set_iopl(3);
- checksum = cmos_checksum_read();
- set_iopl(0);
- printf("0x%x\n", checksum);
- }
- else
- { checksum = convert_checksum_value(nvramtool_op.param);
- set_iopl(3);
- cmos_checksum_write(checksum);
- set_iopl(0);
- }
- }
+ if (nvramtool_op.param == NULL) {
+ set_iopl(3);
+ checksum = cmos_checksum_read();
+ set_iopl(0);
+ printf("0x%x\n", checksum);
+ } else {
+ checksum = convert_checksum_value(nvramtool_op.param);
+ set_iopl(3);
+ cmos_checksum_write(checksum);
+ set_iopl(0);
+ }
+}
/****************************************************************************
* op_show_layout
@@ -296,10 +307,11 @@
*
* Write CMOS layout information to standard output.
****************************************************************************/
-static void op_show_layout (void)
- { get_cmos_layout();
- write_cmos_layout(stdout);
- }
+static void op_show_layout(void)
+{
+ get_cmos_layout();
+ write_cmos_layout(stdout);
+}
/****************************************************************************
* op_write_cmos_dump
@@ -308,28 +320,29 @@
*
* Write the contents of CMOS memory to a binary file.
****************************************************************************/
-static void op_write_cmos_dump (void)
- { unsigned char data[CMOS_SIZE];
- FILE *f;
+static void op_write_cmos_dump(void)
+{
+ unsigned char data[CMOS_SIZE];
+ FILE *f;
- if ((f = fopen(nvramtool_op.param, "w")) == NULL)
- { fprintf(stderr, "%s: Can not open file %s for writing: %s\n",
- prog_name, nvramtool_op.param, strerror(errno));
- exit(1);
- }
+ if ((f = fopen(nvramtool_op.param, "w")) == NULL) {
+ fprintf(stderr, "%s: Can not open file %s for writing: %s\n",
+ prog_name, nvramtool_op.param, strerror(errno));
+ exit(1);
+ }
- set_iopl(3);
- cmos_read_all(data);
- set_iopl(0);
+ set_iopl(3);
+ cmos_read_all(data);
+ set_iopl(0);
- if (fwrite(data, 1, CMOS_SIZE, f) != CMOS_SIZE)
- { fprintf(stderr, "%s: Error writing CMOS data to file %s: %s\n",
- prog_name, nvramtool_op.param, strerror(errno));
- exit(1);
- }
+ if (fwrite(data, 1, CMOS_SIZE, f) != CMOS_SIZE) {
+ fprintf(stderr, "%s: Error writing CMOS data to file %s: %s\n",
+ prog_name, nvramtool_op.param, strerror(errno));
+ exit(1);
+ }
- fclose(f);
- }
+ fclose(f);
+}
/****************************************************************************
* op_read_cmos_dump
@@ -338,29 +351,31 @@
*
* Read binary data from a file and write the data to CMOS memory.
****************************************************************************/
-static void op_read_cmos_dump (void)
- { unsigned char data[CMOS_SIZE];
- size_t nr_bytes;
- FILE *f;
+static void op_read_cmos_dump(void)
+{
+ unsigned char data[CMOS_SIZE];
+ size_t nr_bytes;
+ FILE *f;
- if ((f = fopen(nvramtool_op.param, "r")) == NULL)
- { fprintf(stderr, "%s: Can not open file %s for reading: %s\n",
- prog_name, nvramtool_op.param, strerror(errno));
- exit(1);
- }
+ if ((f = fopen(nvramtool_op.param, "r")) == NULL) {
+ fprintf(stderr, "%s: Can not open file %s for reading: %s\n",
+ prog_name, nvramtool_op.param, strerror(errno));
+ exit(1);
+ }
- if ((nr_bytes = fread(data, 1, CMOS_SIZE, f)) != CMOS_SIZE)
- { fprintf(stderr, "%s: Error: Only able to read %d bytes of CMOS data "
- "from file %s. CMOS data is unchanged.\n", prog_name,
- (int) nr_bytes, nvramtool_op.param);
- exit(1);
- }
+ if ((nr_bytes = fread(data, 1, CMOS_SIZE, f)) != CMOS_SIZE) {
+ fprintf(stderr,
+ "%s: Error: Only able to read %d bytes of CMOS data "
+ "from file %s. CMOS data is unchanged.\n", prog_name,
+ (int)nr_bytes, nvramtool_op.param);
+ exit(1);
+ }
- fclose(f);
- set_iopl(3);
- cmos_write_all(data);
- set_iopl(0);
- }
+ fclose(f);
+ set_iopl(3);
+ cmos_write_all(data);
+ set_iopl(0);
+}
/****************************************************************************
* op_show_cmos_hex_dump
@@ -369,14 +384,15 @@
*
* Write a hex dump of CMOS memory to standard output.
****************************************************************************/
-static void op_show_cmos_hex_dump (void)
- { unsigned char data[CMOS_SIZE];
+static void op_show_cmos_hex_dump(void)
+{
+ unsigned char data[CMOS_SIZE];
- set_iopl(3);
- cmos_read_all(data);
- set_iopl(0);
- hexdump(data, CMOS_SIZE, 0, stdout, &cmos_dump_format);
- }
+ set_iopl(3);
+ cmos_read_all(data);
+ set_iopl(0);
+ hexdump(data, CMOS_SIZE, 0, stdout, &cmos_dump_format);
+}
/****************************************************************************
* op_show_cmos_dumpfile
@@ -386,21 +402,22 @@
* Read binary data from a file (presumably a CMOS dump file) and display a
* hex dump of the CMOS data from the file.
****************************************************************************/
-static void op_show_cmos_dumpfile (void)
- { unsigned char data[CMOS_SIZE];
- size_t nr_bytes;
- FILE *f;
+static void op_show_cmos_dumpfile(void)
+{
+ unsigned char data[CMOS_SIZE];
+ size_t nr_bytes;
+ FILE *f;
- if ((f = fopen(nvramtool_op.param, "r")) == NULL)
- { fprintf(stderr, "%s: Can not open file %s for reading: %s\n",
- prog_name, nvramtool_op.param, strerror(errno));
- exit(1);
- }
+ if ((f = fopen(nvramtool_op.param, "r")) == NULL) {
+ fprintf(stderr, "%s: Can not open file %s for reading: %s\n",
+ prog_name, nvramtool_op.param, strerror(errno));
+ exit(1);
+ }
- nr_bytes = fread(data, 1, CMOS_SIZE, f);
- fclose(f);
- hexdump(data, nr_bytes, 0, stdout, &cmos_dump_format);
- }
+ nr_bytes = fread(data, 1, CMOS_SIZE, f);
+ fclose(f);
+ hexdump(data, nr_bytes, 0, stdout, &cmos_dump_format);
+}
/****************************************************************************
* list_one_param
@@ -409,21 +426,24 @@
* boolean value indicating whether the parameter name should be displayed
* along with its value. Return 1 if error was encountered. Else return OK.
****************************************************************************/
-static int list_one_param (const char name[], int show_name)
- { const cmos_entry_t *e;
+static int list_one_param(const char name[], int show_name)
+{
+ const cmos_entry_t *e;
- if (is_checksum_name(name) || ((e = find_cmos_entry(name)) == NULL))
- { fprintf(stderr, "%s: CMOS parameter %s not found.\n", prog_name, name);
- exit(1);
- }
+ if (is_checksum_name(name) || ((e = find_cmos_entry(name)) == NULL)) {
+ fprintf(stderr, "%s: CMOS parameter %s not found.\n", prog_name,
+ name);
+ exit(1);
+ }
- if (e->config == CMOS_ENTRY_RESERVED)
- { fprintf(stderr, "%s: Parameter %s is reserved.\n", prog_name, name);
- exit(1);
- }
+ if (e->config == CMOS_ENTRY_RESERVED) {
+ fprintf(stderr, "%s: Parameter %s is reserved.\n", prog_name,
+ name);
+ exit(1);
+ }
- return (list_cmos_entry(e, show_name) != 0);
- }
+ return (list_cmos_entry(e, show_name) != 0);
+}
/****************************************************************************
* list_all_params
@@ -431,64 +451,67 @@
* Attempt to list all CMOS parameters. Return 1 if error was encountered.
* Else return OK.
****************************************************************************/
-static int list_all_params (void)
- { const cmos_entry_t *e;
- int result;
+static int list_all_params(void)
+{
+ const cmos_entry_t *e;
+ int result;
- result = OK;
+ result = OK;
- for (e = first_cmos_entry(); e != NULL; e = next_cmos_entry(e))
- { if ((e->config == CMOS_ENTRY_RESERVED) || is_checksum_name(e->name))
- continue;
+ for (e = first_cmos_entry(); e != NULL; e = next_cmos_entry(e)) {
+ if ((e->config == CMOS_ENTRY_RESERVED)
+ || is_checksum_name(e->name))
+ continue;
- if (list_cmos_entry(e, TRUE))
- result = 1;
- }
+ if (list_cmos_entry(e, TRUE))
+ result = 1;
+ }
- return result;
- }
+ return result;
+}
/****************************************************************************
* list_param_enums
*
* List all possible values for CMOS parameter given by 'name'.
****************************************************************************/
-static void list_param_enums (const char name[])
- { const cmos_entry_t *e;
- const cmos_enum_t *p;
+static void list_param_enums(const char name[])
+{
+ const cmos_entry_t *e;
+ const cmos_enum_t *p;
- if (is_checksum_name(name) || (e = find_cmos_entry(name)) == NULL)
- { fprintf(stderr, "%s: CMOS parameter %s not found.\n", prog_name, name);
- exit(1);
- }
+ if (is_checksum_name(name) || (e = find_cmos_entry(name)) == NULL) {
+ fprintf(stderr, "%s: CMOS parameter %s not found.\n", prog_name,
+ name);
+ exit(1);
+ }
- switch (e->config)
- { case CMOS_ENTRY_ENUM:
- for (p = first_cmos_enum_id(e->config_id);
- p != NULL;
- p = next_cmos_enum_id(p))
- printf("%s\n", p->text);
+ switch (e->config) {
+ case CMOS_ENTRY_ENUM:
+ for (p = first_cmos_enum_id(e->config_id);
+ p != NULL; p = next_cmos_enum_id(p))
+ printf("%s\n", p->text);
- break;
+ break;
- case CMOS_ENTRY_HEX:
- printf("Parameter %s requires a %u-bit unsigned integer.\n", name,
- e->length);
- break;
+ case CMOS_ENTRY_HEX:
+ printf("Parameter %s requires a %u-bit unsigned integer.\n",
+ name, e->length);
+ break;
- case CMOS_ENTRY_STRING:
- printf("Parameter %s requires a %u-byte string.\n", name,
- e->length / 8);
- break;
+ case CMOS_ENTRY_STRING:
+ printf("Parameter %s requires a %u-byte string.\n", name,
+ e->length / 8);
+ break;
- case CMOS_ENTRY_RESERVED:
- printf("Parameter %s is reserved.\n", name);
- break;
+ case CMOS_ENTRY_RESERVED:
+ printf("Parameter %s is reserved.\n", name);
+ break;
- default:
- BUG();
- }
- }
+ default:
+ BUG();
+ }
+}
/****************************************************************************
* set_one_param
@@ -500,102 +523,107 @@
* a string representation of an unsigned integer that may be specified in
* decimal, hex, or octal.
****************************************************************************/
-static void set_one_param (const char name[], const char value[])
- { const cmos_entry_t *e;
- unsigned long long n;
+static void set_one_param(const char name[], const char value[])
+{
+ const cmos_entry_t *e;
+ unsigned long long n;
- if (is_checksum_name(name) || (e = find_cmos_entry(name)) == NULL)
- { fprintf(stderr, "%s: CMOS parameter %s not found.", prog_name, name);
- exit(1);
- }
+ if (is_checksum_name(name) || (e = find_cmos_entry(name)) == NULL) {
+ fprintf(stderr, "%s: CMOS parameter %s not found.", prog_name,
+ name);
+ exit(1);
+ }
- switch (prepare_cmos_write(e, value, &n))
- { case OK:
- break;
+ switch (prepare_cmos_write(e, value, &n)) {
+ case OK:
+ break;
- case CMOS_OP_BAD_ENUM_VALUE:
- fprintf(stderr, "%s: Bad value for parameter %s.", prog_name, name);
- goto fail;
+ case CMOS_OP_BAD_ENUM_VALUE:
+ fprintf(stderr, "%s: Bad value for parameter %s.", prog_name,
+ name);
+ goto fail;
- case CMOS_OP_NEGATIVE_INT:
- fprintf(stderr,
- "%s: This program does not support assignment of negative "
- "numbers to coreboot parameters.", prog_name);
- goto fail;
+ case CMOS_OP_NEGATIVE_INT:
+ fprintf(stderr,
+ "%s: This program does not support assignment of negative "
+ "numbers to coreboot parameters.", prog_name);
+ goto fail;
- case CMOS_OP_INVALID_INT:
- fprintf(stderr, "%s: %s is not a valid integer.", prog_name, value);
- goto fail;
+ case CMOS_OP_INVALID_INT:
+ fprintf(stderr, "%s: %s is not a valid integer.", prog_name,
+ value);
+ goto fail;
- case CMOS_OP_RESERVED:
- fprintf(stderr,
- "%s: Can not modify reserved coreboot parameter %s.",
- prog_name, name);
- goto fail;
+ case CMOS_OP_RESERVED:
+ fprintf(stderr,
+ "%s: Can not modify reserved coreboot parameter %s.",
+ prog_name, name);
+ goto fail;
- case CMOS_OP_VALUE_TOO_WIDE:
- fprintf(stderr,
- "%s: Can not write value %s to CMOS parameter %s that is "
- "only %d bits wide.", prog_name, value, name, e->length);
- goto fail;
+ case CMOS_OP_VALUE_TOO_WIDE:
+ fprintf(stderr,
+ "%s: Can not write value %s to CMOS parameter %s that is "
+ "only %d bits wide.", prog_name, value, name,
+ e->length);
+ goto fail;
- case CMOS_OP_NO_MATCHING_ENUM:
- fprintf(stderr,
- "%s: coreboot parameter %s has no matching enums.",
- prog_name, name);
- goto fail;
+ case CMOS_OP_NO_MATCHING_ENUM:
+ fprintf(stderr,
+ "%s: coreboot parameter %s has no matching enums.",
+ prog_name, name);
+ goto fail;
- case CMOS_AREA_OUT_OF_RANGE:
- fprintf(stderr,
- "%s: The CMOS area specified by the layout info for "
- "coreboot parameter %s is out of range.", prog_name, name);
- goto fail;
+ case CMOS_AREA_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: The CMOS area specified by the layout info for "
+ "coreboot parameter %s is out of range.", prog_name,
+ name);
+ goto fail;
- case CMOS_AREA_OVERLAPS_RTC:
- fprintf(stderr,
- "%s: The CMOS area specified by the layout info for "
- "coreboot parameter %s overlaps the realtime clock area.",
- prog_name, name);
- goto fail;
+ case CMOS_AREA_OVERLAPS_RTC:
+ fprintf(stderr,
+ "%s: The CMOS area specified by the layout info for "
+ "coreboot parameter %s overlaps the realtime clock area.",
+ prog_name, name);
+ goto fail;
- case CMOS_AREA_TOO_WIDE:
- fprintf(stderr,
- "%s: The CMOS area specified by the layout info for "
- "coreboot parameter %s is too wide.",
- prog_name, name);
- goto fail;
+ case CMOS_AREA_TOO_WIDE:
+ fprintf(stderr,
+ "%s: The CMOS area specified by the layout info for "
+ "coreboot parameter %s is too wide.", prog_name, name);
+ goto fail;
- default:
- fprintf(stderr,
- "%s: Unknown error encountered while attempting to modify "
- "coreboot parameter %s.", prog_name, name);
- goto fail;
- }
+ default:
+ fprintf(stderr,
+ "%s: Unknown error encountered while attempting to modify "
+ "coreboot parameter %s.", prog_name, name);
+ goto fail;
+ }
- /* write the value to nonvolatile RAM */
- set_iopl(3);
- cmos_write(e, n);
- cmos_checksum_write(cmos_checksum_compute());
- set_iopl(0);
- return;
+ /* write the value to nonvolatile RAM */
+ set_iopl(3);
+ cmos_write(e, n);
+ cmos_checksum_write(cmos_checksum_compute());
+ set_iopl(0);
+ return;
-fail:
- fprintf(stderr, " CMOS write not performed.\n");
- exit(1);
- }
+ fail:
+ fprintf(stderr, " CMOS write not performed.\n");
+ exit(1);
+}
/****************************************************************************
* set_params
*
* Set coreboot parameters according to the contents of file 'f'.
****************************************************************************/
-static void set_params (FILE *f)
- { /* First process the input file. Then perform writes only if there were
- * no problems processing the input. Either all values will be written
- * successfully or no values will be written.
- */
- do_cmos_writes(process_input_file(f));
- }
+static void set_params(FILE * f)
+{ /* First process the input file. Then perform writes only if there were
+ * no problems processing the input. Either all values will be written
+ * successfully or no values will be written.
+ */
+ do_cmos_writes(process_input_file(f));
+}
/****************************************************************************
* parse_assignment
@@ -606,31 +634,31 @@
* into substrings representing NAME and VALUE, and *name and *value are set
* to point to these two substrings.
****************************************************************************/
-static void parse_assignment (char arg[], const char **name,
- const char **value)
- { static const size_t N_MATCHES = 4;
- regmatch_t match[N_MATCHES];
- regex_t assignment;
+static void parse_assignment(char arg[], const char **name, const char **value)
+{
+ static const size_t N_MATCHES = 4;
+ regmatch_t match[N_MATCHES];
+ regex_t assignment;
- compile_reg_exprs(REG_EXTENDED | REG_NEWLINE, 1, assignment_regex,
- &assignment);
+ compile_reg_exprs(REG_EXTENDED | REG_NEWLINE, 1, assignment_regex,
+ &assignment);
- /* Does 'arg' conform to proper assignment syntax? If not, exit with a
- * usage message.
- */
- if (regexec(&assignment, arg, N_MATCHES, match, 0))
- usage(stderr);
+ /* Does 'arg' conform to proper assignment syntax? If not, exit with a
+ * usage message.
+ */
+ if (regexec(&assignment, arg, N_MATCHES, match, 0))
+ usage(stderr);
- /* Ok, we found a valid assignment. Break it into two strings
- * representing NAME and VALUE.
- */
- arg[match[1].rm_eo] = '\0';
- arg[match[2].rm_eo] = '\0';
- *name = &arg[match[1].rm_so];
- *value = &arg[match[2].rm_so];
+ /* Ok, we found a valid assignment. Break it into two strings
+ * representing NAME and VALUE.
+ */
+ arg[match[1].rm_eo] = '\0';
+ arg[match[2].rm_eo] = '\0';
+ *name = &arg[match[1].rm_so];
+ *value = &arg[match[2].rm_so];
- free_reg_exprs(1, &assignment);
- }
+ free_reg_exprs(1, &assignment);
+}
/****************************************************************************
* list_cmos_entry
@@ -640,90 +668,96 @@
* along with its value. On success, return OK. On error, print an error
* message and return 1.
****************************************************************************/
-static int list_cmos_entry (const cmos_entry_t *e, int show_name)
- { const cmos_enum_t *p;
- unsigned long long value;
+static int list_cmos_entry(const cmos_entry_t * e, int show_name)
+{
+ const cmos_enum_t *p;
+ unsigned long long value;
- /* sanity check CMOS entry */
- switch (prepare_cmos_read(e))
- { case OK:
- break;
+ /* sanity check CMOS entry */
+ switch (prepare_cmos_read(e)) {
+ case OK:
+ break;
- case CMOS_OP_RESERVED:
- BUG();
+ case CMOS_OP_RESERVED:
+ BUG();
- case CMOS_AREA_OUT_OF_RANGE:
- fprintf(stderr, "%s: Can not read coreboot parameter %s because "
- "layout info specifies out of range CMOS area.\n", prog_name,
- e->name);
- return 1;
+ case CMOS_AREA_OUT_OF_RANGE:
+ fprintf(stderr,
+ "%s: Can not read coreboot parameter %s because "
+ "layout info specifies out of range CMOS area.\n",
+ prog_name, e->name);
+ return 1;
- case CMOS_AREA_OVERLAPS_RTC:
- fprintf(stderr, "%s: Can not read coreboot parameter %s because "
- "layout info specifies CMOS area that overlaps realtime "
- "clock area.\n", prog_name, e->name);
- return 1;
+ case CMOS_AREA_OVERLAPS_RTC:
+ fprintf(stderr,
+ "%s: Can not read coreboot parameter %s because "
+ "layout info specifies CMOS area that overlaps realtime "
+ "clock area.\n", prog_name, e->name);
+ return 1;
- case CMOS_AREA_TOO_WIDE:
- fprintf(stderr, "%s: Can not read coreboot parameter %s because "
- "layout info specifies CMOS area that is too wide.\n",
- prog_name, e->name);
- return 1;
+ case CMOS_AREA_TOO_WIDE:
+ fprintf(stderr,
+ "%s: Can not read coreboot parameter %s because "
+ "layout info specifies CMOS area that is too wide.\n",
+ prog_name, e->name);
+ return 1;
- default:
- fprintf(stderr, "%s: Unknown error encountered while attempting to "
- "read coreboot parameter %s\n", prog_name, e->name);
- return 1;
- }
+ default:
+ fprintf(stderr,
+ "%s: Unknown error encountered while attempting to "
+ "read coreboot parameter %s\n", prog_name, e->name);
+ return 1;
+ }
- /* read the value from CMOS */
- set_iopl(3);
- value = cmos_read(e);
- set_iopl(0);
+ /* read the value from CMOS */
+ set_iopl(3);
+ value = cmos_read(e);
+ set_iopl(0);
- /* display the value */
- switch (e->config)
- { case CMOS_ENTRY_ENUM:
- if ((p = find_cmos_enum(e->config_id, value)) == NULL)
- { if (show_name)
- printf("# Bad value -> %s = 0x%llx\n", e->name, value);
- else
- printf("Bad value -> 0x%llx\n", value);
- }
- else
- { if (show_name)
- printf("%s = %s\n", e->name, p->text);
- else
- printf("%s\n", p->text);
- }
+ /* display the value */
+ switch (e->config) {
+ case CMOS_ENTRY_ENUM:
+ if ((p = find_cmos_enum(e->config_id, value)) == NULL) {
+ if (show_name)
+ printf("# Bad value -> %s = 0x%llx\n", e->name,
+ value);
+ else
+ printf("Bad value -> 0x%llx\n", value);
+ } else {
+ if (show_name)
+ printf("%s = %s\n", e->name, p->text);
+ else
+ printf("%s\n", p->text);
+ }
- break;
+ break;
- case CMOS_ENTRY_HEX:
- if (show_name)
- printf("%s = 0x%llx\n", e->name, value);
- else
- printf("0x%llx\n", value);
+ case CMOS_ENTRY_HEX:
+ if (show_name)
+ printf("%s = 0x%llx\n", e->name, value);
+ else
+ printf("0x%llx\n", value);
- break;
+ break;
- case CMOS_ENTRY_STRING:
- if (show_name)
- printf("%s = %s\n", e->name, (char *)(unsigned long)value);
- else
- printf("%s\n", (char *)(unsigned long)value);
+ case CMOS_ENTRY_STRING:
+ if (show_name)
+ printf("%s = %s\n", e->name,
+ (char *)(unsigned long)value);
+ else
+ printf("%s\n", (char *)(unsigned long)value);
- free((void *)(unsigned long)value);
+ free((void *)(unsigned long)value);
- break;
+ break;
- case CMOS_ENTRY_RESERVED:
- default:
- BUG();
- }
+ case CMOS_ENTRY_RESERVED:
+ default:
+ BUG();
+ }
- return OK;
- }
+ return OK;
+}
/****************************************************************************
* convert_checksum_value
@@ -733,36 +767,40 @@
* unsigned integer and return the result. Exit with an error message if
* 'value' is invalid.
****************************************************************************/
-static uint16_t convert_checksum_value (const char value[])
- { unsigned long n;
- const char *p;
- uint16_t result;
- int negative;
+static uint16_t convert_checksum_value(const char value[])
+{
+ unsigned long n;
+ const char *p;
+ uint16_t result;
+ int negative;
- for (p = value; isspace(*p); p++);
+ for (p = value; isspace(*p); p++) ;
- negative = (*p == '-');
- n = strtoul(value, (char **) &p, 0);
+ negative = (*p == '-');
+ n = strtoul(value, (char **)&p, 0);
- if (*p)
- { fprintf(stderr, "%s: Checksum value %s is not a valid integer.\n",
- prog_name, value);
- exit(1);
- }
+ if (*p) {
+ fprintf(stderr,
+ "%s: Checksum value %s is not a valid integer.\n",
+ prog_name, value);
+ exit(1);
+ }
- if (negative)
- { fprintf(stderr,
- "%s: Checksum must be an unsigned integer.\n", prog_name);
- exit(1);
- }
+ if (negative) {
+ fprintf(stderr,
+ "%s: Checksum must be an unsigned integer.\n",
+ prog_name);
+ exit(1);
+ }
- result = (uint16_t) n;
+ result = (uint16_t) n;
- if (result != n)
- { fprintf(stderr,
- "%s: Checksum value must fit within 16 bits.\n", prog_name);
- exit(1);
- }
+ if (result != n) {
+ fprintf(stderr,
+ "%s: Checksum value must fit within 16 bits.\n",
+ prog_name);
+ exit(1);
+ }
- return result;
- }
+ return result;
+}
Modified: trunk/util/nvramtool/opts.c
===================================================================
--- trunk/util/nvramtool/opts.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/opts.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -35,11 +35,11 @@
nvramtool_op_modifier_info_t nvramtool_op_modifiers[NVRAMTOOL_NUM_OP_MODIFIERS];
-static char * handle_optional_arg (int argc, char *argv[]);
-static void register_op (int *op_found, nvramtool_op_t op, char op_param[]);
-static void register_op_modifier (nvramtool_op_modifier_t mod, char mod_param[]);
-static void resolve_op_modifiers (void);
-static void sanity_check_args (void);
+static char *handle_optional_arg(int argc, char *argv[]);
+static void register_op(int *op_found, nvramtool_op_t op, char op_param[]);
+static void register_op_modifier(nvramtool_op_modifier_t mod, char mod_param[]);
+static void resolve_op_modifiers(void);
+static void sanity_check_args(void);
static const char getopt_string[] = "-ab:B:c::de:hil::np:r:tvw:xX:y:Y";
@@ -48,143 +48,158 @@
*
* Parse command line arguments.
****************************************************************************/
-void parse_nvramtool_args (int argc, char *argv[])
- { nvramtool_op_modifier_info_t *mod_info;
- int i, op_found;
- char c;
+void parse_nvramtool_args(int argc, char *argv[])
+{
+ nvramtool_op_modifier_info_t *mod_info;
+ int i, op_found;
+ char c;
- for (i = 0, mod_info = nvramtool_op_modifiers;
- i < NVRAMTOOL_NUM_OP_MODIFIERS;
- i++, mod_info++)
- { mod_info->found = FALSE;
- mod_info->found_seq = 0;
- mod_info->param = NULL;
- }
+ for (i = 0, mod_info = nvramtool_op_modifiers;
+ i < NVRAMTOOL_NUM_OP_MODIFIERS; i++, mod_info++) {
+ mod_info->found = FALSE;
+ mod_info->found_seq = 0;
+ mod_info->param = NULL;
+ }
- op_found = FALSE;
- opterr = 0;
+ op_found = FALSE;
+ opterr = 0;
- do
- { switch (c = getopt(argc, argv, getopt_string))
- { case 'a':
- register_op(&op_found, NVRAMTOOL_OP_CMOS_SHOW_ALL_PARAMS, NULL);
- break;
- case 'b':
- register_op(&op_found, NVRAMTOOL_OP_WRITE_CMOS_DUMP, optarg);
- break;
- case 'B':
- register_op(&op_found, NVRAMTOOL_OP_READ_CMOS_DUMP, optarg);
- break;
- case 'c':
- register_op(&op_found, NVRAMTOOL_OP_CMOS_CHECKSUM,
- handle_optional_arg(argc, argv));
- break;
- case 'd':
- register_op(&op_found, NVRAMTOOL_OP_LBTABLE_DUMP, NULL);
- break;
- case 'e':
- register_op(&op_found, NVRAMTOOL_OP_SHOW_PARAM_VALUES, optarg);
- break;
- case 'h':
- register_op(&op_found, NVRAMTOOL_OP_SHOW_USAGE, NULL);
- break;
- case 'i':
- register_op(&op_found, NVRAMTOOL_OP_CMOS_SET_PARAMS_STDIN, NULL);
- break;
- case 'l':
- register_op(&op_found, NVRAMTOOL_OP_LBTABLE_SHOW_INFO,
- handle_optional_arg(argc, argv));
- break;
- case 'n':
- register_op_modifier(NVRAMTOOL_MOD_SHOW_VALUE_ONLY, NULL);
- break;
- case 'p':
- register_op(&op_found, NVRAMTOOL_OP_CMOS_SET_PARAMS_FILE, optarg);
- break;
- case 'r':
- register_op(&op_found, NVRAMTOOL_OP_CMOS_SHOW_ONE_PARAM, optarg);
- break;
- case 't':
- register_op_modifier(NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE, NULL);
- break;
- case 'v':
- register_op(&op_found, NVRAMTOOL_OP_SHOW_VERSION, NULL);
- break;
- case 'w':
- register_op(&op_found, NVRAMTOOL_OP_CMOS_SET_ONE_PARAM, optarg);
- break;
- case 'x':
- register_op(&op_found, NVRAMTOOL_OP_SHOW_CMOS_HEX_DUMP, NULL);
- break;
- case 'X':
- register_op(&op_found, NVRAMTOOL_OP_SHOW_CMOS_DUMPFILE, optarg);
- break;
- case 'y':
- register_op_modifier(NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE, optarg);
- break;
- case 'Y':
- register_op(&op_found, NVRAMTOOL_OP_SHOW_LAYOUT, NULL);
- break;
- case -1: /* no more command line args */
- break;
- case '?': /* unknown option found */
- case 1: /* nonoption command line arg found */
- default:
- usage(stderr);
- break;
- }
- }
- while (c != -1);
+ do {
+ switch (c = getopt(argc, argv, getopt_string)) {
+ case 'a':
+ register_op(&op_found,
+ NVRAMTOOL_OP_CMOS_SHOW_ALL_PARAMS, NULL);
+ break;
+ case 'b':
+ register_op(&op_found, NVRAMTOOL_OP_WRITE_CMOS_DUMP,
+ optarg);
+ break;
+ case 'B':
+ register_op(&op_found, NVRAMTOOL_OP_READ_CMOS_DUMP,
+ optarg);
+ break;
+ case 'c':
+ register_op(&op_found, NVRAMTOOL_OP_CMOS_CHECKSUM,
+ handle_optional_arg(argc, argv));
+ break;
+ case 'd':
+ register_op(&op_found, NVRAMTOOL_OP_LBTABLE_DUMP, NULL);
+ break;
+ case 'e':
+ register_op(&op_found, NVRAMTOOL_OP_SHOW_PARAM_VALUES,
+ optarg);
+ break;
+ case 'h':
+ register_op(&op_found, NVRAMTOOL_OP_SHOW_USAGE, NULL);
+ break;
+ case 'i':
+ register_op(&op_found,
+ NVRAMTOOL_OP_CMOS_SET_PARAMS_STDIN, NULL);
+ break;
+ case 'l':
+ register_op(&op_found, NVRAMTOOL_OP_LBTABLE_SHOW_INFO,
+ handle_optional_arg(argc, argv));
+ break;
+ case 'n':
+ register_op_modifier(NVRAMTOOL_MOD_SHOW_VALUE_ONLY,
+ NULL);
+ break;
+ case 'p':
+ register_op(&op_found,
+ NVRAMTOOL_OP_CMOS_SET_PARAMS_FILE, optarg);
+ break;
+ case 'r':
+ register_op(&op_found, NVRAMTOOL_OP_CMOS_SHOW_ONE_PARAM,
+ optarg);
+ break;
+ case 't':
+ register_op_modifier(NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE,
+ NULL);
+ break;
+ case 'v':
+ register_op(&op_found, NVRAMTOOL_OP_SHOW_VERSION, NULL);
+ break;
+ case 'w':
+ register_op(&op_found, NVRAMTOOL_OP_CMOS_SET_ONE_PARAM,
+ optarg);
+ break;
+ case 'x':
+ register_op(&op_found, NVRAMTOOL_OP_SHOW_CMOS_HEX_DUMP,
+ NULL);
+ break;
+ case 'X':
+ register_op(&op_found, NVRAMTOOL_OP_SHOW_CMOS_DUMPFILE,
+ optarg);
+ break;
+ case 'y':
+ register_op_modifier(NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE,
+ optarg);
+ break;
+ case 'Y':
+ register_op(&op_found, NVRAMTOOL_OP_SHOW_LAYOUT, NULL);
+ break;
+ case -1: /* no more command line args */
+ break;
+ case '?': /* unknown option found */
+ case 1: /* nonoption command line arg found */
+ default:
+ usage(stderr);
+ break;
+ }
+ } while (c != -1);
- if (!op_found)
- usage(stderr);
+ if (!op_found)
+ usage(stderr);
- resolve_op_modifiers();
- sanity_check_args();
- }
+ resolve_op_modifiers();
+ sanity_check_args();
+}
/****************************************************************************
* handle_optional_arg
*
* Handle a command line option with an optional argument.
****************************************************************************/
-static char * handle_optional_arg (int argc, char *argv[])
- { char *arg;
+static char *handle_optional_arg(int argc, char *argv[])
+{
+ char *arg;
- if (optarg != NULL)
- { /* optional arg is present and arg was specified as "-zarg" (with no
- * whitespace between "z" and "arg"), where -z is the option and "arg"
- * is the value of the optional arg
- */
- return optarg;
- }
+ if (optarg != NULL) {
+ /* optional arg is present and arg was specified as
+ * "-zarg" (with no whitespace between "z" and "arg"),
+ * where -z is the option and "arg" is the value of the
+ * optional arg
+ */
+ return optarg;
+ }
- if ((argv[optind] == NULL) || (argv[optind][0] == '-'))
- return NULL;
+ if ((argv[optind] == NULL) || (argv[optind][0] == '-'))
+ return NULL;
- arg = argv[optind]; /* optional arg is present */
+ arg = argv[optind]; /* optional arg is present */
- /* This call to getopt yields the optional arg we just found, which we want
- * to skip.
- */
- getopt(argc, argv, getopt_string);
+ /* This call to getopt yields the optional arg we just found,
+ * which we want to skip.
+ */
+ getopt(argc, argv, getopt_string);
- return arg;
- }
+ return arg;
+}
/****************************************************************************
* register_op
*
* Store the user's selection of which operation this program should perform.
****************************************************************************/
-static void register_op (int *op_found, nvramtool_op_t op, char op_param[])
- { if (*op_found && (op != nvramtool_op.op))
- usage(stderr);
+static void register_op(int *op_found, nvramtool_op_t op, char op_param[])
+{
+ if (*op_found && (op != nvramtool_op.op))
+ usage(stderr);
- *op_found = TRUE;
- nvramtool_op.op = op;
- nvramtool_op.param = op_param;
- }
+ *op_found = TRUE;
+ nvramtool_op.op = op;
+ nvramtool_op.param = op_param;
+}
/****************************************************************************
* register_op_modifier
@@ -192,15 +207,16 @@
* Store information regarding an optional argument specified in addition to
* the user's selection of which operation this program should perform.
****************************************************************************/
-static void register_op_modifier (nvramtool_op_modifier_t mod, char mod_param[])
- { static int found_seq = 0;
- nvramtool_op_modifier_info_t *mod_info;
+static void register_op_modifier(nvramtool_op_modifier_t mod, char mod_param[])
+{
+ static int found_seq = 0;
+ nvramtool_op_modifier_info_t *mod_info;
- mod_info = &nvramtool_op_modifiers[mod];
- mod_info->found = TRUE;
- mod_info->found_seq = ++found_seq;
- mod_info->param = mod_param;
- }
+ mod_info = &nvramtool_op_modifiers[mod];
+ mod_info->found = TRUE;
+ mod_info->found_seq = ++found_seq;
+ mod_info->param = mod_param;
+}
/****************************************************************************
* resolve_op_modifiers
@@ -208,24 +224,28 @@
* If the user specifies multiple arguments that conflict with each other,
* the last specified argument overrides previous conflicting arguments.
****************************************************************************/
-static void resolve_op_modifiers (void)
- { if (nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found &&
- nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE].found)
- { if (nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found_seq >
- nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE].found_seq)
- nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE].found = FALSE;
- else
- nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found = FALSE;
- }
- }
+static void resolve_op_modifiers(void)
+{
+ if (nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found &&
+ nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE].found) {
+ if (nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found_seq >
+ nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE].found_seq)
+ nvramtool_op_modifiers
+ [NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE].found = FALSE;
+ else
+ nvramtool_op_modifiers
+ [NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE].found = FALSE;
+ }
+}
/****************************************************************************
* sanity_check_args
*
* Perform sanity checking on command line arguments.
****************************************************************************/
-static void sanity_check_args (void)
- { if ((nvramtool_op_modifiers[NVRAMTOOL_MOD_SHOW_VALUE_ONLY].found) &&
- (nvramtool_op.op != NVRAMTOOL_OP_CMOS_SHOW_ONE_PARAM))
- usage(stderr);
- }
+static void sanity_check_args(void)
+{
+ if ((nvramtool_op_modifiers[NVRAMTOOL_MOD_SHOW_VALUE_ONLY].found) &&
+ (nvramtool_op.op != NVRAMTOOL_OP_CMOS_SHOW_ONE_PARAM))
+ usage(stderr);
+}
Modified: trunk/util/nvramtool/opts.h
===================================================================
--- trunk/util/nvramtool/opts.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/opts.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -33,51 +33,45 @@
#include "common.h"
-typedef enum
- { NVRAMTOOL_OP_SHOW_VERSION = 0,
- NVRAMTOOL_OP_SHOW_USAGE,
- NVRAMTOOL_OP_LBTABLE_SHOW_INFO,
- NVRAMTOOL_OP_LBTABLE_DUMP,
- NVRAMTOOL_OP_SHOW_PARAM_VALUES,
- NVRAMTOOL_OP_CMOS_SHOW_ONE_PARAM,
- NVRAMTOOL_OP_CMOS_SHOW_ALL_PARAMS,
- NVRAMTOOL_OP_CMOS_SET_ONE_PARAM,
- NVRAMTOOL_OP_CMOS_SET_PARAMS_STDIN,
- NVRAMTOOL_OP_CMOS_SET_PARAMS_FILE,
- NVRAMTOOL_OP_CMOS_CHECKSUM,
- NVRAMTOOL_OP_SHOW_LAYOUT,
- NVRAMTOOL_OP_WRITE_CMOS_DUMP,
- NVRAMTOOL_OP_READ_CMOS_DUMP,
- NVRAMTOOL_OP_SHOW_CMOS_HEX_DUMP,
- NVRAMTOOL_OP_SHOW_CMOS_DUMPFILE
- }
-nvramtool_op_t;
+typedef enum { NVRAMTOOL_OP_SHOW_VERSION = 0,
+ NVRAMTOOL_OP_SHOW_USAGE,
+ NVRAMTOOL_OP_LBTABLE_SHOW_INFO,
+ NVRAMTOOL_OP_LBTABLE_DUMP,
+ NVRAMTOOL_OP_SHOW_PARAM_VALUES,
+ NVRAMTOOL_OP_CMOS_SHOW_ONE_PARAM,
+ NVRAMTOOL_OP_CMOS_SHOW_ALL_PARAMS,
+ NVRAMTOOL_OP_CMOS_SET_ONE_PARAM,
+ NVRAMTOOL_OP_CMOS_SET_PARAMS_STDIN,
+ NVRAMTOOL_OP_CMOS_SET_PARAMS_FILE,
+ NVRAMTOOL_OP_CMOS_CHECKSUM,
+ NVRAMTOOL_OP_SHOW_LAYOUT,
+ NVRAMTOOL_OP_WRITE_CMOS_DUMP,
+ NVRAMTOOL_OP_READ_CMOS_DUMP,
+ NVRAMTOOL_OP_SHOW_CMOS_HEX_DUMP,
+ NVRAMTOOL_OP_SHOW_CMOS_DUMPFILE
+} nvramtool_op_t;
-typedef struct
- { nvramtool_op_t op;
- char *param;
- }
-nvramtool_op_info_t;
+typedef struct {
+ nvramtool_op_t op;
+ char *param;
+} nvramtool_op_info_t;
-typedef enum
- { NVRAMTOOL_MOD_SHOW_VALUE_ONLY = 0,
- NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE,
- NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE,
- NVRAMTOOL_NUM_OP_MODIFIERS /* must always be last */
- }
-nvramtool_op_modifier_t;
+typedef enum { NVRAMTOOL_MOD_SHOW_VALUE_ONLY = 0,
+ NVRAMTOOL_MOD_USE_CMOS_LAYOUT_FILE,
+ NVRAMTOOL_MOD_USE_CMOS_OPT_TABLE,
+ NVRAMTOOL_NUM_OP_MODIFIERS /* must always be last */
+} nvramtool_op_modifier_t;
-typedef struct
- { int found;
- int found_seq;
- char *param;
- }
-nvramtool_op_modifier_info_t;
+typedef struct {
+ int found;
+ int found_seq;
+ char *param;
+} nvramtool_op_modifier_info_t;
extern nvramtool_op_info_t nvramtool_op;
extern nvramtool_op_modifier_info_t nvramtool_op_modifiers[];
-void parse_nvramtool_args (int argc, char *argv[]);
+void parse_nvramtool_args(int argc, char *argv[]);
-#endif /* OPTS_H */
+#endif /* OPTS_H */
Modified: trunk/util/nvramtool/reg_expr.c
===================================================================
--- trunk/util/nvramtool/reg_expr.c 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/reg_expr.c 2010-01-13 21:00:23 UTC (rev 5007)
@@ -37,44 +37,46 @@
*
* Compile a bunch of regular expressions.
****************************************************************************/
-void compile_reg_exprs (int cflags, int num_exprs,
- /* const char *expr1, regex_t *reg1, */ ...)
- { static const size_t ERROR_BUF_SIZE = 256;
- char error_msg[ERROR_BUF_SIZE];
- va_list ap;
- regex_t *reg;
- const char *expr;
- int i, result;
+void compile_reg_exprs(int cflags, int num_exprs,
+ /* const char *expr1, regex_t *reg1, */ ...)
+{
+ static const size_t ERROR_BUF_SIZE = 256;
+ char error_msg[ERROR_BUF_SIZE];
+ va_list ap;
+ regex_t *reg;
+ const char *expr;
+ int i, result;
- va_start(ap, num_exprs);
+ va_start(ap, num_exprs);
- for (i = 0; i < num_exprs; i++)
- { expr = va_arg(ap, const char *);
- reg = va_arg(ap, regex_t *);
+ for (i = 0; i < num_exprs; i++) {
+ expr = va_arg(ap, const char *);
+ reg = va_arg(ap, regex_t *);
- if ((result = regcomp(reg, expr, cflags)) != 0)
- { regerror(result, reg, error_msg, ERROR_BUF_SIZE);
- fprintf(stderr, "%s: %s\n", prog_name, error_msg);
- exit(1);
- }
- }
+ if ((result = regcomp(reg, expr, cflags)) != 0) {
+ regerror(result, reg, error_msg, ERROR_BUF_SIZE);
+ fprintf(stderr, "%s: %s\n", prog_name, error_msg);
+ exit(1);
+ }
+ }
- va_end(ap);
- }
+ va_end(ap);
+}
/****************************************************************************
* free_reg_exprs
*
* Destroy a bunch of previously compiled regular expressions.
****************************************************************************/
-void free_reg_exprs (int num_exprs, /* regex_t *reg1, */ ...)
- { va_list ap;
- int i;
+void free_reg_exprs(int num_exprs, /* regex_t *reg1, */ ...)
+{
+ va_list ap;
+ int i;
- va_start(ap, num_exprs);
+ va_start(ap, num_exprs);
- for (i = 0; i < num_exprs; i++)
- regfree(va_arg(ap, regex_t *));
+ for (i = 0; i < num_exprs; i++)
+ regfree(va_arg(ap, regex_t *));
- va_end(ap);
- }
+ va_end(ap);
+}
Modified: trunk/util/nvramtool/reg_expr.h
===================================================================
--- trunk/util/nvramtool/reg_expr.h 2010-01-11 09:05:52 UTC (rev 5006)
+++ trunk/util/nvramtool/reg_expr.h 2010-01-13 21:00:23 UTC (rev 5007)
@@ -34,8 +34,8 @@
#include <regex.h>
#include "common.h"
-void compile_reg_exprs (int cflags, int num_exprs,
- /* const char *expr1, regex_t *reg1, */ ...);
-void free_reg_exprs (int num_exprs, /* regex_t *reg1, */ ...);
+void compile_reg_exprs(int cflags, int num_exprs,
+ /* const char *expr1, regex_t *reg1, */ ...);
+void free_reg_exprs(int num_exprs, /* regex_t *reg1, */ ...);
-#endif /* REG_EXPR_H */
+#endif /* REG_EXPR_H */
1
0
I've hacked up a version of libpayload which doesn't depend on TSC
to get payloads running on my platform. It seems an unnecessary limitation of the library that it needs this, and also that it
checks CPU speed before the payload main() is called, meaning
you can't avoid it in your payload implementation without
recompilation of the lib.
I was just wondering if there would be any interest in a patch
to remove the dependency. It doesn't look too tricky, however
the ndelay function is hard to implement without TSC. Is this
function really needed? Which payloads are likely to suffer
if it's inaccurate? mdelay can be pretty accurate using the
PIT, udelay could perhaps be based on port 80 reads instead.
A scheme could be put in place to detect the TSC instruction
and fall back on alternative routines if it doesn't exist,
however as far as I can see this will involve creation of
an illegal instruction trap, setting up the IDT etc, which
might not be desirable. Removing TSC altogether may be
more appropriate, especially if the ndelay() routine isn't
really needed (my CPU is 150MHz).
Or we could just add a compilation option, however since
libpayload is a library I don't think that's ideal.
Any thoughts?
kind regards,
Biff.
4
3
Hello,
over this week I've tried to do a proper IRQ assignment on the H8QME-2+
I've got here. So opened mp_tables.c and started changing the irq
routing values with those I got form the board booting with a factory
bios. Then I started giving the devices the irq they have when boot with
factory bios and it booted without any problems except for two things
first of all the two NICs still have irq 0 and thats because they are
not pending on the mcp55 as they are on the "donator" board but on a AMD
8132 tunnel devices that is hanging on a different node:
socketF(node3) ----------- socketF(node2)
| |
socketF(node1) ----------- socketF(node0)
| |
|ht |ht
| |
AMD8132 MCP55
|-- LAN |
|-- SCSI |-- SATA
|-- ATI ES 1000
|-- USB
|-- PCI
| lpc
SIO
I started adding the AMD8132 to the get_bus_conf.c code, by adding I
mean stealing code from other boards pasting it to get_bus_conf and
trying to make it work ;). So the problem there is that coreboot won't
boot with the new code but not because the code is incorrect because it
wasn't even executed, I know that because coreboot soft resets in middle
of cpu initialization. I already increased Stack size up to 0x10000 more
makes the boot sequence fail.
My second problem is the, irq_tables.c code I tried to customize for
this board. I first tried the handy tool that comes with coreboot that
auto-generates the irq_tables.c file but it doesn't compile with my
board but I at least was able to use the information to modify the
already existing irq_tables.c. So before doing changes the dump_irq
output look like that:
Interrupt routing table found at address 0xf55bb:
Version 106.117, size 0x8366
Interrupt router is device 3d:17.4
PCI exclusive interrupt mask: 0x0fde [1,2,3,4,6,7,8,9,10,11]
Compatible router: vendor 0x0000 device 0x6075
Device d2:00.2 (slot 106):
INTA: link 0x54, irq mask 0x0005 [0,2]
INTB: link 0x40, irq mask 0xc839 [0,3,4,5,11,14,15]
INTC: link 0x72, irq mask 0x84f7 [0,1,2,4,5,6,7,10,15]
INTD: link 0xd2, irq mask 0x4275 [0,2,4,5,6,9,14]
Device 83:19.2 (slot 195):
INTA: link 0xff, irq mask 0x74b8 [3,4,5,7,10,12,13,14]
INTB: link 0x74, irq mask 0x000f [0,1,2,3]
INTC: link 0xe8, irq mask 0x9f77 [0,1,2,4,5,6,8,9,10,11,12,15]
INTD: link 0xff, irq mask 0x89ff [0,1,2,3,4,5,6,7,8,11,15]
....
Interrupt router at 3d:17.4:
Could not read router info from /proc/bus/pci/3d/17.4.
and after compiling with the new irq_tables.c I've got the exact same
output! So no changes were applied, I cleaned everything before
compiling so no doubt I compiled the correct file. So why is it still
the same? (I attached a dump_irq output from the board with factory bios).
And last but not least, at linux bootup it complains to find only 2 cpus
but 16 cores later doing a lspci I can see all 4 cpus (18.0, 19,0 1a.0,
1b.0) and Linux only recognizes 8GB of ram but there are 16GB installed!
Thanks in advanced and have a nice weekend,
Knut Kujat.
Interrupt routing table found at address 0xf4e30:
Version 1.0, size 0x01b0
Interrupt router is device 00:01.0
PCI exclusive interrupt mask: 0x0000 []
Compatible router: vendor 0x10de device 0x0364
Device 00:01.0 (slot 0): ISA bridge
INTA: link 0x02, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x05, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:02.0 (slot 0): USB Controller
INTA: link 0x08, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x03, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:08.0 (slot 0):
INTA: link 0x0a, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:09.0 (slot 0):
INTA: link 0x09, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:05.0 (slot 0): IDE interface
INTA: link 0x07, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x06, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x0f, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:06.0 (slot 0): PCI bridge
INTB: link 0x0b, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:0f.0 (slot 0): PCI bridge
INTA: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
Device 07:00.0 (slot 32):
INTA: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:0e.0 (slot 0): PCI bridge
INTA: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
Device 06:00.0 (slot 33):
INTA: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:0d.0 (slot 0): PCI bridge
INTA: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
Device 05:00.0 (slot 34):
INTA: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:0c.0 (slot 0): PCI bridge
INTA: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
Device 04:00.0 (slot 35):
INTA: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:0b.0 (slot 0): PCI bridge
INTA: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
Device 03:00.0 (slot 36):
INTA: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
Device 00:0a.0 (slot 0): PCI bridge
INTA: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
Device 02:00.0 (slot 37):
INTA: link 0x86, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x87, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x84, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x85, irq mask 0x4ca0 [5,7,10,11,14]
Device 01:01.0 (slot 0): VGA compatible controller
INTA: link 0x82, irq mask 0x4ca0 [5,7,10,11,14]
Device 09:01.0 (slot 1):
INTA: link 0x80, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x81, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x82, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x83, irq mask 0x4ca0 [5,7,10,11,14]
Device 09:02.0 (slot 2):
INTA: link 0x81, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x82, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x83, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x80, irq mask 0x4ca0 [5,7,10,11,14]
Device 09:03.0 (slot 0):
INTA: link 0x82, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x83, irq mask 0x4ca0 [5,7,10,11,14]
Device 0a:01.0 (slot 3):
INTA: link 0x80, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x81, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x82, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x83, irq mask 0x4ca0 [5,7,10,11,14]
Device 0a:02.0 (slot 4):
INTA: link 0x81, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x82, irq mask 0x4ca0 [5,7,10,11,14]
INTC: link 0x83, irq mask 0x4ca0 [5,7,10,11,14]
INTD: link 0x80, irq mask 0x4ca0 [5,7,10,11,14]
Device 0a:03.0 (slot 0): Ethernet controller
INTA: link 0x80, irq mask 0x4ca0 [5,7,10,11,14]
INTB: link 0x81, irq mask 0x4ca0 [5,7,10,11,14]
Interrupt router at 00:01.0: unknown vendor 0x10de device 0x0364
PIRQ? (link 0x0a): unrouted?
PIRQ? (link 0x0b): unrouted?
PIRQ? (link 0x80): irq 5
PIRQ? (link 0x81): irq 11
PIRQ? (link 0x82): irq 10
PIRQ? (link 0x83): unrouted?
PIRQ? (link 0x84): unrouted?
PIRQ? (link 0x85): unrouted?
PIRQ? (link 0x86): unrouted?
PIRQ? (link 0x87): unrouted?
PIRQ? (link 0x0f): irq 10
PIRQ? (link 0x02): irq 5
PIRQ? (link 0x03): irq 10
PIRQ? (link 0x05): unrouted?
PIRQ? (link 0x06): irq 10
PIRQ? (link 0x07): irq 5
PIRQ? (link 0x08): irq 11
PIRQ? (link 0x09): unrouted?
2
4
2010/1/12 Stefan Reinauer <stepan(a)coresystems.de>:
>> //#define DIMM1 ((u8) 0xA2)
>> #define DIMM1 DIMM0
> This is wrong. Unless you use two equal DIMMs every time you will end up
> with incorrectly set up RAM and RAM controller
> (which will likely result in behavior such as the one you are seeing)
So what address should I use if I have only one DIMM? Every functions
which operates on RAM memory use dimm0 and dimm1 parameters. Maybe it
will be proper if I just remove all references to DIMM 1 memory?
Anyway I still try to go forward after cache invalidation by
__asm__("wbinvd\n") ...
Thanks for your hint.
--
Piotr Piwko
http://www.embedded-engineering.pl/
1
0
Am 09.01.2010 13:29, schrieb joe(a)settoplinux.org:
> Yes you can add Thomson IP1000 and RCA RM4100 to the list. They build fine with
> Kconfig.
>
We automatically test builds on commit. The "Kconfig report" mails on
the list show that currently all boards build properly.
The ones Myles listed are those that boot properly (if I understand him
correctly)
> In fact they do not build the old way anymore, only with Kconfig.
>
On our testbuild box, they still build: See
http://qa.coreboot.org/log_buildbrd.php?revision=5005&device=ip1000&vendor=…,
for example.
> ok but what needs to be done to use tinybootblock?
>
Tinybootblock is only a necessary component for fam10 boards (as their
romstage doesn't fit in 64kb), so while I propose to move everything
over to tinybootblock eventually, we don't have to wait for that before
we phase out newconfig.
With that said, what needs to be done for tinybootblock:
1. Figure out if the chipset requires some sequence to map all ROM ("rom
enable")
2. If no, skip to 5
3. If yes, figure out how rom mapping can be enabled (it's usually
somewhere in the code already)
4. Implement it like in southbridge/amd/amd8111:
4a. Add a new file (I recommend
"southbridge/$vendor/$device/bootblock.c") with a static void
bootblock_southbridge_init(void) function that enables rom mapping
4b. Set BOOTBLOCK_SOUTHBRIDGE_INIT to point to the file
4c. If necessary do the same for the northbridge (see
northbridge/amd/amdfam10 as an example) - shouldn't be necessary except
for k8/fam10
5. Enable TINY_BOOTBLOCK in your board's Kconfig
6. Remove a couple of crt0-y and ldscript-y entries in your board's
Makefile.inc: entry16, reset16, id.inc, failover
7. Add entry32 to crt0-y and ldscript-y (it's usually not added to
ldscript-y yet)
Steps 6 and 7 aren't necessary if your board is using
Makefile.romccboard.inc.
Steps 3 and 4 are per southbridge work - once a southbridge is
supported, moving a board to tinybootblock support is relatively easy.
In theory, that's it (unless I forgot something)
Patrick
4
4
Hi,
There are a bunch of changes under way in coreboot-v2. Because of
these changes and because of the many differences in operation between
boards already in v2, it can be somewhat difficult to figure out what
a board should be doing.
I think some documentation on where functionality in coreboot should
be located would be helpful for developers. I put together some notes
(see below) on what I've gathered from my understanding of the code
and from various emails.
This is just a starting point for discussion. There's a good chance
I've gotten some things wrong. The idea is to document where things
are heading instead of how exactly they are today.
Thoughts?
-Kevin
There are four major phases to coreboot execution: bootblock,
romstage, coreboot_ram, and payload.
bootblock:
The purpose of the bootblock is to enable full access to flash and to
detect and enable fallback booting in necessary. It also does basic
CPU initialization (clears caches and enables 32bit mode). The
objective is to make this code as small and isolated as possible so
that one can deploy new "normal" images without needing to reflash the
bootblock (or the "fallback" image).
Basic attributes:
* Located at end of 32bit ram so that it runs when CPU first starts
executing (at 0xfffffff0).
* Code runs XIP in rom.
* Debugging is generally accomplished via 0x80 ioport (post codes)
* Code is a mixture of assembler and romcc compiled C code. The code
will not attempt to access any RAM memory.
* Full rom mapping and fallback/normal switch can be board specific,
but most of the other code is standard.
* Last step is to jump into "romstage". For the handoff, %eax will
contain the BIST code, the cpu will be in 32bit flat mode, caches
will be disabled, and no stale data will be in the cache.
romstage:
The purpose of the romstage is to enable RAM.
Basic attributes:
* Code runs XIP in rom. The code location is determined at compile
time and is fixed (the code is not PIC and can not be relocated
without recompiling).
* The system will generally enable CAR. This will result in CPU
caches being enabled, variable MTRR for the XIP romstage region
being enabled, and all other variable MTRRs cleared.
* Code uses gcc (CAR) or romcc (non-CAR) compiled C code. In general,
care must be taken to limit memory usage so that storage overflows
don't occur. (As an exception, the last step of decompressing and
launching "coreboot_ram" occurs after memory is initialized and it
uses regular memory and regular gcc compiled code.)
* Early debugging is enabled - debugging is generally accomplished
either via a serial port or via an EHCI debug port.
* Code will enable memory and basic northbridge/cpu/memory controller
settings.
* Last step is to decompress and run "coreboot_ram". For the handoff,
caching will be enabled, memory from 0 - CONFIG_RAMTOP will be fully
mapped and cached, and the entire flash chip will be cached. If CAR
was enabled it is completely torn down. There will be no stale data
in cache. Additional information may be passed from romstage to
coreboot_ram - the information and mechanism is board specific.
coreboot_ram:
The purpose of coreboot_ram is to enable system devices and do
motherboard specific hardware initialization. It also sets up the
coreboot table and various other legacy BIOS tables (eg, ACPI, PIR,
mptable, smbios). The goal is to perform the motherboard specific
initialization so that the payload can be mostly board independent.
Basic attributes:
* Runs from RAM. It is generally stored compressed in the rom. This
code is standard gcc compiled C code - no special tricks for memory
are needed.
* Does PCI enumeration and PCI config space initialization.
* If legacy VGA is enabled, the corresponding PCI config settings are
enabled and 0xa0000-0xc0000 is unmapped and made uncached.
* Builds legacy BIOS tables.
* May emulate vga roms.
* Last step is to decompress and run the "payload". For the handoff,
all MTRRs are initialized, caching is enabled, and the entire flash
chip is cached. There will be no stale data in cache. No specific
information is passed during payload execution, but the payload may
locate the coreboot table and other BIOS tables at standard
locations.
payload:
The purpose of the payload is to load and run the operating system (or
occasionally to be the operating system). It will also initialize
generic hardware that typical operating systems expect to be
initialized before execution.
Basic attributes:
* Stored in flash. Generally stored compressed.
* may use CBFS.
* Generally needs to be aware of hardware still "spinning up".
Open questions:
At what point do the non-BP cpus get shutdown? What phases will use
multiple processors?
How is S3 resume handled?
8
8
Hi,
attached is a small patch for phoenix part in bios_extract to replace
terrible filenames containing '*', '?' or '<'
also fixes 2 bufferoverflows in the filename handling.
mazzoo
2
2