Hi,
attached patch moves coreboot_ram and coreboot_apc to CBFS. That allows to
reduce the size of the bootblock (the patch does this for kontron/986lcd-m),
though I'll work on a more generic solution next (that will fix normal images
with CBFS, too)
coreboot_ram and coreboot_apc are lzma compressed, which gives ~12kb versus
nrv2b on the kontron, some of which will be used for the additional cbfs+lzma
code in the ROM stage.
I tested it with qemu, kontron and amd/serengenti_cheetah (both with and
without CBFS)
The patch for src/lib/cbfs.c isn't very clean right now, I'll fix it up later
by adding ntohll there and fixing up cbfstool to create those fields in
network order, too.
The patch creates three new files by copying:
A + src/arch/i386/init/ldscript_fallback_cbfs.lb
A + src/arch/i386/init/ldscript_cbfs.lb
A + src/arch/i386/lib/cbfs_and_run.c
They are created from ldscript_fallback.lb, ldscript.lb and copy_and_run.c in
the respective directories, then modified.
An example on how the CBFS is used now (as said, the bootblocks can be reduced
in size)
cbfstool coreboot-builds/kontron_986lcd-m/coreboot.rom print
coreboot-builds/kontron_986lcd-m/coreboot.rom: 1024 kB, bootblocksize 131072,
romsize 1048576, offset 0x0
Alignment: 16 bytes
Name Offset Type Size
normal/payload 0x0 payload 23229
normal/coreboot_ram 0x5af0 stage 107448
fallback/payload 0x1fee0 payload 23229
fallback/coreboot_ram 0x259e0 stage 107053
0x3fc50 free 656280
cbfstool coreboot-builds/amd_serengeti_cheetah/coreboot.rom print
coreboot-builds/amd_serengeti_cheetah/coreboot.rom: 512 kB, bootblocksize
266240, romsize 524288, offset 0x0
Alignment: 16 bytes
Name Offset Type Size
normal/payload 0x0 payload 23229
normal/coreboot_ram 0x5af0 stage 61307
normal/coreboot_apc 0x14ab0 stage 5687
fallback/payload 0x16120 payload 23229
fallback/coreboot_ram 0x1bc20 stage 60849
fallback/coreboot_apc 0x2aa10 stage 5687
0x2c080 free 77704
Signed-off-by: Patrick Georgi <patrick.georgi(a)coresystems.de>