coreboot August 2008

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r3450 - trunk/coreboot-v2/src/stream
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:48:00 +0200 (Fri, 01 Aug 2008) New Revision: 3450 Modified: trunk/coreboot-v2/src/stream/rom_stream.c Log: fix compile warnings of rom_stream.c (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/stream/rom_stream.c =================================================================== --- trunk/coreboot-v2/src/stream/rom_stream.c 2008-08-01 11:40:16 UTC (rev 3449) +++ trunk/coreboot-v2/src/stream/rom_stream.c 2008-08-01 11:48:00 UTC (rev 3450) @@ -80,8 +80,8 @@ #if _RAMBASE<0x00100000 olen = *(unsigned int *)dest; #if (CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1) - if((dest < 0xa0000) && ((dest+olen)>0xa0000)) { - dest = (CONFIG_LB_MEM_TOPK<<10); + if((dest < (unsigned char *)0xa0000) && ((dest+olen)>(unsigned char *)0xa0000)) { + dest = (unsigned char *)(CONFIG_LB_MEM_TOPK<<10); } #endif if((dest < (unsigned char *) 0xf0000) && ((dest+olen)> (unsigned char *)0xf0000)) { // coreboot tables etc

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r3449 - trunk/coreboot-v2/src/include
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:40:16 +0200 (Fri, 01 Aug 2008) New Revision: 3449 Modified: trunk/coreboot-v2/src/include/spd.h Log: add some SPD values from specs. (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/include/spd.h =================================================================== --- trunk/coreboot-v2/src/include/spd.h 2008-08-01 11:39:35 UTC (rev 3448) +++ trunk/coreboot-v2/src/include/spd.h 2008-08-01 11:40:16 UTC (rev 3449) @@ -73,6 +73,7 @@ #define SPD_CMD_SIGNAL_INPUT_HOLD_TIME 33 /* Command and address signal input hold time */ #define SPD_DATA_SIGNAL_INPUT_SETUP_TIME 34 /* Data signal input setup time */ #define SPD_DATA_SIGNAL_INPUT_HOLD_TIME 35 /* Data signal input hold time */ +#define SPD_WRITE_RECOVERY_TIME 36 /* Write recovery time (tWR) */ #define SPD_SPD_DATA_REVISION_CODE 62 /* SPD data revision code */ #define SPD_CHECKSUM_FOR_BYTES_0_TO_62 63 /* Checksum for bytes 0-62 */ #define SPD_MANUFACTURER_JEDEC_ID_CODE 64 /* Manufacturer's JEDEC ID code, per EIA/JEP106 (bytes 64-71) */ @@ -129,6 +130,11 @@ #define SPD_CAS_LATENCY_3_5 0x20 #define SPD_CAS_LATENCY_4_0 0x40 +#define SPD_CAS_LATENCY_DDR2_3 (1 << 3) +#define SPD_CAS_LATENCY_DDR2_4 (1 << 4) +#define SPD_CAS_LATENCY_DDR2_5 (1 << 5) +#define SPD_CAS_LATENCY_DDR2_6 (1 << 6) + /* SPD_SUPPORTED_BURST_LENGTHS values. */ #define SPD_BURST_LENGTH_1 1 #define SPD_BURST_LENGTH_2 2

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r3448 - trunk/coreboot-v2/src/include
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:39:35 +0200 (Fri, 01 Aug 2008) New Revision: 3448 Modified: trunk/coreboot-v2/src/include/string.h Log: function prototypes don't need extern. (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/include/string.h =================================================================== --- trunk/coreboot-v2/src/include/string.h 2008-08-01 11:38:23 UTC (rev 3447) +++ trunk/coreboot-v2/src/include/string.h 2008-08-01 11:39:35 UTC (rev 3448) @@ -4,13 +4,13 @@ #include <stddef.h> #include <stdlib.h> -extern void *memcpy(void *dest, const void *src, size_t n); -extern void *memmove(void *dest, const void *src, size_t n); -extern void *memset(void *s, int c, size_t n); -extern int memcmp(const void *s1, const void *s2, size_t n); +void *memcpy(void *dest, const void *src, size_t n); +void *memmove(void *dest, const void *src, size_t n); +void *memset(void *s, int c, size_t n); +int memcmp(const void *s1, const void *s2, size_t n); +void *malloc(size_t size); +int sprintf(char * buf, const char *fmt, ...); -extern int sprintf(char * buf, const char *fmt, ...); - // yes, linux has fancy ones. We don't care. This stuff gets used // hardly at all. And the pain of including those files is just too high.

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r3447 - trunk/coreboot-v2/src/console
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:38:23 +0200 (Fri, 01 Aug 2008) New Revision: 3447 Modified: trunk/coreboot-v2/src/console/vga_console.c Log: fix warning in vga console code (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/console/vga_console.c =================================================================== --- trunk/coreboot-v2/src/console/vga_console.c 2008-08-01 11:37:33 UTC (rev 3446) +++ trunk/coreboot-v2/src/console/vga_console.c 2008-08-01 11:38:23 UTC (rev 3447) @@ -36,7 +36,7 @@ // these are globals vga_line = 0; vga_col = 0; - vidmem = (unsigned char *) VIDBUFFER; + vidmem = (char *) VIDBUFFER; // mainboard or chip specific init routines // also loads font

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r3446 - trunk/coreboot-v2/src/config
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:37:33 +0200 (Fri, 01 Aug 2008) New Revision: 3446 Modified: trunk/coreboot-v2/src/config/coreboot_ram.ld Log: fix typo in coreboot_ram.ld comment (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/config/coreboot_ram.ld =================================================================== --- trunk/coreboot-v2/src/config/coreboot_ram.ld 2008-08-01 11:36:40 UTC (rev 3445) +++ trunk/coreboot-v2/src/config/coreboot_ram.ld 2008-08-01 11:37:33 UTC (rev 3446) @@ -98,7 +98,7 @@ _estack = .; _heap = .; .heap . : { - /* Reserve 256K for the heap */ + /* Reserve HEAP_SIZE bytes for the heap */ . = HEAP_SIZE ; . = ALIGN(4); }

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r3445 - trunk/coreboot-v2/src/sdram
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:36:40 +0200 (Fri, 01 Aug 2008) New Revision: 3445 Modified: trunk/coreboot-v2/src/sdram/generic_sdram.c Log: fix typo in commend of generic_sdram.c (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/sdram/generic_sdram.c =================================================================== --- trunk/coreboot-v2/src/sdram/generic_sdram.c 2008-08-01 11:35:46 UTC (rev 3444) +++ trunk/coreboot-v2/src/sdram/generic_sdram.c 2008-08-01 11:36:40 UTC (rev 3445) @@ -52,7 +52,7 @@ } /* Now that everything is setup enable the SDRAM. - * Some chipsets do the work for use while on others + * Some chipsets do the work for us while on others * we need to it by hand. */ print_debug("Ram3\r\n");

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r3444 - trunk/coreboot-v2/src/drivers/pci/onboard
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:35:46 +0200 (Fri, 01 Aug 2008) New Revision: 3444 Modified: trunk/coreboot-v2/src/drivers/pci/onboard/onboard.c Log: clean up comment in onboard.c (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/drivers/pci/onboard/onboard.c =================================================================== --- trunk/coreboot-v2/src/drivers/pci/onboard/onboard.c 2008-08-01 11:32:12 UTC (rev 3443) +++ trunk/coreboot-v2/src/drivers/pci/onboard/onboard.c 2008-08-01 11:35:46 UTC (rev 3444) @@ -11,58 +11,60 @@ #include <device/pci_ops.h> #include "chip.h" -/*you need to - 1.add - chip drivers/pci/onboard - device pci x.0 on end - register "rom_address" = "0xfff80000" - end - in your MB mainboard Config.lb - 2. add - # 48K for SCSI FW or ATI ROM - option ROM_SIZE = 512*1024-48*1024 - in your MB targets Config.lb, afer romimage "normal" - 3. create you vgabios.bin under normal bios and put that in dir that targets Config residues. - # dd if=/dev/mem of=atix.rom skip=1536 count=96 - 4. after build coreboot.rom - # cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > coreboot.rom - or use nsxv to build you image - # time ./nsxv s2850 +/* + * How to use the onboard device driver for option rom execution: + * + * 1. You need to add the driver to your mainboard Config.lb: + * + * chip drivers/pci/onboard + * device pci x.0 on end + * register "rom_address" = "0xfff80000" + * end + * 2. Reduce the size of your normal (or fallback) image, by adding the + * following lines to your target Config.lb, after romimage "normal" + * # 48K for SCSI FW or ATI ROM + * option ROM_SIZE = 512*1024-48*1024 + * 3. Create your vgabios.bin, for example using awardeco and put it in the + * directory of your target Config.lb. You can also read an option rom from + * a running system, but this is unreliable, as some option roms are changed + * during execution: + * # dd if=/dev/mem of=atix.rom skip=1536 count=96 + * 4. After you built coreboot.rom, attach the option rom to your coreboot + * image: + * # cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > coreboot.rom + * + * Alternatively you can use the following script "nsxv" to build your image + * Usage: + * # ./nsxv s2850 + * + * #!/bin/bash + * MBVENDOR=tyan + * MBMODEL=$1 + * LBROOT=/home/yhlu/xx/xx + * + * echo $1 + * date + * + * cd "$LBROOT/freebios2/targets" + * rm -rf "$MBVENDOR/$MBMODEL/$MBMODEL" + * ./buildtarget "$MBVENDOR/$MBMODEL" &> "$LBROOT/x_b.txt" + * cd "$MBVENDOR/$MBMODEL/$MBMODEL" + * #make clean + * eval make &> "$LBROOT/x_m.txt" + * if [ $? -eq 0 ]; then + * echo "ok." + * else + * echo "FAILED! Log excerpt:" + * tail -n 15 "$LBROOT/x_m.txt" + * exit + * fi + * cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > "$LBROOT/rom/"$MBMODEL"_coreboot.rom" + * cp -f "$LBROOT/rom/"$MBMODEL"_coreboot.rom" /home/yhlu/ + * + * date + * + */ -put following in nsxv and put nsxv in your LBROOT - -#!/bin/bash -MBVENDOR=tyan -MBMODEL=$1 -LBROOT=/home/yhlu/xx/xx - -echo $1 -date - -cd "$LBROOT/freebios2/targets" -rm -rf "$MBVENDOR/$MBMODEL/$MBMODEL" -./buildtarget "$MBVENDOR/$MBMODEL" &> "$LBROOT/x_b.txt" -cd "$MBVENDOR/$MBMODEL/$MBMODEL" -#make clean -eval make &> "$LBROOT/x_m.txt" - if [ $? -eq 0 ]; then - echo "ok." - else - echo "FAILED! Log excerpt:" - tail -n 15 "$LBROOT/x_m.txt" - exit - fi -cat ../atix.rom ./normal/coreboot.rom ./fallback/coreboot.rom > "$LBROOT/rom/"$MBMODEL"_coreboot.rom" -cp -f "$LBROOT/rom/"$MBMODEL"_coreboot.rom" /home/yhlu/ - -date - - -*/ - - - - static void onboard_enable(device_t dev) { struct drivers_pci_onboard_config *conf;

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r3443 - trunk/coreboot-v2/src/lib
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:32:12 +0200 (Fri, 01 Aug 2008) New Revision: 3443 Modified: trunk/coreboot-v2/src/lib/Config.lb Log: clean up Config.lb in lib/ (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/lib/Config.lb =================================================================== --- trunk/coreboot-v2/src/lib/Config.lb 2008-08-01 11:31:08 UTC (rev 3442) +++ trunk/coreboot-v2/src/lib/Config.lb 2008-08-01 11:32:12 UTC (rev 3443) @@ -1,6 +1,5 @@ uses HAVE_FALLBACK_BOOT uses CONFIG_USE_INIT -uses CONFIG_USE_PRINTK_IN_CAR uses CONFIG_USBDEBUG_DIRECT object clog2.o @@ -23,9 +22,7 @@ makedefine .PHONY : version.o if CONFIG_USE_INIT -# if CONFIG_USE_PRINTK_IN_CAR initobject uart8250.c -# end initobject memset.o initobject memcpy.o initobject memcmp.o

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r3442 - in trunk/coreboot-v2/src/arch/i386: include/arch include/arch/smp smp
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:31:08 +0200 (Fri, 01 Aug 2008) New Revision: 3442 Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h trunk/coreboot-v2/src/arch/i386/include/arch/smp/mpspec.h trunk/coreboot-v2/src/arch/i386/smp/mpspec.c Log: fix warnings, make mptable struct members explicitly packed, as they're supposed to be. rename LXBIOS to CORE in ACPI table identifiers. (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h =================================================================== --- trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2008-08-01 11:25:41 UTC (rev 3441) +++ trunk/coreboot-v2/src/arch/i386/include/arch/acpi.h 2008-08-01 11:31:08 UTC (rev 3442) @@ -37,8 +37,8 @@ #define SRAT_TABLE "SRAT " #define SLIT_TABLE "SLIT " -#define OEM_ID "LXBIOS" -#define ASLC "NONE" +#define OEM_ID "CORE " +#define ASLC "CORE" /* ACPI 2.0 table RSDP */ @@ -219,7 +219,7 @@ struct acpi_table_header header; u32 firmware_ctrl; u32 dsdt; - u8 res1; + u8 model; u8 preferred_pm_profile; u16 sci_int; u32 smi_cmd; Modified: trunk/coreboot-v2/src/arch/i386/include/arch/smp/mpspec.h =================================================================== --- trunk/coreboot-v2/src/arch/i386/include/arch/smp/mpspec.h 2008-08-01 11:25:41 UTC (rev 3441) +++ trunk/coreboot-v2/src/arch/i386/include/arch/smp/mpspec.h 2008-08-01 11:31:08 UTC (rev 3442) @@ -35,7 +35,7 @@ unsigned char mpf_feature3; /* Unused (0) */ unsigned char mpf_feature4; /* Unused (0) */ unsigned char mpf_feature5; /* Unused (0) */ -}; +} __attribute__((packed)); struct mp_config_table { @@ -53,7 +53,7 @@ unsigned short mpe_length; /* Extended Table size */ unsigned char mpe_checksum; /* Extended Table checksum */ unsigned char reserved; -}; +} __attribute__((packed)); /* Followed by entries */ @@ -77,14 +77,14 @@ #define MPC_CPU_FAMILY_MASK 0xF00 unsigned long mpc_featureflag; /* CPUID feature value */ unsigned long mpc_reserved[2]; -}; +} __attribute__((packed)); struct mpc_config_bus { unsigned char mpc_type; unsigned char mpc_busid; - unsigned char mpc_bustype[6] __attribute((packed)); -}; + unsigned char mpc_bustype[6]; +} __attribute__((packed)); #define BUSTYPE_EISA "EISA" #define BUSTYPE_ISA "ISA" @@ -102,7 +102,7 @@ unsigned char mpc_flags; #define MPC_APIC_USABLE 0x01 unsigned long mpc_apicaddr; -}; +} __attribute__((packed)); struct mpc_config_intsrc { @@ -113,7 +113,7 @@ unsigned char mpc_srcbusirq; unsigned char mpc_dstapic; unsigned char mpc_dstirq; -}; +} __attribute__((packed)); enum mp_irq_source_types { mp_INT = 0, @@ -142,7 +142,7 @@ unsigned char mpc_destapic; #define MP_APIC_ALL 0xFF unsigned char mpc_destapiclint; -}; +} __attribute__((packed)); /* * Default configurations @@ -174,7 +174,7 @@ struct mp_exten_config { unsigned char mpe_type; unsigned char mpe_length; -}; +} __attribute__((packed)); typedef struct mp_exten_config *mpe_t; @@ -190,7 +190,7 @@ unsigned int mpe_address_base_high; unsigned int mpe_address_length_low; unsigned int mpe_address_length_high; -}; +} __attribute__((packed)); struct mp_exten_bus_hierarchy { unsigned char mpe_type; @@ -200,7 +200,7 @@ #define BUS_SUBTRACTIVE_DECODE 1 unsigned char mpe_parent_busid; unsigned char reserved[3]; -}; +} __attribute__((packed)); struct mp_exten_compatibility_address_space { unsigned char mpe_type; @@ -226,7 +226,7 @@ * XFB0 - XFBB * XFC0 - XCDF */ -}; +} __attribute__((packed)); /* Default local apic addr */ #define LAPIC_ADDR 0xFEE00000 @@ -240,7 +240,7 @@ unsigned int featureflag); void smp_write_processors(struct mp_config_table *mc); void smp_write_bus(struct mp_config_table *mc, - unsigned char id, unsigned char *bustype); + unsigned char id, char *bustype); void smp_write_ioapic(struct mp_config_table *mc, unsigned char id, unsigned char ver, unsigned long apicaddr); Modified: trunk/coreboot-v2/src/arch/i386/smp/mpspec.c =================================================================== --- trunk/coreboot-v2/src/arch/i386/smp/mpspec.c 2008-08-01 11:25:41 UTC (rev 3441) +++ trunk/coreboot-v2/src/arch/i386/smp/mpspec.c 2008-08-01 11:31:08 UTC (rev 3442) @@ -155,7 +155,7 @@ } void smp_write_bus(struct mp_config_table *mc, - unsigned char id, unsigned char *bustype) + unsigned char id, char *bustype) { struct mpc_config_bus *mpc; mpc = smp_next_mpc_entry(mc);

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r3441 - in trunk/coreboot-v2/src/devices: . emulator emulator/pcbios emulator/x86emu
by svn＠coreboot.org 01 Aug '08

01 Aug '08

Author: stepan Date: 2008-08-01 13:25:41 +0200 (Fri, 01 Aug 2008) New Revision: 3441 Modified: trunk/coreboot-v2/src/devices/emulator/biosemu.c trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.h trunk/coreboot-v2/src/devices/emulator/x86emu/decode.h trunk/coreboot-v2/src/devices/pci_device.c trunk/coreboot-v2/src/devices/pci_rom.c trunk/coreboot-v2/src/devices/pciexp_device.c Log: fix typos and warnings in the device tree code (trivial) Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/coreboot-v2/src/devices/emulator/biosemu.c =================================================================== --- trunk/coreboot-v2/src/devices/emulator/biosemu.c 2008-08-01 11:21:47 UTC (rev 3440) +++ trunk/coreboot-v2/src/devices/emulator/biosemu.c 2008-08-01 11:25:41 UTC (rev 3441) @@ -7,6 +7,8 @@ #include <x86emu/x86emu.h> +#include "pcbios/pcibios.h" + #define MEM_WB(where, what) wrb(where, what) #define MEM_WW(where, what) wrw(where, what) #define MEM_WL(where, what) wrl(where, what) @@ -22,6 +24,10 @@ u32 x_inl(u16 port); void x_outl(u16 port, u32 val); + +// sys.c +void X86EMU_setMemBase(void *base, size_t size); + /* general software interrupt handler */ u32 getIntVect(int num) { Modified: trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c =================================================================== --- trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c 2008-08-01 11:21:47 UTC (rev 3440) +++ trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.c 2008-08-01 11:25:41 UTC (rev 3441) @@ -7,9 +7,9 @@ #include "pcibios.h" -int pcibios_handler() +int pcibios_handler(void) { - int i, ret = 0; + int ret = 0; struct device *dev = 0; switch (X86_AX) { Modified: trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.h =================================================================== --- trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.h 2008-08-01 11:21:47 UTC (rev 3440) +++ trunk/coreboot-v2/src/devices/emulator/pcbios/pcibios.h 2008-08-01 11:25:41 UTC (rev 3441) @@ -25,4 +25,7 @@ SET_FAILED = 0x88, BUFFER_TOO_SMALL = 0x89 }; -#endif /* PCI_BIOS_H */ \ No newline at end of file + +int pcibios_handler(void); + +#endif /* PCI_BIOS_H */ Modified: trunk/coreboot-v2/src/devices/emulator/x86emu/decode.h =================================================================== --- trunk/coreboot-v2/src/devices/emulator/x86emu/decode.h 2008-08-01 11:21:47 UTC (rev 3440) +++ trunk/coreboot-v2/src/devices/emulator/x86emu/decode.h 2008-08-01 11:25:41 UTC (rev 3441) @@ -79,6 +79,7 @@ unsigned decode_rm00_address(int rm); unsigned decode_rm01_address(int rm); unsigned decode_rm10_address(int rm); +unsigned decode_rmXX_address(int mod, int rm); #ifdef __cplusplus } /* End of "C" linkage for C++ */ Modified: trunk/coreboot-v2/src/devices/pci_device.c =================================================================== --- trunk/coreboot-v2/src/devices/pci_device.c 2008-08-01 11:21:47 UTC (rev 3440) +++ trunk/coreboot-v2/src/devices/pci_device.c 2008-08-01 11:25:41 UTC (rev 3441) @@ -647,6 +647,7 @@ void pci_dev_init(struct device *dev) { #if CONFIG_PCI_ROM_RUN == 1 || CONFIG_VGA_ROM_RUN == 1 + void run_bios(struct device * dev, unsigned long addr); struct rom_header *rom, *ram; #if CONFIG_PCI_ROM_RUN != 1 @@ -666,7 +667,7 @@ if (ram == NULL) return; - run_bios(dev, ram); + run_bios(dev, (unsigned long)ram); #if CONFIG_CONSOLE_VGA == 1 /* vga_inited is a trigger of the VGA console code. */ @@ -1070,7 +1071,7 @@ } post_code(0x25); - /* Die if any leftover Static devices are are found. + /* Die if any left over static devices are are found. * There's probably a problem in the Config.lb. */ if(old_devices) { @@ -1078,7 +1079,7 @@ for(left = old_devices; left; left = left->sibling) { printk_err("%s\n", dev_path(left)); } - die("PCI: Left over static devices. Check your Config.lb\n"); + printk_warning("PCI: Left over static devices. Check your mainboard Config.lb\n"); } /* For all children that implement scan_bus (i.e. bridges) Modified: trunk/coreboot-v2/src/devices/pci_rom.c =================================================================== --- trunk/coreboot-v2/src/devices/pci_rom.c 2008-08-01 11:21:47 UTC (rev 3440) +++ trunk/coreboot-v2/src/devices/pci_rom.c 2008-08-01 11:25:41 UTC (rev 3441) @@ -26,6 +26,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> +#include <string.h> struct rom_header * pci_rom_probe(struct device *dev) { @@ -62,7 +63,7 @@ return NULL; } - rom_data = (unsigned char *) rom_header + le32_to_cpu(rom_header->data); + rom_data = (struct pci_data *) ((void *)rom_header + le32_to_cpu(rom_header->data)); printk_spew("PCI ROM Image, Vendor %04x, Device %04x,\n", rom_data->vendor, rom_data->device); if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) { @@ -95,8 +96,8 @@ rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS); do { - rom_header = (unsigned char *) rom_header + image_size; // get next image - rom_data = (unsigned char *) rom_header + le32_to_cpu(rom_header->data); + rom_header = (struct rom_header *)((void *) rom_header + image_size); // get next image + rom_data = (struct pci_data *)((void *) rom_header + le32_to_cpu(rom_header->data)); image_size = le32_to_cpu(rom_data->ilen) * 512; } while ((rom_data->type!=0) && (rom_data->indicator!=0)); // make sure we got x86 version @@ -111,7 +112,7 @@ #endif printk_debug("copying VGA ROM Image from 0x%x to 0x%x, 0x%x bytes\n", rom_header, PCI_VGA_RAM_IMAGE_START, rom_size); - memcpy(PCI_VGA_RAM_IMAGE_START, rom_header, rom_size); + memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header, rom_size); return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START); } else { printk_debug("copying non-VGA ROM Image from 0x%x to 0x%x, 0x%x bytes\n", Modified: trunk/coreboot-v2/src/devices/pciexp_device.c =================================================================== --- trunk/coreboot-v2/src/devices/pciexp_device.c 2008-08-01 11:21:47 UTC (rev 3440) +++ trunk/coreboot-v2/src/devices/pciexp_device.c 2008-08-01 11:25:41 UTC (rev 3441) @@ -34,7 +34,7 @@ /* error... */ return; } - printk_debug("PCIEXP: tunning %s\n", dev_path(dev)); + printk_debug("PCIe: tunning %s\n", dev_path(dev)); #warning "IMPLEMENT PCI EXPRESS TUNING" }

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2015

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2012

2011

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2002

coreboot August 2008