coreboot July 2008

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r692 - coreboot-v3/southbridge/amd/cs5536
by svn＠coreboot.org 03 Jul '08

03 Jul '08

Author: hailfinger Date: 2008-07-03 21:42:05 +0200 (Thu, 03 Jul 2008) New Revision: 692 Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c Log: - Clean up Geode companion chip CS5536 code. - Eliminate a few redundant dev_find_pci_device() calls. - Fix a compile warning intruduced in r689. This should be an equivalence transformation. Build tested on norwich, db800, alix.1c, alix.2c3, dbe62, dbe61. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Peter Stuge <peter(a)stuge.se> Acked-by: Ronald G. Minnich <rminnich(a)gmail.com> Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c =================================================================== --- coreboot-v3/southbridge/amd/cs5536/cs5536.c 2008-06-29 06:43:01 UTC (rev 691) +++ coreboot-v3/southbridge/amd/cs5536/cs5536.c 2008-07-03 19:42:05 UTC (rev 692) @@ -240,16 +240,13 @@ * * @param sb Southbridge config structure. */ -static void uarts_init(struct southbridge_amd_cs5536_dts_config *sb) +static void uarts_init(struct southbridge_amd_cs5536_dts_config *sb, + struct device *dev) { struct msr msr; u16 addr = 0; u32 gpio_addr; - struct device *dev; - dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, - PCI_DEVICE_ID_AMD_CS5536_ISA, 0); - gpio_addr = pci_read_config32(dev, PCI_BASE_ADDRESS_1); gpio_addr &= ~1; /* Clear I/O bit */ printk(BIOS_DEBUG, "GPIO_ADDR: %08X\n", gpio_addr); @@ -419,11 +416,11 @@ { u32 *bar; struct msr msr; - struct device *dev; + struct device *ehci_dev, *otg_dev, *udc_dev; - dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, + ehci_dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_EHCI, 0); - if (dev) { + if (ehci_dev) { /* Serial short detect enable */ msr = rdmsr(USB2_SB_GLD_MSR_CONF); msr.hi |= USB2_UPPER_SSDEN_SET; @@ -432,7 +429,7 @@ /* Write to clear diag register. */ wrmsr(USB2_SB_GLD_MSR_DIAG, rdmsr(USB2_SB_GLD_MSR_DIAG)); - bar = (u32 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0); + bar = (u32 *) pci_read_config32(ehci_dev, PCI_BASE_ADDRESS_0); /* Make HCCPARAMS writable. */ *(bar + IPREG04) |= USB_HCCPW_SET; @@ -441,10 +438,10 @@ *(bar + HCCPARAMS) = 0x00005012; } - dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, + otg_dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OTG, 0); - if (dev) { - bar = (u32 *) pci_read_config32(dev, PCI_BASE_ADDRESS_0); + if (otg_dev) { + bar = (u32 *) pci_read_config32(otg_dev, PCI_BASE_ADDRESS_0); printk(BIOS_DEBUG, "UOCMUX is %x\n", *(bar + UOCMUX)); @@ -470,6 +467,8 @@ } + udc_dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, + PCI_DEVICE_ID_AMD_CS5536_UDC, 0); /* PBz#6466: If the UOC(OTG) device, port 4, is configured as a * device, then perform the following sequence: * - Set SD bit in DEVCTRL udc register @@ -477,24 +476,19 @@ * - Set APU bit in uoc register */ if (sb->enable_USBP4_device) { - dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, - PCI_DEVICE_ID_AMD_CS5536_UDC, 0); - if (dev) { - bar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); + if (udc_dev) { + bar = (u32 *)pci_read_config32(udc_dev, PCI_BASE_ADDRESS_0); *(bar + UDCDEVCTL) |= UDC_SD_SET; } - dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, - PCI_DEVICE_ID_AMD_CS5536_OTG, 0); - if (dev) { - bar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_0); + if (otg_dev) { + bar = (u32 *)pci_read_config32(otg_dev, PCI_BASE_ADDRESS_0); *(bar + UOCCTL) |= PADEN_SET; *(bar + UOCCAP) |= APU_SET; + printk(BIOS_DEBUG, "UOCCTL is %x\n", *(bar + UOCCTL)); } } - printk(BIOS_DEBUG, "UOCCTL is %x\n", *(bar + UOCCTL)); - /* Disable virtual PCI UDC and OTG headers. The kernel never * sees a header for this device. It used to provide an OS * visible device, but that was defeatured. There are still @@ -506,15 +500,11 @@ * device ID PCI_DEVICE_ID_AMD_CS5536_OTG, but it is hidden * when 0xDEADBEEF is written to config space register 0x7C. */ - dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, - PCI_DEVICE_ID_AMD_CS5536_UDC, 0); - if (dev) - pci_write_config32(dev, 0x7C, 0xDEADBEEF); + if (udc_dev) + pci_write_config32(udc_dev, 0x7C, 0xDEADBEEF); - dev = dev_find_pci_device(PCI_VENDOR_ID_AMD, - PCI_DEVICE_ID_AMD_CS5536_OTG, 0); - if (dev) - pci_write_config32(dev, 0x7C, 0xDEADBEEF); + if (otg_dev) + pci_write_config32(otg_dev, 0x7C, 0xDEADBEEF); } /** @@ -659,7 +649,7 @@ setup_i8259(); lpc_init(sb); - uarts_init(sb); + uarts_init(sb, dev); if (sb->enable_gpio_int_route) { printk(BIOS_SPEW, "cs5536: call vr_write\n");

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r3412 - trunk/util/flashrom
by svn＠coreboot.org 03 Jul '08

03 Jul '08

Author: uwe Date: 2008-07-03 21:26:44 +0200 (Thu, 03 Jul 2008) New Revision: 3412 Modified: trunk/util/flashrom/flashchips.c trunk/util/flashrom/layout.c Log: Minor cosmetics, e.g. make stuff fit in 80 chars/line etc. (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2008-07-03 19:08:52 UTC (rev 3411) +++ trunk/util/flashrom/flashchips.c 2008-07-03 19:26:44 UTC (rev 3412) @@ -41,9 +41,9 @@ {"Atmel", "AT49F002(N)", ATMEL_ID, AT_49F002N, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, {"Atmel", "AT49F002(N)T", ATMEL_ID, AT_49F002NT, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, {"Atmel", "AT25DF321", ATMEL_ID, AT_25DF321, 4096, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"AMIC Technology","A25L40P", AMIC_ID, AMIC_A25L40P, 512, 256, TEST_OK_PREW, probe_spi_rdid4, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"AMIC Technology","A49LF040A", AMIC_ID_NOPREFIX, AMIC_A49LF040A, 512, 64 * 1024, TEST_OK_PREW, probe_49fl00x, erase_49fl00x, write_49fl00x}, - {"AMIC Technology","A29040B", AMIC_ID_NOPREFIX, AMIC_A29040B, 512, 64 * 1024, TEST_OK_PR, probe_29f040b, erase_29f040b, write_29f040b}, + {"AMIC", "A25L40P", AMIC_ID, AMIC_A25L40P, 512, 256, TEST_OK_PREW, probe_spi_rdid4, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, + {"AMIC", "A49LF040A", AMIC_ID_NOPREFIX, AMIC_A49LF040A, 512, 64 * 1024, TEST_OK_PREW, probe_49fl00x, erase_49fl00x, write_49fl00x}, + {"AMIC", "A29040B", AMIC_ID_NOPREFIX, AMIC_A29040B, 512, 64 * 1024, TEST_OK_PR, probe_29f040b, erase_29f040b, write_29f040b}, {"EMST", "F49B002UA", EMST_ID, EMST_F49B002UA, 256, 4096, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_49f002}, {"EON", "EN29F002(A)(N)B", EON_ID, EN_29F002B, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, {"EON", "EN29F002(A)(N)T", EON_ID, EN_29F002T, 256, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, Modified: trunk/util/flashrom/layout.c =================================================================== --- trunk/util/flashrom/layout.c 2008-07-03 19:08:52 UTC (rev 3411) +++ trunk/util/flashrom/layout.c 2008-07-03 19:26:44 UTC (rev 3412) @@ -50,9 +50,8 @@ walk--; if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { - /* We might have an Nvidia chipset bios - * which stores the id information at a - * different location. + /* We might have an NVIDIA chipset BIOS which stores the ID + * information at a different location. */ walk = (unsigned int *)(bios + size - 0x80); walk--; @@ -88,19 +87,17 @@ /* * If lb_vendor is not set, the coreboot table was - * not found. Nor was -mVENDOR:PART specified + * not found. Nor was -m VENDOR:PART specified. */ - if (!lb_vendor || !lb_part) { printf("Note: If the following flash access fails, " - "you might need to specify -m <vendor>:<mainboard>.\n"); + "try -m <vendor>:<mainboard>.\n"); return 0; } /* These comparisons are case insensitive to make things * a little less user^Werror prone. */ - if (!strcasecmp(mainboard_vendor, lb_vendor) && !strcasecmp(mainboard_part, lb_part)) { printf_debug("This firmware image matches "

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r3411 - trunk/util/flashrom
by svn＠coreboot.org 03 Jul '08

03 Jul '08

Author: hailfinger Date: 2008-07-03 21:08:52 +0200 (Thu, 03 Jul 2008) New Revision: 3411 Modified: trunk/util/flashrom/flashchips.c Log: Mark SST49LF040B as tested. Thanks to Paul Seidler and Ward Vandewege for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2008-07-03 18:58:58 UTC (rev 3410) +++ trunk/util/flashrom/flashchips.c 2008-07-03 19:08:52 UTC (rev 3411) @@ -89,7 +89,7 @@ {"SST", "SST49LF016C", SST_ID, SST_49LF016C, 2048, 4 * 1024, TEST_UNTESTED, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"SST", "SST49LF020A", SST_ID, SST_49LF020A, 256, 16 * 1024, TEST_UNTESTED, probe_jedec, erase_49lf040, write_49lf040}, {"SST", "SST49LF040", SST_ID, SST_49LF040, 512, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040}, - {"SST", "SST49LF040B", SST_ID, SST_49LF040B, 512, 64 * 1024, TEST_UNTESTED, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, + {"SST", "SST49LF040B", SST_ID, SST_49LF040B, 512, 64 * 1024, TEST_OK_PREW, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, {"SST", "SST49LF080A", SST_ID, SST_49LF080A, 1024, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040}, {"SST", "SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024, TEST_OK_PREW, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"ST", "M25P05-A", ST_ID, ST_M25P05A, 64, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read},

1 0

r3410 - trunk/util/flashrom
by svn＠coreboot.org 03 Jul '08

03 Jul '08

Author: uwe Date: 2008-07-03 20:58:58 +0200 (Thu, 03 Jul 2008) New Revision: 3410 Modified: trunk/util/flashrom/flashchips.c Log: Mark the SST SST49LF040 as OK (tested by me), all operations (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2008-07-03 16:54:05 UTC (rev 3409) +++ trunk/util/flashrom/flashchips.c 2008-07-03 18:58:58 UTC (rev 3410) @@ -88,7 +88,7 @@ {"SST", "SST49LF008C", SST_ID, SST_49LF008C, 1024, 4 * 1024, TEST_UNTESTED, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"SST", "SST49LF016C", SST_ID, SST_49LF016C, 2048, 4 * 1024, TEST_UNTESTED, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc}, {"SST", "SST49LF020A", SST_ID, SST_49LF020A, 256, 16 * 1024, TEST_UNTESTED, probe_jedec, erase_49lf040, write_49lf040}, - {"SST", "SST49LF040", SST_ID, SST_49LF040, 512, 4096, TEST_UNTESTED, probe_jedec, erase_49lf040, write_49lf040}, + {"SST", "SST49LF040", SST_ID, SST_49LF040, 512, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040}, {"SST", "SST49LF040B", SST_ID, SST_49LF040B, 512, 64 * 1024, TEST_UNTESTED, probe_sst_fwhub, erase_sst_fwhub, write_sst_fwhub}, {"SST", "SST49LF080A", SST_ID, SST_49LF080A, 1024, 4096, TEST_OK_PREW, probe_jedec, erase_49lf040, write_49lf040}, {"SST", "SST49LF160C", SST_ID, SST_49LF160C, 2048, 4 * 1024, TEST_OK_PREW, probe_49lfxxxc, erase_49lfxxxc, write_49lfxxxc},

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NEOWARE EON 4000S
by Hannes Hegewald 03 Jul '08

03 Jul '08

hey, here's the 'lspci -tvnn', 'superiotool -dV', 'flashrom -V', getpir and /proc/cpu output for the Neoware EON 4000S board/Thin Client. PS: this board is very similar to this one: http://www.coreboot.org/ASI_MB-5BLMP_Build_Tutorial instead of the DOC and Bios Chip for example. Good luck for your further developement. Hannes aka hns aka rwd root@crux:~ # lspci -tvnn -[0000:00]-+-00.0 Cyrix Corporation PCI Master [1078:0001] +-0f.0 Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ [10ec:8139] +-12.0 Cyrix Corporation 5530 Legacy [Kahlua] [1078:0100] +-12.1 Cyrix Corporation 5530 SMI [Kahlua] [1078:0101] +-12.2 Cyrix Corporation 5530 IDE [Kahlua] [1078:0102] +-12.3 Cyrix Corporation 5530 Audio [Kahlua] [1078:0103] +-12.4 Cyrix Corporation 5530 Video [Kahlua] [1078:0104] \-13.0 Compaq Computer Corporation ZFMicro Chipset USB [0e11:a0f8] root@crux:~ # superiotool -dV superiotool r Probing for ALi Super I/O at 0x3f0... Failed. Returned data: id=0xffff, rev=0xff Probing for ALi Super I/O at 0x370... Failed. Returned data: id=0xffff, rev=0xff Probing for Fintek Super I/O at 0x2e... Failed. Returned data: vid=0x0a03, id=0x11e2 Probing for Fintek Super I/O at 0x4e... Failed. Returned data: vid=0xffff, id=0xffff Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x2e... Failed. Returned data: id=0xe211, rev=0x0 Probing for ITE Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id=0xe211, rev=0x0 Probing for ITE Super I/O (init=0x87,0x01,0x55,0x55/0xaa) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for ITE Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id=0xffff, rev=0xf Probing for NSC Super I/O at 0x2e... Found NSC PC87351 (sid=0xe2, srid=0x02) at 0x2e Register dump: idx 20 21 22 23 24 27 2e val e2 11 a0 03 0a 02 00 def e2 11 a1 00 MM NA RR LDN 0x00 (Floppy) idx 30 60 61 70 71 74 75 f0 f1 val 01 03 f0 06 03 02 04 24 00 def 00 03 f2 06 03 02 04 24 00 LDN 0x01 (Parallel port) idx 30 60 61 70 71 74 75 f0 val 01 03 78 07 02 00 04 00 def 00 02 78 07 02 04 04 f2 LDN 0x02 (COM2) idx 30 60 61 70 71 74 75 f0 val 01 02 f8 03 03 04 04 02 def 00 02 f8 03 03 04 04 02 LDN 0x03 (COM1) idx 30 60 61 70 71 74 75 f0 val 01 03 f8 04 03 04 04 02 def 00 03 f8 04 03 04 04 02 LDN 0x04 (System wake-up control (SWC)) idx 30 60 61 70 71 74 75 val 01 05 00 00 03 04 04 def 00 00 00 00 03 04 04 LDN 0x05 (Mouse) idx 30 70 71 74 75 val 00 00 02 04 04 def 00 0c 02 04 04 LDN 0x06 (Keyboard) idx 30 60 61 62 63 70 71 74 75 f0 val 01 00 60 00 64 01 02 04 04 40 def 01 00 60 00 64 01 02 04 04 40 LDN 0x07 (GPIO) idx 30 60 61 70 71 74 75 f0 f1 val 01 08 00 00 03 04 04 22 45 def 00 00 00 00 03 04 04 00 00 LDN 0x08 (Fan speed control) idx 30 60 61 70 71 74 75 f0 val 01 09 00 00 00 04 04 00 def 00 00 00 00 00 04 04 00 Probing for NSC Super I/O at 0x4e... Failed. Returned data: port=0xff, port+1=0xff Probing for NSC Super I/O at 0x15c... Failed. Returned data: port=0xff, port+1=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x2e... Failed. Returned data: id=0xe2, rev=0x11 Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x2e... Failed. Returned data: id=0x00, rev=0x00 Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x4e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x162e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x164e... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x3f0... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x20/0x21) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for SMSC Super I/O (idregs=0x0d/0x0e) at 0x370... Failed. Returned data: id=0xff, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x2e... Failed. Returned data: id/oldid=0xe2/0x00, rev=0x11 Probing for Winbond Super I/O (init=0x89) at 0x2e... Failed. Returned data: id/oldid=0xe2/0x00, rev=0x11 Probing for Winbond Super I/O (init=0x86,0x86) at 0x2e... Failed. Returned data: id/oldid=0xe2/0x00, rev=0x11 Probing for Winbond Super I/O (init=0x87,0x87) at 0x2e... Failed. Returned data: id/oldid=0xe2/0x00, rev=0x11 Probing for Winbond Super I/O (init=0x88) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x4e... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x3f0... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x370... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x88) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x89) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x86,0x86) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff Probing for Winbond Super I/O (init=0x87,0x87) at 0x250... Failed. Returned data: id/oldid=0xff/0x0f, rev=0xff root@crux:~ # flashrom -V Calibrating delay loop... 40M loops per second. OK. No coreboot table found. Found chipset "AMD CS5530(A)", enabling flash write... OK. Probing for AMD Am29F016D, 2048 KB: probe_29f040b: id1 0x25, id2 0xd7 Probing for AMD Am29F040B, 512 KB: probe_29f040b: id1 0x25, id2 0xd7 Probing for AMD Am29LV040B, 512 KB: probe_29f040b: id1 0x25, id2 0xd7 Probing for ASD AE49F2008, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Atmel AT29C020, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Atmel AT29C040A, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Atmel AT49F002(N), 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Atmel AT49F002(N)T, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Atmel AT25DF321, 4096 KB: spi_command called, but no SPI chipset detected Probing for AMIC Technology A25L40P, 512 KB: spi_command called, but no SPI chipset detected Probing for AMIC Technology A49LF040A, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for AMIC Technology A29040B, 512 KB: probe_29f040b: id1 0x25, id2 0xd7 Probing for EMST F49B002UA, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for EON EN29F002(A)(N)B, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for EON EN29F002(A)(N)T, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Fujitsu MBM29F400TC, 512 KB: probe_m29f400bt: id1 0x25, id2 0x2d Probing for Intel 82802AB, 512 KB: probe_82802ab: id1 0x25, id2 0xd7 Probing for Intel 82802AC, 1024 KB: probe_82802ab: id1 0x25, id2 0xd7 Probing for Macronix MX25L4005, 512 KB: spi_command called, but no SPI chipset detected Probing for Macronix MX25L8005, 1024 KB: spi_command called, but no SPI chipset detected Probing for Macronix MX25L1605, 2048 KB: spi_command called, but no SPI chipset detected Probing for Macronix MX25L3205, 4096 KB: spi_command called, but no SPI chipset detected Probing for Macronix MX29F002, 256 KB: probe_29f002: id1 0xbf, id2 0xb6 Probing for PMC Pm25LV010, 128 KB: spi_command called, but no SPI chipset detected Probing for PMC Pm25LV016B, 2048 KB: spi_command called, but no SPI chipset detected Probing for PMC Pm25LV020, 256 KB: spi_command called, but no SPI chipset detected Probing for PMC Pm25LV040, 512 KB: spi_command called, but no SPI chipset detected Probing for PMC Pm25LV080B, 1024 KB: spi_command called, but no SPI chipset detected Probing for PMC Pm25LV512, 64 KB: spi_command called, but no SPI chipset detected Probing for PMC Pm49FL002, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for PMC Pm49FL004, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Sharp LHF00L04, 1024 KB: probe_lhf00l04: id1 0x25, id2 0xd7 Probing for Spansion S25FL016A, 2048 KB: spi_command called, but no SPI chipset detected Probing for SST SST25VF016B, 2048 KB: spi_command called, but no SPI chipset detected Probing for SST SST25VF040B, 512 KB: spi_command called, but no SPI chipset detected Probing for SST SST28SF040A, 512 KB: probe_28sf040: id1 0x25, id2 0xd7 Probing for SST SST29EE010, 128 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST29LE010, 128 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST29EE020A, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST29LE020, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST39SF010A, 128 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST39SF020A, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Found chip "SST SST39SF020A" (256 KB) at physical address 0xfffc0000. Probing for SST SST39SF040, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST39VF512, 64 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST39VF010, 128 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST39VF020, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST39VF040, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF002A/B, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF003A/B, 384 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF004A/B, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF004C, 512 KB: probe_49lfxxxc: id1 0x25, id2 0xd7 Probing for SST SST49LF008A, 1024 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF008C, 1024 KB: probe_49lfxxxc: id1 0x25, id2 0xd7 Probing for SST SST49LF016C, 2048 KB: probe_49lfxxxc: id1 0x25, id2 0xd7 Probing for SST SST49LF020A, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF040, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF040B, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF080A, 1024 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SST SST49LF160C, 2048 KB: probe_49lfxxxc: id1 0x25, id2 0xd7 Probing for ST M25P05-A, 64 KB: spi_command called, but no SPI chipset detected Probing for ST M25P10-A, 128 KB: spi_command called, but no SPI chipset detected Probing for ST M25P20, 256 KB: spi_command called, but no SPI chipset detected Probing for ST M25P40, 512 KB: spi_command called, but no SPI chipset detected Probing for ST M25P40-old, 512 KB: spi_command called, but no SPI chipset detected Probing for ST M25P80, 1024 KB: spi_command called, but no SPI chipset detected Probing for ST M25P16, 2048 KB: spi_command called, but no SPI chipset detected Probing for ST M25P32, 4096 KB: spi_command called, but no SPI chipset detected Probing for ST M25P64, 8192 KB: spi_command called, but no SPI chipset detected Probing for ST M25P128, 16384 KB: spi_command called, but no SPI chipset detected Probing for ST M29F002B, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for ST M29F002T/NT, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for ST M29F040B, 512 KB: probe_29f040b: id1 0x25, id2 0xd7 Probing for ST M29F400BT, 512 KB: probe_m29f400bt: id1 0x25, id2 0x2d Probing for ST M29W010B, 128 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for ST M29W040B, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for ST M50FLW040A, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0xb6 Probing for ST M50FLW040B, 512 KB: probe_stm50flw0x0x: id1 0xbf, id2 0xb6 Probing for ST M50FLW080A, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0xb6 Probing for ST M50FLW080B, 1024 KB: probe_stm50flw0x0x: id1 0xbf, id2 0xb6 Probing for ST M50FW016, 2048 KB: probe_82802ab: id1 0x25, id2 0xd7 Probing for ST M50FW040, 512 KB: probe_82802ab: id1 0x25, id2 0xd7 Probing for ST M50FW080, 1024 KB: probe_82802ab: id1 0x25, id2 0xd7 Probing for ST M50LPW116, 2048 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SyncMOS S29C31004T, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SyncMOS S29C51001T, 128 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SyncMOS S29C51002T, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for SyncMOS S29C51004T, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W25x10, 128 KB: spi_command called, but no SPI chipset detected Probing for Winbond W25x20, 256 KB: spi_command called, but no SPI chipset detected Probing for Winbond W25x40, 512 KB: spi_command called, but no SPI chipset detected Probing for Winbond W25x80, 1024 KB: spi_command called, but no SPI chipset detected Probing for Winbond W29C011, 128 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W29C020C, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W29C040P, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W29EE011, 128 KB: === Probing disabled for Winbond W29EE011 because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c W29EE011' if you have a board with this chip. === Probing for Winbond W39V040A, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W39V040B, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W39V040FA, 512 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W39V080A, 1024 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W49F002U, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W49V002A, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W49V002FA, 256 KB: probe_jedec: id1 0xbf, id2 0xb6 Probing for Winbond W39V080FA, 1024 KB: probe_winbond_fwhub: vid 0xbf, did 0xb6 Probing for Winbond W39V080FA (dual mode), 512 KB: probe_winbond_fwhub: vid 0xbf, did 0xb6 Probing for EON unknown EON SPI chip, 0 KB: spi_command called, but no SPI chipset detected Probing for Macronix unknown Macronix SPI chip, 0 KB: spi_command called, but no SPI chipset detected Probing for PMC unknown PMC SPI chip, 0 KB: spi_command called, but no SPI chipset detected Probing for SST unknown SST SPI chip, 0 KB: spi_command called, but no SPI chipset detected Probing for ST unknown ST SPI chip, 0 KB: spi_command called, but no SPI chipset detected No operations were specified. root@crux:~/coreboot-v2-3389/util/getpir # cat irq_tables.c /* This file was generated by getpir.c, do not modify! * (but if you do, please run checkpir on it to verify) * * Contains the IRQ Routing Table dumped directly from your * memory, which BIOS sets up. * * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx */ #ifdef GETPIR #include "pirq_routing.h" #else #include <arch/pirq_routing.h> #endif const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ 32+16*3, /* There can be total 3 devices on the bus */ 0x00, /* Where the interrupt router lies (bus) */ (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ 0x8800, /* IRQs devoted exclusively to PCI usage */ 0x1078, /* Vendor */ 0x2, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ 0x96, /* u8 checksum. This has to be set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ {0x00,(0x07<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0}, {0x00,(0x0f<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x2, 0x0}, {0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, } }; unsigned long write_pirq_routing_table(unsigned long addr) { return copy_pirq_routing_table(addr); } root@crux:~ # cat /proc/cpuinfo processor : 0 vendor_id : Geode by NSC cpu family : 5 model : 9 model name : Geode(TM) Integrated Processor by National Semi stepping : 2 cpu MHz : 300.691 cache size : 16 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu tsc msr cx8 cmov mmx cxmmx up bogomips : 611.94 clflush size : 32

2 1

Re: [coreboot] flashrom with Winbond W25x80 - Testreport
by Peter Stuge 03 Jul '08

03 Jul '08

Hi Björn, On Thu, Jul 03, 2008 at 01:36:11PM +0200, Gerhart, Bjoern wrote: > > I've attached a kludge fix to disable > > the offending code to the ticket: > > > > http://tracker.coreboot.org/trac/coreboot/ticket/102 > > With this workaround the write attempt works successfully (see > below), so in my opinion the status of the W25x80 can be set to > "tested" :-) .. > Verifying flash... VERIFIED. Thanks for the report. This is updated in r3409. //Peter

1 0

r3409 - trunk/util/flashrom
by svn＠coreboot.org 03 Jul '08

03 Jul '08

Author: stuge Date: 2008-07-03 18:54:05 +0200 (Thu, 03 Jul 2008) New Revision: 3409 Modified: trunk/util/flashrom/flashchips.c Log: flashrom: Winbond W25x80 TEST_OK PROBE READ ERASE WRITE Per test report from Bj?\195?\182rn Gerhart. Thanks! Signed-off-by: Peter Stuge <peter(a)stuge.se> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/util/flashrom/flashchips.c =================================================================== --- trunk/util/flashrom/flashchips.c 2008-07-03 14:40:06 UTC (rev 3408) +++ trunk/util/flashrom/flashchips.c 2008-07-03 16:54:05 UTC (rev 3409) @@ -123,7 +123,7 @@ {"Winbond", "W25x10", WINBOND_NEX_ID, W_25X10, 128, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"Winbond", "W25x20", WINBOND_NEX_ID, W_25X20, 256, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"Winbond", "W25x40", WINBOND_NEX_ID, W_25X40, 512, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, - {"Winbond", "W25x80", WINBOND_NEX_ID, W_25X80, 1024, 256, TEST_UNTESTED, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, + {"Winbond", "W25x80", WINBOND_NEX_ID, W_25X80, 1024, 256, TEST_OK_PREW, probe_spi_rdid, spi_chip_erase_c7, spi_chip_write, spi_chip_read}, {"Winbond", "W29C011", WINBOND_ID, W_29C011, 128, 128, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec}, {"Winbond", "W29C020C", WINBOND_ID, W_29C020C, 256, 128, TEST_OK_PREW, probe_jedec, erase_chip_jedec, write_jedec}, {"Winbond", "W29C040P", WINBOND_ID, W_29C040P, 512, 256, TEST_UNTESTED, probe_jedec, erase_chip_jedec, write_jedec},

1 0

help with win-xp and legacybios/coreboot
by Kevin O'Connor 03 Jul '08

03 Jul '08

Hi, I have successfully installed and booted win-xp with coreboot-v2 and legacybios under qemu. Unfortunately, when I try to install or boot win-xp with coreboot-v2 and legacybios on my via epia-m the system hangs. At this point, I don't know if the problem is related to coreboot and its epia-m support, or if it is related to legacybios. I've confirmed that the hang does not occur inside the bios. The last thing the install reports before hanging is "Setup is starting Windows". It would be helpful if others could try installing / booting win-xp on real hardware. If you can do this, please follow the directions at: http://www.coreboot.org/pipermail/coreboot/2008-June/036108.html Thanks, -Kevin

3 7

Re: [coreboot] flashrom with Winbond W25x80 - Testreport
by Carl-Daniel Hailfinger 03 Jul '08

03 Jul '08

Hi Björn, thanks for testing and confirming this. The patch has been committed to the flashrom tree and everything should work out of the box for you. We are very happy to see vendors use flashrom. If there are any remaining issues, please tell us. Best Regards, Carl-Daniel

2 1

Re: [coreboot] flashrom with Winbond W25x80 - Testreport
by Carl-Daniel Hailfinger 03 Jul '08

03 Jul '08

Hi Björn, could you please test the attached patch as well? It's the final fix I hope to commit. Thanks! Regards, Carl-Daniel Index: flashrom-tmp1/layout.c =================================================================== --- flashrom-tmp1/layout.c (Revision 3407) +++ flashrom-tmp1/layout.c (Arbeitskopie) @@ -21,6 +21,7 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> +#include <ctype.h> #include <stdint.h> #include "flash.h" @@ -57,7 +58,18 @@ walk--; } - if ((*walk) == 0 || ((*walk) & 0x3ff) != 0) { + /* + * Check if coreboot last image size is 0 or not a multiple of 1k or + * bigger than the chip or if the pointers to vendor ID or mainboard ID + * are outside the image of if the start of ID strings are nonsensical + * (nonprintable and not \0). + */ + if ((*walk) == 0 || ((*walk) & 0x3ff) != 0 || *walk > size || + *(walk - 1) > size || *(walk - 2) > size || + (!isprint((const char *)(bios + size - *(walk - 1))) && + ((const char *)(bios + size - *(walk - 1)))) || + (!isprint((const char *)(bios + size - *(walk - 2))) && + ((const char *)(bios + size - *(walk - 2))))) { printf("Flash image seems to be a legacy BIOS. Disabling checks.\n"); mainboard_vendor = def_name; mainboard_part = def_name;

2 1

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coreboot July 2008