coreboot November 2006

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Re: [LinuxBIOS] #20: Cleanup of all CHIP_NAME() entries
by LinuxBIOS 05 Nov '06

05 Nov '06

#20: Cleanup of all CHIP_NAME() entries ----------------------------+----------------------------------------------- Reporter: uwe | Owner: uwe Type: defect | Status: new Priority: minor | Milestone: Cosmetic fixes Component: code | Version: v2 Resolution: | Keywords: Include_gantt: 0 | Dependencies: Due_assign: DD/MM/YYYY | Due_close: DD/MM/YYYY ----------------------------+----------------------------------------------- Comment (by stepan): In my opinion we should go further and drop the CHIP_NAME macro completely. So instead of CHIP_NAME("Via VT8263") it should just read "Via VT8263" The CHIP_NAME macro was invented at a time when we were really tight in rom space, but it is obviously the wrong approach. Otherwise: Acked-by: Stefan Reinauer <stepan(a)linuxbios.org> -- Ticket URL: <http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/20#comment:1> LinuxBIOS <http://www.linuxbios.org/>

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[LinuxBIOS] r2489 - trunk/LinuxBIOSv2/util/flashrom
by svn＠openbios.org 05 Nov '06

05 Nov '06

Author: uwe Date: 2006-11-05 19:26:08 +0100 (Sun, 05 Nov 2006) New Revision: 2489 Modified: trunk/LinuxBIOSv2/util/flashrom/flash_enable.c Log: Add support for Intel PIIX4/PIIX4E/PIIX4M-based mainboards to flashrom. Tested on real hardware, reading, detecting and writing various chips works. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/util/flashrom/flash_enable.c =================================================================== --- trunk/LinuxBIOSv2/util/flashrom/flash_enable.c 2006-11-05 12:18:58 UTC (rev 2488) +++ trunk/LinuxBIOSv2/util/flashrom/flash_enable.c 2006-11-05 18:26:08 UTC (rev 2489) @@ -77,6 +77,37 @@ return 0; } +/* Datasheet: http://www.intel.com/design/intarch/datashts/290562.htm */ +static int enable_flash_piix4(struct pci_dev *dev, char *name) +{ + uint16_t old, new; + uint16_t xbcs = 0x4e; /* X-Bus Chip Select register. */ + + old = pci_read_word(dev, xbcs); + + /* Set bit 9: 1-Meg Extended BIOS Enable (PCI master accesses to + FFF00000-FFF7FFFF are forwarded to ISA). + Set bit 7: Extended BIOS Enable (PCI master accesses to + FFF80000-FFFDFFFF are forwarded to ISA). + Set bit 6: Lower BIOS Enable (PCI master, or ISA master accesses to + the lower 64-Kbyte BIOS block (E00000�EFFFF) at the top + of 1 Mbyte, or the aliases at the top of 4 Gbyte + (FFFE0000-FFFEFFF) result in the generation of BIOSCS#. + Set bit 2: BIOSCS# Write Protect Enable (1=enable, 0=disable). */ + new = old | 0x2c4; + + if (new == old) + return 0; + + pci_write_word(dev, xbcs, new); + + if (pci_read_word(dev, xbcs) != new) { + printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", xbcs, new, name); + return -1; + } + return 0; +} + static int enable_flash_ich(struct pci_dev *dev, char *name, int bios_cntl) { /* register 4e.b gets or'ed with one */ @@ -362,6 +393,7 @@ static FLASH_ENABLE enables[] = { {0x1039, 0x0630, "SIS630", enable_flash_sis630}, + {0x8086, 0x7110, "PIIX4/PIIX4E/PIIX4M", enable_flash_piix4}, {0x8086, 0x2410, "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, "ICH2", enable_flash_ich_4e},

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[LinuxBIOS] r2488 - trunk/LinuxBIOSv2/src/boot
by svn＠openbios.org 05 Nov '06

05 Nov '06

Author: stepan Date: 2006-11-05 13:18:58 +0100 (Sun, 05 Nov 2006) New Revision: 2488 Modified: trunk/LinuxBIOSv2/src/boot/elfboot.c Log: Fix a typo in elfboot.c. Closes #27 Signed-off-by: Luis Correia <luis.f.correia(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/LinuxBIOSv2/src/boot/elfboot.c =================================================================== --- trunk/LinuxBIOSv2/src/boot/elfboot.c 2006-11-04 23:19:00 UTC (rev 2487) +++ trunk/LinuxBIOSv2/src/boot/elfboot.c 2006-11-05 12:18:58 UTC (rev 2488) @@ -630,7 +630,7 @@ printk_spew("NO header at %d\n", i); continue; } - printk_debug("Found ELF candiate at offset %d\n", i); + printk_debug("Found ELF candidate at offset %d\n", i); /* Sanity check the elf header */ if ((ehdr->e_type == ET_EXEC) && elf_check_arch(ehdr) &&

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[LinuxBIOS] Hello, I have a problem to put the linuxbios on my mainboard ms6163.
by Li Haiqiang 05 Nov '06

05 Nov '06

My mainboard's northbridge is i440bx, southbridge is i82371eb, superio is w83977ef, cpu is pentium III 450MHz(slot 1). I use the asus/p2b 's config file to build the linuxbios, but it stopped at debug code 0x12. The last debug string is "Copying LinuxBIOS to ram. Jumping to LinuxBIOS.", then it stopped. Can you help solve the problem? I find the most files in the asus/p2b are copied from via/epia??

2 1

[LinuxBIOS] r2487 - in trunk/LinuxBIOSv2/src/superio/ite: it8661f it8671f it8673f it8705f it8712f it8716f it8718f
by svn＠openbios.org 04 Nov '06

04 Nov '06

Author: uwe Date: 2006-11-05 00:19:00 +0100 (Sun, 05 Nov 2006) New Revision: 2487 Modified: trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8671f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c Log: Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace changes and fixing of comments. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb 2006-11-04 23:19:00 UTC (rev 2487) @@ -20,3 +20,4 @@ config chip.h object superio.o + Modified: trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h 2006-11-04 23:19:00 UTC (rev 2487) @@ -23,14 +23,12 @@ /* This chip doesn't seem to have keyboard and mouse support. */ -/* #include <pc80/keyboard.h> */ #include <uart8250.h> extern struct chip_operations superio_ite_it8661f_ops; struct superio_ite_it8661f_config { struct uart8250 com1, com2; - /* struct pc_keyboard keyboard; */ }; #endif /* _SUPERIO_ITE_IT8661F */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h 2006-11-04 23:19:00 UTC (rev 2487) @@ -19,7 +19,7 @@ */ /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8661_2.asp */ -/* Status: untested on real hardware, but it compiles. */ +/* Status: Untested on real hardware, but it compiles. */ /* This chip doesn't seem to have keyboard and mouse support. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c 2006-11-04 23:19:00 UTC (rev 2487) @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8661F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8661F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8661F_CONFIG_REG_LDE 0x23 /* PnP Logical Device Enable. */ @@ -35,7 +35,7 @@ #define IT8661F_CONFIGURATION_PORT 0x0279 /* Write-only. */ /* Special values used for entering MB PnP mode. The first four bytes of - * each line determine the address port, the last four are data. */ + each line determine the address port, the last four are data. */ static const uint8_t init_values[] = { 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61, @@ -44,7 +44,7 @@ }; /* The content of IT8661F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8661f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8661F_CONFIG_REG_LDN, SIO_BASE); @@ -53,7 +53,7 @@ outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8661F Super IO chip. */ +/* Enable the peripheral devices on the IT8661F Super I/O chip. */ static void it8661f_enable_serial(device_t dev, unsigned iobase) { uint8_t i; @@ -88,10 +88,10 @@ it8661f_sio_write(IT8661F_IR, 0x30, 0x1); /* IR */ /* Select 24MHz CLKIN (clear bit 1) and clear software suspend mode - (clear bit 0). */ + (clear bit 0). */ it8661f_sio_write(0x00, IT8661F_CONFIG_REG_SWSUSP, 0x00); /* (3) Exit the configuration state (MB PnP mode). */ - it8661f_sio_write(0x00, IT8661F_CONFIG_REG_CC, 0x02); + it8661f_sio_write(0x00, IT8661F_CONFIG_REG_CC, 0x02); } Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/Config.lb 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/Config.lb 2006-11-04 23:19:00 UTC (rev 2487) @@ -20,3 +20,4 @@ config chip.h object superio.o + Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-11-04 23:19:00 UTC (rev 2487) @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8671F_CONFIG_REG_LDE 0x23 /* PnP Logical Device Enable. */ @@ -35,7 +35,7 @@ #define IT8671F_CONFIGURATION_PORT 0x0279 /* Write-only. */ /* Special values used for entering MB PnP mode. The first four bytes of - * each line determine the address port, the last four are data. */ + each line determine the address port, the last four are data. */ static const uint8_t init_values[] = { 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61, @@ -44,7 +44,7 @@ }; /* The content of IT8671F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8671F_CONFIG_REG_LDN, SIO_BASE); @@ -53,7 +53,7 @@ outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8671F Super IO chip. */ +/* Enable the peripheral devices on the IT8671F Super I/O chip. */ static void it8671f_enable_serial(device_t dev, unsigned iobase) { uint8_t i; @@ -80,7 +80,7 @@ PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7). */ it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f); - /* Activate all devices. */ + /* Activate all devices. */ it8671f_sio_write(IT8671F_FDC, 0x30, 0x01); /* Floppy */ it8671f_sio_write(IT8671F_SP1, 0x30, 0x01); /* Serial port 1 */ it8671f_sio_write(IT8671F_SP2, 0x30, 0x01); /* Serial port 2 */ @@ -93,6 +93,6 @@ it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, 0x00); /* (3) Exit the configuration state (MB PnP mode). */ - it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02); + it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02); } Modified: trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb 2006-11-04 23:19:00 UTC (rev 2487) @@ -20,3 +20,4 @@ config chip.h object superio.o + Modified: trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h 2006-11-04 23:19:00 UTC (rev 2487) @@ -19,7 +19,7 @@ */ /* Datasheet: http://www.datasheet4u.com/html/I/T/8/IT8673F_ITE.pdf.html */ -/* Status: untested on real hardware, but it compiles. */ +/* Status: Untested on real hardware, but it compiles. */ #define IT8673F_FDC 0x00 /* Floppy */ #define IT8673F_SP1 0x01 /* Com1 */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c 2006-11-04 23:19:00 UTC (rev 2487) @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8673F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8673F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8673F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ @@ -35,7 +35,7 @@ #define IT8673F_CONFIGURATION_PORT 0x0279 /* Write-only. */ /* Special values used for entering MB PnP mode. The first four bytes of - * each line determine the address port, the last four are data. */ + each line determine the address port, the last four are data. */ static const uint8_t init_values[] = { 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61, @@ -44,7 +44,7 @@ }; /* The content of IT8673F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8673f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8673F_CONFIG_REG_LDN, SIO_BASE); @@ -53,7 +53,7 @@ outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8673F Super IO chip. */ +/* Enable the peripheral devices on the IT8673F Super I/O chip. */ static void it8673f_enable_serial(device_t dev, unsigned iobase) { uint8_t i; @@ -92,6 +92,6 @@ it8673f_sio_write(0x00, IT8673F_CONFIG_REG_SWSUSP, 0x00); /* (3) Exit the configuration state (MB PnP mode). */ - it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02); + it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02); } Modified: trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/Config.lb 2006-11-04 23:19:00 UTC (rev 2487) @@ -20,3 +20,4 @@ config chip.h object superio.o + Modified: trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f.h 2006-11-04 23:19:00 UTC (rev 2487) @@ -19,7 +19,7 @@ */ /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8705_2.asp */ -/* Status: untested on real hardware, but it compiles. */ +/* Status: Untested on real hardware, but it compiles. */ /* Note: This should also work on an IT8705AF, they're almost the same. */ /* This chip doesn't seem to have keyboard and mouse support. */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8705f/it8705f_early_serial.c 2006-11-04 23:19:00 UTC (rev 2487) @@ -26,19 +26,19 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8705F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8705F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8705F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ /* WTF? 0x23 and 0x24 are swapped here (when compared to other IT87xx). */ -#define IT8705F_CONFIG_REG_CLOCKSEL 0x24 /* Clock Selection. */ -#define IT8705F_CONFIG_REG_SWSUSP 0x23 /* Software Suspend, Flash I/F. */ +#define IT8705F_CONFIG_REG_CLOCKSEL 0x24 /* Clock Selection, Flash I/F. */ +#define IT8705F_CONFIG_REG_SWSUSP 0x23 /* Software Suspend. */ #define IT8705F_CONFIGURATION_PORT 0x2e /* Write-only. */ /* The content of IT8705F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8705f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8705F_CONFIG_REG_LDN, SIO_BASE); @@ -47,7 +47,7 @@ outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8705F Super IO chip. */ +/* Enable the peripheral devices on the IT8705F Super I/O chip. */ static void it8705f_enable_serial(device_t dev, unsigned iobase) { /* (1) Enter the configuration state (MB PnP mode). */ @@ -63,8 +63,8 @@ /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - * If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable all devices. */ @@ -73,18 +73,17 @@ it8705f_sio_write(IT8705F_SP2, 0x30, 0x1); /* Serial port 2 */ it8705f_sio_write(IT8705F_PP, 0x30, 0x1); /* Parallel port */ it8705f_sio_write(IT8705F_EC, 0x30, 0x1); /* Environment controller */ - /* GPIO */ it8705f_sio_write(IT8705F_GAME, 0x30, 0x1); /* GAME port */ it8705f_sio_write(IT8705F_IR, 0x30, 0x1); /* Consumer IR */ it8705f_sio_write(IT8705F_MIDI, 0x30, 0x1); /* MIDI port */ /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ - /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CLOCKSEL, 0x00); */ + /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CLOCKSEL, 0x01); */ /* Clear software suspend mode (clear bit 0). TODO: Needed? */ /* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_SWSUSP, 0x00); */ /* (3) Exit the configuration state (MB PnP mode). */ - it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CC, 0x02); + it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CC, 0x02); } Modified: trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb 2006-11-04 23:19:00 UTC (rev 2487) @@ -20,3 +20,4 @@ config chip.h object superio.o + Modified: trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h 2006-11-04 23:19:00 UTC (rev 2487) @@ -19,7 +19,7 @@ */ /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8712_2.asp */ -/* Status: untested on real hardware, but it compiles. */ +/* Status: Untested on real hardware, but it compiles. */ #define IT8712F_FDC 0x00 /* Floppy */ #define IT8712F_SP1 0x01 /* Com1 */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c 2006-11-04 23:19:00 UTC (rev 2487) @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8712F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8712F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8712F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ @@ -36,7 +36,7 @@ #define IT8712F_CONFIGURATION_PORT 0x2e /* Write-only. */ /* The content of IT8712F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8712F_CONFIG_REG_LDN, SIO_BASE); @@ -45,7 +45,7 @@ outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8712F Super IO chip. */ +/* Enable the peripheral devices on the IT8712F Super I/O chip. */ static void it8712f_enable_serial(device_t dev, unsigned iobase) { /* (1) Enter the configuration state (MB PnP mode). */ @@ -61,8 +61,8 @@ /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - * If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable all devices. */ @@ -78,12 +78,12 @@ it8712f_sio_write(IT8712F_IR, 0x30, 0x1); /* Consumer IR */ /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ - /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x00); */ + /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x01); */ /* Clear software suspend mode (clear bit 0). TODO: Needed? */ /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_SWSUSP, 0x00); */ /* (3) Exit the configuration state (MB PnP mode). */ - it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02); + it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02); } Modified: trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/Config.lb 2006-11-04 23:19:00 UTC (rev 2487) @@ -20,3 +20,4 @@ config chip.h object superio.o + Modified: trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f.h 2006-11-04 23:19:00 UTC (rev 2487) @@ -19,7 +19,7 @@ */ /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8716_2.asp */ -/* Status: untested on real hardware, but it compiles. */ +/* Status: Untested on real hardware, but it compiles. */ #define IT8716F_FDC 0x00 /* Floppy */ #define IT8716F_SP1 0x01 /* Com1 */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8716f/it8716f_early_serial.c 2006-11-04 23:19:00 UTC (rev 2487) @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8716F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8716F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8716F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ @@ -36,7 +36,7 @@ #define IT8716F_CONFIGURATION_PORT 0x2e /* Write-only. */ /* The content of IT8716F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8716f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8716F_CONFIG_REG_LDN, SIO_BASE); @@ -45,7 +45,7 @@ outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8716F Super IO chip. */ +/* Enable the peripheral devices on the IT8716F Super I/O chip. */ static void it8716f_enable_serial(device_t dev, unsigned iobase) { /* (1) Enter the configuration state (MB PnP mode). */ @@ -61,8 +61,8 @@ /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - * If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable all devices. */ @@ -78,12 +78,12 @@ it8716f_sio_write(IT8716F_IR, 0x30, 0x1); /* Consumer IR */ /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ - /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CLOCKSEL, 0x00); */ + /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CLOCKSEL, 0x01); */ /* Clear software suspend mode (clear bit 0). TODO: Needed? */ /* it8716f_sio_write(0x00, IT8716F_CONFIG_REG_SWSUSP, 0x00); */ /* (3) Exit the configuration state (MB PnP mode). */ - it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CC, 0x02); + it8716f_sio_write(0x00, IT8716F_CONFIG_REG_CC, 0x02); } Modified: trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb 2006-11-04 23:19:00 UTC (rev 2487) @@ -20,3 +20,4 @@ config chip.h object superio.o + Modified: trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h 2006-11-04 23:19:00 UTC (rev 2487) @@ -19,7 +19,7 @@ */ /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8718_2.asp */ -/* Status: untested on real hardware, but it compiles. */ +/* Status: Untested on real hardware, but it compiles. */ #define IT8718F_FDC 0x00 /* Floppy */ #define IT8718F_SP1 0x01 /* Com1 */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c 2006-11-02 16:02:33 UTC (rev 2486) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c 2006-11-04 23:19:00 UTC (rev 2487) @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8718F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8718F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8718F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ @@ -36,7 +36,7 @@ #define IT8718F_CONFIGURATION_PORT 0x2e /* Write-only. */ /* The content of IT8718F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8718f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8718F_CONFIG_REG_LDN, SIO_BASE); @@ -45,7 +45,7 @@ outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8718F Super IO chip. */ +/* Enable the peripheral devices on the IT8718F Super I/O chip. */ static void it8718f_enable_serial(device_t dev, unsigned iobase) { /* (1) Enter the configuration state (MB PnP mode). */ @@ -61,8 +61,8 @@ /* (2) Modify the data of configuration registers. */ /* Select the chip to configure (if there's more than one). - * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. - * If this register is not written, both chips are configured. */ + Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + If this register is not written, both chips are configured. */ /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CONFIGSEL, 0x00); */ /* Enable all devices. */ @@ -76,12 +76,12 @@ it8718f_sio_write(IT8718F_IR, 0x30, 0x1); /* Consumer IR */ /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ - /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CLOCKSEL, 0x00); */ + /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CLOCKSEL, 0x01); */ /* Clear software suspend mode (clear bit 0). TODO: Needed? */ /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_SWSUSP, 0x00); */ /* (3) Exit the configuration state (MB PnP mode). */ - it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CC, 0x02); + it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CC, 0x02); }

1 0

[LinuxBIOS] Improvements to "Supported Motherboards" wiki page.
by Uwe Hermann 04 Nov '06

04 Nov '06

Hi, I've modified the wiki page http://www.linuxbios.org/Supported_Motherboards quite a bit recently. I'm planning some more changes to make it easier for people interested in LinuxBIOS to check whether their mainboard is supported. I'd like to remove the "Specification" (mostly useless IMHO, info can be found in the linked vendor pages) and "Chipsets" entries. They should be replaced with the most important parts someone has to check to know whether the mainboard is supported. At a bare minimum I think these entries should be listed: * Northbridge * Southbridge * Super I/O Any further entries? CPU/Socket maybe? Also, I'll add an entry for _all_ mainboards in the svn repository, and list those which are not (yet) functional as "work in progress" or so... Comments? Uwe. -- Uwe Hermann http://www.hermann-uwe.de http://www.it-services-uh.de | http://www.crazy-hacks.org http://www.holsham-traders.de | http://www.unmaintained-free-software.org

12 32

Re: [LinuxBIOS] #25: Clean up x86 emulator in the tree?
by LinuxBIOS 04 Nov '06

04 Nov '06

#25: Clean up x86 emulator in the tree? ----------------------------+----------------------------------------------- Reporter: uwe | Owner: somebody Type: task | Status: new Priority: major | Milestone: Component: code | Version: v3 Resolution: | Keywords: Include_gantt: 0 | Dependencies: Due_assign: MM/DD/YYYY | Due_close: MM/DD/YYYY ----------------------------+----------------------------------------------- Changes (by stepan): * cc: eich(a)suse.de (added) * type: defect => task * summary: Remove one x86 emulator from the tree? => Clean up x86 emulator in the tree? Comment: I am adding Egbert Eich from the X.org team to this issue. Maybe we find some time at some point to do such a merge / unification together. -- Ticket URL: <http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/25#comment:2> LinuxBIOS <http://www.linuxbios.org/>

1 0

[LinuxBIOS] #25: Remove one x86 emulator from the tree?
by LinuxBIOS 04 Nov '06

04 Nov '06

#25: Remove one x86 emulator from the tree? ---------------------------+------------------------------------------------ Reporter: uwe | Owner: somebody Type: defect | Status: new Priority: major | Milestone: Component: code | Version: v2 Keywords: | Include_gantt: 0 Dependencies: | Due_assign: MM/DD/YYYY Due_close: MM/DD/YYYY | ---------------------------+------------------------------------------------ From http://www.linuxbios.org/pipermail/linuxbios/2006-November/016626.html: {{{ which of the following x86 emulators in the tree works better and are there any plans to eliminate one of them? LinuxBIOSv2/src/devices/emulator/x86emu/ LinuxBIOSv2/util/vgabios/x86emu/src/x86emu/ Has anyone recently worked to merge this with current x.org and scitech code? }}} From http://www.linuxbios.org/pipermail/linuxbios/2006-November/016627.html: {{{ > LinuxBIOSv2/src/devices/emulator/x86emu/ part of linuxbios > LinuxBIOSv2/util/vgabios/x86emu/src/x86emu/ standalone, for testing. They had to fork, since one can use glibc, the other can not. > Has anyone recently worked to merge this with current x.org > and scitech code? it's been on the list for years. The last time we tried it, with some "optimized" code from other places, it totally broke. So we need to be careful. }}} -- Ticket URL: <http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/25> LinuxBIOS <http://www.linuxbios.org/>

1 1

[LinuxBIOS] well supported current cheap desktop pc mobo recommendation?
by Eric Waguespack 04 Nov '06

04 Nov '06

I have looked at the products page, read the faq, and looked at the supported chipsets, but I thought I would pose the question to the list. Can someone please provide me with a short list of (current / cheap / desktop oriented) motherboards that enjoy full support with linuxbios? you get bonus points and a free spot on my Christmas list if you provide a link to newegg or outpost.com, thanks in advance.

5 5

[LinuxBIOS] two x86 emulators in the tree...
by Carl-Daniel Hailfinger 04 Nov '06

04 Nov '06

Hi, which of the following x86 emulators in the tree works better and are there any plans to eliminate one of them? LinuxBIOSv2/src/devices/emulator/x86emu/ LinuxBIOSv2/util/vgabios/x86emu/src/x86emu/ Has anyone recently worked to merge this with current x.org and scitech code? Regards, Carl-Daniel -- http://www.hailfinger.org/

3 2

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coreboot November 2006