coreboot February 2004

coreboot@coreboot.org

43 participants
63 discussions

Re: stdarg.h and -nostdinc
by ebiederman＠lnxi.com 11 Feb '04

11 Feb '04

Stefan Reinauer <stepan(a)suse.de> writes: > * ron minnich <rminnich(a)lanl.gov> [040211 16:22]: > > I can't think of anything better. My wish list is to try to remove > > GNU-isms so I can build this on Plan 9, but at the same time we keep > > hitting these issues. > > > > If we are determined to include things like stdarg.h, I would rather carry > > our own copy around than depend on the OS we're using. So for the moment I > > would say "there is nothing better". > > It seems the next thing bites me here is that the va_* macros get > resolved into gcc's builtin_va* stuff. Which, as you could guess, is > disabled with the -nobuiltins flag we pass to gcc. What I don't really > get yet is why I don't get unresolved symbols with this, but rather just > no output at all. Lets see... Just off the top of my head __builtin variants should continue to be recognized with -fnobuiltins. Guys do we need a developer list? I'm trying to figure out why more of the conversations I find myself involved in are not on the public list. Is it a signal to noise ratio problem? I'm just annoyed that the conversations that pass through my inbox not being on the public list seem to be more about linuxbios than the conversations on the LinuxBIOS list. Eric

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Re: Re: LinuxBIOS....on desktop PCs?
by ron minnich 11 Feb '04

11 Feb '04

On Tue, 10 Feb 2004 bjm_(a)bellsouth.net wrote: > >turns out the chaintech just added doesn't build, which I forget. Anyone > >wants to take a look, please do. > > Ah...well, maybe later then? Or maybe when I get a nice embedded linux > rackmount server to replace my Linksys router, and act as a webserver I > maybe could use LinuxBIOS then eh? sure. there is a variant epia mobo which would make an ideal router/filter/whatever, it has two enet ports. ron

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Re: 64MB MMIO Hole ?
by ebiederman＠lnxi.com 11 Feb '04

11 Feb '04

ron minnich <rminnich(a)lanl.gov> writes: > On 10 Feb 2004, Eric W. Biederman wrote: > > > > > The linux mtrr support does not know how to cope with overlapping > > mtrrs. > > should we help them? Writing the patch and submitting it sounds like one good solution. There is also PAT which will let you set attributes per page and that is probably a cleaner solution when it is available. Right now I just have an understanding of the problem, but I am not working on it. So please feel free to find a solution that works. Eric

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device tree
by Stefan Reinauer 11 Feb '04

11 Feb '04

Hi, what's the right way of getting the pci ids of a device when traversing the device tree? is seems that the "path" part can be used, but there's no reference to the real hardware. I need this only _after_ pci initialization. The config tool creates the following structure for an 8131 for example: struct chip amd8131 = { .link = 1, .path = { { .enable = 1, .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .bus = 0x0, .devfn = PCI_DEVFN(0x0,0) }}}}, { .enable = 1, .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .bus = 0x0, .devfn = PCI_DEVFN(0x0,1) }}}}, { .enable = 1, .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .bus = 0x0, .devfn = PCI_DEVFN(0x1,0) }}}}, { .enable = 1, .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .bus = 0x0, .devfn = PCI_DEVFN(0x1,1) }}}}, }, .next = &amd8111, .children = 0, .control= 0, .chip_info= 0, }; Best regards, Stefan Reinauer -- Stefan Reinauer, SUSE LINUX AG Teamleader Architecture Development

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Re: Re: LinuxBIOS....on desktop PCs?
by bjm_＠bellsouth.net 11 Feb '04

11 Feb '04

>turns out the chaintech just added doesn't build, which I forget. Anyone >wants to take a look, please do. Ah...well, maybe later then? Or maybe when I get a nice embedded linux rackmount server to replace my Linksys router, and act as a webserver I maybe could use LinuxBIOS then eh? -Brad

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Re: LinuxBIOS
by Ben Wang 10 Feb '04

10 Feb '04

Hi, I have been following the mailinglist for some time now (several months) I have noticed that there is alot of active development. I represent a System Integration company (Synrax) based in Australia however, I have also been in contact with my manufacturers and have managed to capture their interest regarding LinuxBIOS. These manufacturers include: Axiomtek (http://www.axiomtek.com.tw) Iwill (http://www.iwill.net) Evalue (http://www.evalue-tech.com) Axiomtek and Evalue produce embedded SBCs whilst Iwill products Server/Workstation mainboards. My question is, what type of support documentation and/or other information is required to take LinuxBIOS to an even greater level? I wish to try/port LinuxBIOS to as many different boards as I can (time/resources permitting). Unfortunately, BIOS level programming is a relatively new area for me so my contributions may be limited to testing and providing documentation (where possible) initially. Thank you for taking the time to read this. Regards, Ben Wang Senior Applications Engineer, Synrax Australia Pty. Ltd.

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flash_rom support for amd 8111 and pm49fl004
by ron minnich 10 Feb '04

10 Feb '04

I just committed YhLu's updates to flash_from for the amd 8111 and pm49fl004 parts. This is in freebios2 only for now, since freebios 1 does not support this chipset anyway. ron

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Re: Re: LinuxBIOS....on desktop PCs?
by Hendricks David W. 10 Feb '04

10 Feb '04

That's a KT266 mainboard, which might be familiar with the Chaintech mainboard recently added. You might want to check out the details and see how similar they are. On Mon, 9 Feb 2004 bjm_(a)bellsouth.net wrote: > Well...I'm running on an Athlon, yes...2GHz infact. Mainboard is a Shuttle Ak32a, not sure how big the ROM is, how big does it have to be to have LinuxBIOS? > > Oh I just wanted to try out LinuxBIOS because I heard it has fast boot times...and it's linux so it has to work ;) > > -Brad > > > > > From: "Hendricks David W." <dwh(a)lanl.gov> > > Date: 2004/02/09 Mon PM 05:05:46 EST > > To: bjm_(a)bellsouth.net > > CC: linuxbios(a)clustermatic.org > > Subject: Re: LinuxBIOS....on desktop PCs? > > > > Yes, depending on which mainboard you're running. And with the recent > > revelations in VGA support (It works :)), I think LinuxBIOS is well > > underway for use in the desktop market. > > > > Did you have anything specific in mind? If you're looking for a mainboard, > > check out the Epia or perhaps the Chaintech 7KJD if you're looking for an > > Athlon platform. > > > > On Sat, 7 Feb 2004 bjm_(a)bellsouth.net wrote: > > > > > Is it possible to have LinuxBIOS on desktop PCs? Was wondering...if so, I'd like to use it :) > > > > > > _______________________________________________ > > > Linuxbios mailing list > > > Linuxbios(a)clustermatic.org > > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > > > > >

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答复: What is this good for?
by YhLu 10 Feb '04

10 Feb '04

Eric, Can you commit the patch that can reduce the time of memory clearing? If the MB is configured with 8G, it will take around 2 minutes to get it finished. Regards YH. -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2004年2月10日 7:21 收件人: Stefan Reinauer 抄送: linuxbios(a)clustermatic.org 主题: Re: What is this good for? Stefan Reinauer <stepan(a)suse.de> writes: > Hi, > > I appreciate that we only have to do one reset when optimizing HT links: > > http://cvs.sourceforge.net/viewcvs.py/freebios/freebios2/src/northbridge/amd /amdk8/misc_control.c?r1=1.4&r2=1.5 > > > What I don't like about the whole situation is the fact that this code > does not honour the actually available links but does hardcodes. > This will break Athlon64 systems _ONCE AGAIN_ > > Please, instead of removing my comments, do read them - They explain > pretty well why certain code is only enabled for CONFIG_MAX_CPUS > 1 Ugh yes that change looks nasty. Here is the version I am running, and it does work on AMD64 systems. It relies on the fact that the unused HT links return 0, instead of doing the prettier thing of walking the capabilities, but it does work. I don't have time at the moment to get this merged, but at least this will give you something to work with. Eric /* Turn off machine check triggers when reading * pci space where there are no devices. * This is necessary when scaning the bus for * devices which is done by the kernel */ #include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> #include <part/hard_reset.h> #include "./cpu_rev.c" #include "amdk8.h" #define IOMMU_APETURE_SIZE (64*1024*1024) /* 64M */ static void mcf3_read_resources(device_t dev) { struct resource *resource; /* Read the generic PCI resources */ pci_dev_read_resources(dev); /* If we are not the first processor don't allocate the gart apeture */ if (dev->path.u.pci.devfn != PCI_DEVFN(24, 3)) { return; } /* Add a 64M Gart apeture resource */ if (dev->resources < MAX_RESOURCES) { resource = &dev->resource[dev->resources]; dev->resources++; resource->base = 0; resource->size = IOMMU_APETURE_SIZE; resource->align = log2(resource->size); resource->gran = log2(resource->size); resource->limit = 0xffffffff; /* 4G */ resource->flags = IORESOURCE_MEM; resource->index = 0x94; } else { printk_err("%s Unexpeted resource shortage\n", dev_path(dev)); } } static void mcf3_set_resources(device_t dev) { struct resource *resource, *last; last = &dev->resource[dev->resources]; for(resource = &dev->resource[0]; resource < last; resource++) { if (resource->index == 0x94) { device_t pdev; uint32_t base; uint32_t size; size = (0<<6)|(0<<5)|(0<<4)|((log2(resource->size) - 25) << 1)|(0<<0); base = ((resource->base) >> 25) & 0x00007fff; pdev = 0; while(pdev = dev_find_device(PCI_VENDOR_ID_AMD, 0x1103, pdev)) { /* I want a 64M GART apeture */ pci_write_config32(pdev, 0x90, (0<<6)|(0<<5)|(0<<4)|(1<<1)|(0<<0)); /* Store the GART base address */ pci_write_config32(pdev, 0x94, base); /* Don't set the GART Table base address */ pci_write_config32(pdev, 0x98, 0); printk_debug( "%s %02x <- [0x%08lx - 0x%08lx] mem <gart>\n", dev_path(pdev), resource->index, resource->base, resource->base + resource->size - 1); } /* Remember this resource has been stored */ resource->flags |= IORESOURCE_STORED; } } /* Set the generic PCI resources */ pci_dev_set_resources(dev); } static void misc_control_init(struct device *dev) { uint32_t cmd, cmd_ref; int needs_reset; struct device *f0_dev, *f2_dev; printk_debug("NB: Function 3 Misc Control.. "); needs_reset = 0; /* Disable Machine checks from Invalid Locations. * This is needed for PC backwards compatibility. */ cmd = pci_read_config32(dev, 0x44); cmd |= (1<<6) | (1<<25); pci_write_config32(dev, 0x44, cmd ); if (is_cpu_pre_c0()) { /* Errata 58 * Disable CPU low power states C2, C1 and throttling */ cmd = pci_read_config32(dev, 0x80); cmd &= ~(1<<0); pci_write_config32(dev, 0x80, cmd ); cmd = pci_read_config32(dev, 0x84); cmd &= ~(1<<24); cmd &= ~(1<<8); pci_write_config32(dev, 0x84, cmd ); /* Errata 66 * Limit the number of downstream posted requests to 1 */ cmd = pci_read_config32(dev, 0x70); if ((cmd & (3 << 0)) != 2) { cmd &= ~(3<<0); cmd |= (2<<0); pci_write_config32(dev, 0x70, cmd ); needs_reset = 1; } cmd = pci_read_config32(dev, 0x7c); if ((cmd & (3 << 4)) != 0) { cmd &= ~(3<<4); cmd |= (0<<4); pci_write_config32(dev, 0x7c, cmd ); needs_reset = 1; } /* Clock Power/Timing Low */ cmd = pci_read_config32(dev, 0xd4); if (cmd != 0x000D0001) { cmd = 0x000D0001; pci_write_config32(dev, 0xd4, cmd); needs_reset = 1; /* Needed? */ } } else { uint32_t dcl; f2_dev = dev_find_slot(0, dev->path.u.pci.devfn - 3 + 2); /* Errata 98 * Set Clk Ramp Hystersis to 7 * Clock Power/Timing Low */ cmd_ref = 0x04e20707; /* Registered */ dcl = pci_read_config32(f2_dev, DRAM_CONFIG_LOW); if (dcl & DCL_UnBufDimm) { cmd_ref = 0x000D0701; /* Unbuffered */ } cmd = pci_read_config32(dev, 0xd4); if(cmd != cmd_ref) { pci_write_config32(dev, 0xd4, cmd_ref ); needs_reset = 1; /* Needed? */ } } /* Optimize the Link read pointers */ f0_dev = dev_find_slot(0, dev->path.u.pci.devfn - 3); if (f0_dev) { int link; cmd_ref = cmd = pci_read_config32(dev, 0xdc); for(link = 0; link < 3; link++) { uint32_t link_type; unsigned reg; reg = 0x98 + (link * 0x20); link_type = pci_read_config32(f0_dev, reg); if (link_type & LinkConnected) { cmd &= 0xff << (link *8); /* FIXME this assumes the device on the other side is an AMD device */ cmd |= 0x25 << (link *8); } } if (cmd != cmd_ref) { pci_write_config32(dev, 0xdc, cmd); needs_reset = 1; } } else { printk_err("Missing f0 device!\n"); } if (needs_reset) { printk_debug("resetting cpu\n"); hard_reset(); } printk_debug("done.\n"); } static struct device_operations mcf3_ops = { .read_resources = mcf3_read_resources, .set_resources = mcf3_set_resources, .enable_resources = pci_dev_enable_resources, .init = misc_control_init, .scan_bus = 0, }; static struct pci_driver mcf3_driver __pci_driver = { .ops = &mcf3_ops, .vendor = PCI_VENDOR_ID_AMD, .device = 0x1103, }; _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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vga emulator new version
by ron minnich 10 Feb '04

10 Feb '04

I've got the newest working version of the emulator for anyone who wants to try it. This won't work on K8 systems minus some hacks, due to K8 differences, contact me if interested. ron

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coreboot February 2004