coreboot October 2003

coreboot@coreboot.org

52 participants
115 discussions

romcc-0.36 with -O2 8 registers are sufficient
by ebiederman＠lnxi.com 14 Oct '03

14 Oct '03

I just got to looking at my test cases and I have successfully compiled all of my test cases that are derivatives of actual memory initialization code with -O2 and no extra registers. Which is a very good sign for the case of using extra registers to avoid inlining subroutines. Eric

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Epox Boards
by Mark-Andres Hohm 14 Oct '03

14 Oct '03

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Have anyone expirience with Epox board and linuxbios? -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.2.1 (GNU/Linux) iD8DBQE/ivYuPC4Ugo8dWvcRAu/EAJ9vMDtrXZ3FM42Mri4yeH4wEeDIgwCeIxKr Cr6NzbDriwgqnU1gK9YW40M= =Y5/p -----END PGP SIGNATURE-----

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forgetful...
by Nathanael Noblet 13 Oct '03

13 Oct '03

Hello, I've tried google for the last 5 minutes. I can't remember how to backup the original BIOS. I fried my working flash copy of it, and have only the original, which I'd like to extract and put into another working part as safety, but can't find how I did it in the first place. -- Nathanael Noblet Gnat Solutions 4604 Monterey Ave NW Calgary, AB T3B 5K4 T/F 403.288.5360 C 403.809.5368 http://www.gnat.ca/

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config.py moved?
by Stefan Reinauer 13 Oct '03

13 Oct '03

Hi, config.py moved to the target directory. Did this happen on purpose? Should it not move to config/solo/solo instead of config/solo if it moves at all? Stefan -- Architecture Team SuSE Linux AG

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Re: [COMMIT] freebios2 How much have I broken?
by YhLu 13 Oct '03

13 Oct '03

Eric, The same. One Clue: Even I do the reverse scan, if I enable the hard_reset in the misc_control.c. After the reset and successful scan the 8131/8111, it will hang when scan the 8151. Regards YH -----邮件原件----- 发件人: YhLu 发送时间: 2003年10月13日 20:00 收件人: ebiederman(a)lnxi.com 抄送: LinuxBIOS 主题: Re: [COMMIT] freebios2 How much have I broken? One minute. -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年10月13日 20:07 收件人: YhLu 抄送: LinuxBIOS 主题: Re: 答复: [COMMIT] freebios2 How much have I broken? YhLu <YhLu(a)tyan.com> writes: > I think Stephan will have trouble on it too. > > For me, If I reverse scan in northbridge.c, and it will be OK. A) the reverse scan works and that is good. > It seems that 8131/8111 need to initialize before others. Why? This is what I am trying to understand. It doesn't make sense especially as I already did that, earlier. The resets to get the hypertransport settings to take effect. I can see those depending on the amd8111. Have you tried the small subroutine change I sent? Eric _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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Re: [COMMIT] freebios2 How much have I broken?
by YhLu 13 Oct '03

13 Oct '03

Reset: LinuxBIOS-1.1.52.0_Fallback Tue Oct 14 03:16:20 EDT 2003 starting... setting up resource map.... done. Enabling routing table for node 00000000 done. Enabling SMP settings setup_remote_node setup_remote_done Renaming current temp node to 00000001 done. Enabling routing table for node 00000001 done. 00000002 nodes initialized. detect_mp_capabilities: 00000002 coherent_ht_finalize done setting up ht links.... done SMBus controller enabled Ram1.00 setting up CPU00 northbridge registers done. Ram1.01 setting up CPU01 northbridge registers done. Ram2.00 Enabling dual channel memory 166Mhz Interleaved RAM: 0x00400000 KB Ram2.01 Enabling dual channel memory disabling dimm01 disabling dimm01 166Mhz disabling dimm01 Interleaved RAM: 0x00600000 KB Ram3 ECC enabled ECC enabled Initializing memory: done Clearing memory: addr 00000000-000000ff ---------------------------------------------------------------done Initializing memory: done Clearing memory: addr 00000100-0000017f ++++++++++++++++++++++++++++++++done Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.52.0_Fallback Tue Oct 14 03:16:20 EDT 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 Enumerating: AMD K8 Northbridge Enumerating: AMD K8 Northbridge Enumerating: AMD K8 Enumerating: AMD K8 Enumerating: AMD 8111 Enumerating buses...PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled amdk8_scan_chains max: 0 starting... Hyper transport scan link: 2 max: 1 PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 PCI: pci_scan_bus for bus 1 PCI: 01:01.0 [1022/7450] bus ops PCI: 01:01.0 [1022/7450] enabled PCI: 01:01.1 [1022/7451] ops PCI: 01:01.1 [1022/7451] enabled PCI: 01:02.0 [1022/7450] bus ops PCI: 01:02.0 [1022/7450] enabled PCI: 01:02.1 [1022/7451] ops PCI: 01:02.1 [1022/7451] enabled PCI: 01:03.0 [1022/7460] enabled PCI: 01:04.0 [1022/7468] bus ops PCI: 01:04.0 [1022/7468] enabled PCI: 01:04.1 [1022/7469] ops PCI: 01:04.1 [1022/7469] enabled PCI: 01:04.2 [1022/746a] enabled PCI: 01:04.3 [1022/746b] ops PCI: 01:04.3 [1022/746b] enabled PCI: 01:04.5 [1022/746d] enabled amd8111_enable dev: PCI: 01:04.6 lpc_dev: PCI: 01:04.0 index: 6 reg: ffff -> ffbf done PCI: 01:04.6 [ffff/ffff] disabled PCI: pci_scan_bus for bus 2 PCI: 02:09.0 [14e4/16a7] ops PCI: 02:09.0 [14e4/16a7] enabled PCI: pci_scan_bus returning with max=02 PCI: pci_scan_bus for bus 3 PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus for bus 4 PCI: 04:00.0 [1022/7464] ops PCI: 04:00.0 [1022/7464] enabled PCI: 04:00.1 [1022/7464] ops PCI: 04:00.1 [1022/7464] enabled PCI: 04:00.2 [1022/7463] ops PCI: 04:00.2 [1022/7463] enabled amd8111_enable dev: PCI: 04:01.0 lpc_dev: PCI: 01:04.0 index: 9 reg: ffbf -> fdbf done PCI: 04:01.0 [ffff/ffff] disabled PCI: 04:0b.0 [1095/3114] ops PCI: 04:0b.0 [1095/3114] enabled PCI: 04:0c.0 [104c/8023] ops PCI: 04:0c.0 [104c/8023] enabled PCI: pci_scan_bus returning with max=04 PCI: pci_scan_bus returning with max=04 Hyper transport scan link: 2 new max: 4 Hypertransport scan link done Hyper transport scan link: 0 max: 5 PCI: 05:01.0 [1022/7454] enabled next_unitid: 0004 PCI: pci_scan_bus for bus 5 PCI: 05:01.0 [1022/7454] ops PCI: 05:01.0 [1022/7454] enabled PCI: 05:02.0 [1022/7455] bus ops PCI: 05:02.0 [1022/7455] enabled PCI: pci_scan_bus for bus 6 PCI: pci_scan_bus returning with max=06 PCI: pci_scan_bus returning with max=06 Hyper transport scan link: 0 new max: 6 Hypertransport scan link done amdk8_scan_chains max: 6 done amdk8_scan_chains max: 6 starting... amdk8_scan_chains max: 6 done PCI: pci_scan_bus returning with max=06 done Allocating resources... PCI: 04:01.0 missing read_resources PCI: 04:01.0 missing read_resources PCI: 04:01.0 missing read_resources PCI: 01:04.6 missing read_resources PCI: 01:04.6 missing read_resources ASSIGN RESOURCES, bus 0 PCI: 00:18.0 c8 <- [0x00003000 - 0x00002fff] node 0 link 0 io PCI: 00:18.0 80 <- [0xe0000000 - 0xefffffff] node 0 link 0 mem PCI: 01:04.6 missing read_resources PCI: 00:18.0 c0 <- [0x00001000 - 0x00002fff] node 0 link 2 io PCI: 01:04.6 missing read_resources PCI: 00:18.0 b8 <- [0xf0000000 - 0xf02fffff] node 0 link 2 mem ASSIGN RESOURCES, bus 5 PCI: 05:01.0 10 <- [0xe0000000 - 0xefffffff] prefmem PCI: 05:02.0 1c <- [0x00003000 - 0x00002fff] bus 6 io PCI: 05:02.0 24 <- [0xf0000000 - 0xefffffff] bus 6 prefmem PCI: 05:02.0 20 <- [0xf0000000 - 0xefffffff] bus 6 mem ASSIGNED RESOURCES, bus 5 ASSIGN RESOURCES, bus 1 PCI: 01:01.0 1c <- [0x00002000 - 0x00001fff] bus 2 io PCI: 01:01.0 24 <- [0xf0200000 - 0xf01fffff] bus 2 prefmem PCI: 01:01.0 20 <- [0xf0000000 - 0xf00fffff] bus 2 mem ASSIGN RESOURCES, bus 2 PCI: 02:09.0 10 <- [0xf0000000 - 0xf000ffff] mem ASSIGNED RESOURCES, bus 2 PCI: 01:01.1 10 <- [0xf0200000 - 0xf0200fff] mem PCI: 01:02.0 1c <- [0x00002000 - 0x00001fff] bus 3 io PCI: 01:02.0 24 <- [0xf0200000 - 0xf01fffff] bus 3 prefmem PCI: 01:02.0 20 <- [0xf0200000 - 0xf01fffff] bus 3 mem PCI: 01:02.1 10 <- [0xf0201000 - 0xf0201fff] mem PCI: 04:01.0 missing read_resources PCI: 01:03.0 1c <- [0x00001000 - 0x00001fff] bus 4 io PCI: 04:01.0 missing read_resources PCI: 01:03.0 24 <- [0xf0200000 - 0xf01fffff] bus 4 prefmem PCI: 04:01.0 missing read_resources PCI: 01:03.0 20 <- [0xf0100000 - 0xf01fffff] bus 4 mem ASSIGN RESOURCES, bus 4 PCI: 04:00.0 10 <- [0xf0104000 - 0xf0104fff] mem PCI: 04:00.1 10 <- [0xf0105000 - 0xf0105fff] mem PCI: 04:00.2 10 <- [0xf0108000 - 0xf01080ff] mem PCI: 04:00.2 14 <- [0xf0109000 - 0xf010901f] mem PCI: 04:01.0 missing set_resources PCI: 04:0b.0 10 <- [0x00001010 - 0x00001017] io PCI: 04:0b.0 14 <- [0x00001030 - 0x00001033] io PCI: 04:0b.0 18 <- [0x00001020 - 0x00001027] io PCI: 04:0b.0 1c <- [0x00001040 - 0x00001043] io PCI: 04:0b.0 20 <- [0x00001000 - 0x0000100f] io PCI: 04:0b.0 24 <- [0xf0107000 - 0xf01073ff] mem PCI: 04:0c.0 10 <- [0xf0106000 - 0xf01067ff] mem PCI: 04:0c.0 14 <- [0xf0100000 - 0xf0103fff] mem ASSIGNED RESOURCES, bus 4 PCI: 01:04.0 00 <- [0x00000000 - 0xffffffff] io PCI: 01:04.0 00 <- [0x00000000 - 0xffffffff] mem PCI: 01:04.1 20 <- [0x00002460 - 0x0000246f] io PCI: 01:04.2 10 <- [0x00002440 - 0x0000245f] io PCI: 01:04.5 10 <- [0x00002000 - 0x000020ff] io PCI: 01:04.5 14 <- [0x00002400 - 0x0000243f] io PCI: 01:04.6 missing set_resources ASSIGNED RESOURCES, bus 1 ASSIGNED RESOURCES, bus 0 done. Enabling resourcess... PCI: 00:18.0 cmd <- 00 PCI: 05:01.0 cmd <- 06 PCI: 05:02.0 bridge ctrl <- 0000 PCI: 05:02.0 cmd <- 07 PCI: 01:01.0 bridge ctrl <- 0000 PCI: 01:01.0 cmd <- 07 PCI: 02:09.0 cmd <- 02 PCI: 01:01.1 cmd <- 02 PCI: 01:02.0 bridge ctrl <- 0000 PCI: 01:02.0 cmd <- 07 PCI: 01:02.1 cmd <- 02 PCI: 01:03.0 bridge ctrl <- 0000 PCI: 01:03.0 cmd <- 07 PCI: 04:00.0 cmd <- 02 PCI: 04:00.1 cmd <- 02 PCI: 04:00.2 cmd <- 02 PCI: 04:01.0 missing enable_resources PCI: 04:0b.0 cmd <- 03 PCI: 04:0c.0 cmd <- 02 PCI: 01:04.0 cmd <- 0f PCI: 01:04.1 cmd <- 01 PCI: 01:04.2 cmd <- 01 PCI: 01:04.3 cmd <- 00 PCI: 01:04.5 cmd <- 01 PCI: 01:04.6 missing enable_resources PCI: 00:18.1 cmd <- 00 PCI: 00:18.2 cmd <- 00 PCI: 00:18.3 cmd <- 00 PCI: 00:19.0 cmd <- 00 PCI: 00:19.1 cmd <- 00 PCI: 00:19.2 cmd <- 00 PCI: 00:19.3 cmd <- 00 done. Initializing devices... PCI: 00:18.3 init NB: Function 3 Misc Control.. resetting cpu LinuxBIOS-1.1.52.0_Fallback Tue Oct 14 03:16:20 EDT 2003 starting... setting up resource map.... done. Enabling routing table for node 00000000 done. Enabling SMP settings setup_remote_node setup_remote_done Renaming current temp node to 00000001 done. Enabling routing table for node 00000001 done. 00000002 nodes initialized. detect_mp_capabilities: 00000002 coherent_ht_finalize done setting up ht links.... done SMBus controller enabled Ram1.00 setting up CPU00 northbridge registers done. Ram1.01 setting up CPU01 northbridge registers done. Ram2.00 Enabling dual channel memory 166Mhz Interleaved RAM: 0x00400000 KB Ram2.01 Enabling dual channel memory disabling dimm01 disabling dimm01 166Mhz disabling dimm01 Interleaved RAM: 0x00600000 KB Ram3 ECC enabled ECC enabled Initializing memory: done Clearing memory: addr 00000000-000000ff ---------------------------------------------------------------done Initializing memory: done Clearing memory: addr 00000100-0000017f ++++++++++++++++++++++++++++++++done Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.52.0_Fallback Tue Oct 14 03:16:20 EDT 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 Enumerating: AMD K8 Northbridge Enumerating: AMD K8 Northbridge Enumerating: AMD K8 Enumerating: AMD K8 Enumerating: AMD 8111 Enumerating buses...PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled amdk8_scan_chains max: 0 starting... Hyper transport scan link: 2 max: 1 PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 PCI: pci_scan_bus for bus 1 PCI: 01:01.0 [1022/7450] bus ops PCI: 01:01.0 [1022/7450] enabled PCI: 01:01.1 [1022/7451] ops PCI: 01:01.1 [1022/7451] enabled PCI: 01:02.0 [1022/7450] bus ops PCI: 01:02.0 [1022/7450] enabled PCI: 01:02.1 [1022/7451] ops PCI: 01:02.1 [1022/7451] enabled PCI: 01:03.0 [1022/7460] enabled PCI: 01:04.0 [1022/7468] bus ops PCI: 01:04.0 [1022/7468] enabled PCI: 01:04.1 [1022/7469] ops PCI: 01:04.1 [1022/7469] enabled PCI: 01:04.2 [1022/746a] enabled PCI: 01:04.3 [1022/746b] ops PCI: 01:04.3 [1022/746b] enabled PCI: 01:04.5 [1022/746d] enabled amd8111_enable dev: PCI: 01:04.6 lpc_dev: PCI: 01:04.0 index: 6 reg: ffff -> ffbf done PCI: 01:04.6 [ffff/ffff] disabled PCI: pci_scan_bus for bus 2 PCI: 02:09.0 [14e4/16a7] ops PCI: 02:09.0 [14e4/16a7] enabled PCI: pci_scan_bus returning with max=02 PCI: pci_scan_bus for bus 3 PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus for bus 4 PCI: 04:00.0 [1022/7464] ops PCI: 04:00.0 [1022/7464] enabled PCI: 04:00.1 [1022/7464] ops PCI: 04:00.1 [1022/7464] enabled PCI: 04:00.2 [1022/7463] ops PCI: 04:00.2 [1022/7463] enabled amd8111_enable dev: PCI: 04:01.0 lpc_dev: PCI: 01:04.0 index: 9 reg: ffbf -> fdbf done PCI: 04:01.0 [ffff/ffff] disabled PCI: 04:0b.0 [1095/3114] ops PCI: 04:0b.0 [1095/3114] enabled PCI: 04:0c.0 [104c/8023] ops PCI: 04:0c.0 [104c/8023] enabled PCI: pci_scan_bus returning with max=04 PCI: pci_scan_bus returning with max=04 Hyper transport scan link: 2 new max: 4 Hypertransport scan link done Hyper transport scan link: 0 max: 5 <---- Hang here -----邮件原件----- 发件人: YhLu 发送时间: 2003年10月13日 20:25 收件人: ebiederman(a)lnxi.com 抄送: LinuxBIOS 主题: Re: [COMMIT] freebios2 How much have I broken? Eric, The same. One Clue: Even I do the reverse scan, if I enable the hard_reset in the misc_control.c. After the reset and successful scan the 8131/8111, it will hang when scan the 8151. Regards YH -----邮件原件----- 发件人: YhLu 发送时间: 2003年10月13日 20:00 收件人: ebiederman(a)lnxi.com 抄送: LinuxBIOS 主题: Re: [COMMIT] freebios2 How much have I broken? One minute. -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年10月13日 20:07 收件人: YhLu 抄送: LinuxBIOS 主题: Re: 答复: [COMMIT] freebios2 How much have I broken? YhLu <YhLu(a)tyan.com> writes: > I think Stephan will have trouble on it too. > > For me, If I reverse scan in northbridge.c, and it will be OK. A) the reverse scan works and that is good. > It seems that 8131/8111 need to initialize before others. Why? This is what I am trying to understand. It doesn't make sense especially as I already did that, earlier. The resets to get the hypertransport settings to take effect. I can see those depending on the amd8111. Have you tried the small subroutine change I sent? Eric _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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Re: [COMMIT] freebios2 How much have I broken?
by YhLu 13 Oct '03

13 Oct '03

One minute. -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年10月13日 20:07 收件人: YhLu 抄送: LinuxBIOS 主题: Re: 答复: [COMMIT] freebios2 How much have I broken? YhLu <YhLu(a)tyan.com> writes: > I think Stephan will have trouble on it too. > > For me, If I reverse scan in northbridge.c, and it will be OK. A) the reverse scan works and that is good. > It seems that 8131/8111 need to initialize before others. Why? This is what I am trying to understand. It doesn't make sense especially as I already did that, earlier. The resets to get the hypertransport settings to take effect. I can see those depending on the amd8111. Have you tried the small subroutine change I sent? Eric

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答复: [COMMIT] freebios2 How much have I broken?
by YhLu 13 Oct '03

13 Oct '03

I think Stephan will have trouble on it too. For me, If I reverse scan in northbridge.c, and it will be OK. It seems that 8131/8111 need to initialize before others. Regards YH -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年10月13日 19:24 收件人: YhLu 抄送: LinuxBIOS 主题: Re: [COMMIT] freebios2 How much have I broken? YhLu <YhLu(a)tyan.com> writes: > Eric, > > Still can not enumerate 8151. Ok. Well at least it worked well enough to initialize memory. Thanks for looking at this. I just really want to understand why you have trouble with the 8151. If I can find a reasonable explanation on why you need to do it in a special magic order I don't mind. But without that I am a very nervous about putting in any kind of bug fix. I am still hopeful that it is a routing issue and my less hackish fix will handle it. But it does not seem especially likely at the moment. Eric

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Re: [COMMIT] freebios2 How much have I broken?
by YhLu 13 Oct '03

13 Oct '03

Eric, Still can not enumerate 8151. Regards YH LinuxBIOS-1.1.52.0_Fallback Tue Oct 14 01:39:52 EDT 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 Enumerating: AMD K8 Northbridge Enumerating: AMD K8 Northbridge Enumerating: AMD K8 Enumerating: AMD K8 Enumerating: AMD 8111 Enumerating buses...PCI: pci_scan_bus for bus 0 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] ops PCI: 00:18.3 [1022/1103] enabled PCI: 00:19.0 [1022/1100] enabled PCI: 00:19.1 [1022/1101] enabled PCI: 00:19.2 [1022/1102] enabled PCI: 00:19.3 [1022/1103] ops PCI: 00:19.3 [1022/1103] enabled amdk8_scan_chains max: 0 starting... Hyper transport scan link: 0 max: 1 Missing static device: PCI: 01:00.0 PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [ffff/ffff/00ffff] has unknown header type ff, ignoring. PCI: 01:00.0 No device operations PCI: 01:01.0 [ffff/ffff/00ffff] has unknown header type ff, ignoring. PCI: 01:01.0 No device operations PCI: pci_scan_bus returning with max=01 Hyper transport scan link: 0 new max: 1 Hypertransport scan link done Hyper transport scan link: 2 max: 2 PCI: 02:01.0 [1022/7450] enabled next_unitid: 0003 PCI: 02:03.0 [1022/7460] enabled next_unitid: 0007 PCI: pci_scan_bus for bus 2 PCI: 02:01.0 [1022/7450] bus ops PCI: 02:01.0 [1022/7450] enabled PCI: 02:01.1 [1022/7451] ops PCI: 02:01.1 [1022/7451] enabled PCI: 02:02.0 [1022/7450] bus ops PCI: 02:02.0 [1022/7450] enabled PCI: 02:02.1 [1022/7451] ops PCI: 02:02.1 [1022/7451] enabled PCI: 02:03.0 [1022/7460] enabled PCI: 02:04.0 [1022/7468] bus ops PCI: 02:04.0 [1022/7468] enabled PCI: 02:04.1 [1022/7469] ops PCI: 02:04.1 [1022/7469] enabled PCI: 02:04.2 [1022/746a] enabled PCI: 02:04.3 [1022/746b] ops PCI: 02:04.3 [1022/746b] enabled PCI: 02:04.5 [1022/746d] enabled amd8111_enable dev: PCI: 02:04.6 lpc_dev: PCI: 02:04.0 index: 6 reg: ffff -> ffbf done PCI: 02:04.6 [ffff/ffff] disabled PCI: pci_scan_bus for bus 3 PCI: 03:09.0 [14e4/16a7] ops PCI: 03:09.0 [14e4/16a7] enabled PCI: pci_scan_bus returning with max=03 PCI: pci_scan_bus for bus 4 PCI: pci_scan_bus returning with max=04 PCI: pci_scan_bus for bus 5 PCI: 05:00.0 [1022/7464] ops PCI: 05:00.0 [1022/7464] enabled PCI: 05:00.1 [1022/7464] ops PCI: 05:00.1 [1022/7464] enabled PCI: 05:00.2 [1022/7463] ops PCI: 05:00.2 [1022/7463] enabled amd8111_enable dev: PCI: 05:01.0 lpc_dev: PCI: 02:04.0 index: 9 reg: ffbf -> fdbf done PCI: 05:01.0 [ffff/ffff] disabled PCI: 05:0b.0 [1095/3114] ops PCI: 05:0b.0 [1095/3114] enabled PCI: 05:0c.0 [104c/8023] ops PCI: 05:0c.0 [104c/8023] enabled PCI: pci_scan_bus returning with max=05 PCI: pci_scan_bus returning with max=05 Hyper transport scan link: 2 new max: 5 Hypertransport scan link done amdk8_scan_chains max: 5 done amdk8_scan_chains max: 5 starting... amdk8_scan_chains max: 5 done PCI: pci_scan_bus returning with max=05 done -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年10月13日 18:57 收件人: YhLu 抄送: LinuxBIOS 主题: Re: [COMMIT] freebios2 How much have I broken? YhLu <YhLu(a)tyan.com> writes: > Eric, > > After changed to following, > PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x00000003, > PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, > PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, > PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, Make that: > PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x00000203, > PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, > PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, > PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, So it still goes out link 2 to the amd8111. Eric

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Re: [COMMIT] freebios2 How much have I broken?
by YhLu 13 Oct '03

13 Oct '03

Eric, After changed to following, PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x00000003, PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, LinuxBIOS-1.1.52.0_Fallback Tue Oct 14 01:12:13 EDT 2003 starting... setting up resource map.... done. Enabling routing table for node 00000000 done. Enabling SMP settings setup_remote_node setup_remote_done Renaming current temp node to 00000001 done. Enabling routing table for node 00000001 done. 00000002 nodes initialized. detect_mp_capabilities: 00000002 coherent_ht_finalize done setting up ht links.... done Copying LinuxBIOS to ram. SMBUS controller not found So it seems it can not access the SMBUS and init the RAM anymore. Regards YH. -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年10月13日 18:30 收件人: YhLu 抄送: LinuxBIOS 主题: Re: R: [COMMIT] freebios2 How much have I broken? Ok. I see what the symptoms are and I think I have a clue about what is going on. It is going to take me a little bit to see what I can to fix the problem well enough so it will not recur. /* Config Base and Limit i Registers * F1:0xE0 i = 0 * F1:0xE4 i = 1 * F1:0xE8 i = 2 * F1:0xEC i = 3 * [ 0: 0] Read Enable * 0 = Reads Disabled * 1 = Reads Enabled * [ 1: 1] Write Enable * 0 = Writes Disabled * 1 = Writes Enabled * [ 2: 2] Device Number Compare Enable * 0 = The ranges are based on bus number * 1 = The ranges are ranges of devices on bus 0 * [ 3: 3] Reserved * [ 6: 4] Destination Node * 000 = Node 0 * 001 = Node 1 * 010 = Node 2 * 011 = Node 3 * 100 = Node 4 * 101 = Node 5 * 110 = Node 6 * 111 = Node 7 * [ 7: 7] Reserved * [ 9: 8] Destination Link * 00 = Link 0 * 01 = Link 1 * 10 = Link 2 * 11 - Reserved * [15:10] Reserved * [23:16] Bus Number Base i * This field defines the lowest bus number in configuration region i * [31:24] Bus Number Limit i * This field defines the highest bus number in configuration regin i */ PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x04000203, PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x06050003, PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, You start out with: busses 0 - 4 mapped to node 0 link 2 busses 5 - 6 mapped to node 0 link 0 All other busses disabled. In northbridge.c:amdk8_scan_chains For link 0 I scan through and find that register 0xE4 is used for node 0 link 0. I then pick the next free bus number one and assign that to node 0 link 0, in register 0xE4. But bus 1 is still routed in register 0xE0 to node 0 link 2. I believe 0xE0 comes first and overrides my logic. Either that or the cpu is confused because there are two inconsistent mappings for bus 1. So there look to be two fixes. 1) In resourcemap.c just map bus 0 to the node 0 link 0, and leave everything else unmapped. 2) Modify the bus scanning code to unmap busses beyond it's current maximum, so we do not get ambiguous mappings. Either one should allow the busses to be scanned in either order. I will think through and see if I can code the second fix properly, as it will just save grief. If you can try the simpler solution, I would appreciate it. Eric

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coreboot October 2003