Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/276
-gerrit
commit 4c00556c2f3a2a814c3a484f4ee924c5678037b0 Author: Stefan Reinauer reinauer@chromium.org Date: Fri Oct 14 15:18:29 2011 -0700
use acpi.h include instead of manually adding acpi_slp_type.
Change-Id: I2a3aaf10e453fa6cce8a993356f2a0587178209a Signed-off-by: Stefan Reinauer reinauer@google.com --- src/northbridge/intel/i945/northbridge.c | 3 +-- src/northbridge/intel/sch/northbridge.c | 3 +-- src/southbridge/intel/i82801gx/lpc.c | 3 +-- src/southbridge/via/vt8237r/lpc.c | 4 +--- 4 files changed, 4 insertions(+), 9 deletions(-)
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index dfe4fe7..a10bb4a 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -29,6 +29,7 @@ #include <bitops.h> #include <cpu/cpu.h> #include <boot/tables.h> +#include <arch/acpi.h> #include "chip.h" #include "i945.h"
@@ -252,8 +253,6 @@ static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device) }
#if CONFIG_HAVE_ACPI_RESUME -extern u8 acpi_slp_type; - static void northbridge_init(struct device *dev) { switch (pci_read_config32(dev, SKPAD)) { diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c index ccd0d33..7b7c67b 100644 --- a/src/northbridge/intel/sch/northbridge.c +++ b/src/northbridge/intel/sch/northbridge.c @@ -29,6 +29,7 @@ #include <bitops.h> #include <cpu/cpu.h> #include <boot/tables.h> +#include <arch/acpi.h> #include "chip.h" #include "sch.h"
@@ -267,8 +268,6 @@ static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device) }
#if CONFIG_HAVE_ACPI_RESUME -extern u8 acpi_slp_type; - static void northbridge_init(struct device *dev) { switch (pci_read_config32(dev, SKPAD)) { diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index b4b2f41..ab3c915 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -27,6 +27,7 @@ #include <pc80/i8259.h> #include <arch/io.h> #include <arch/ioapic.h> +#include <arch/acpi.h> #include <cpu/cpu.h> #include "i82801gx.h" #include <cpu/x86/smm.h> @@ -170,8 +171,6 @@ static void i82801gx_gpi_routing(device_t dev) pci_write_config32(dev, 0xb8, reg32); }
-extern u8 acpi_slp_type; - static void i82801gx_power_options(device_t dev) { u8 reg8; diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 61f4989..3e2f215 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -32,6 +32,7 @@ #include <pc80/keyboard.h> #include <pc80/i8259.h> #include <stdlib.h> +#include <arch/acpi.h> #include "vt8237r.h" #include "chip.h"
@@ -147,9 +148,6 @@ static void pci_routing_fixup(struct device *dev) * This avoids having to handle any System Management Interrupts (SMIs). */
-extern u8 acpi_slp_type; - - static void setup_pm(device_t dev) { u16 tmp;