On 06/08/2012 08:57 AM, Andy Sharp wrote:
Hi Steve,
Makes no [substantive] difference. All that does is cause 4 extra lines to be added to the console output:
. . . sb800_enable() PCI: Static device PCI: 00:15.0 not found, disabling it. sb800_enable() PCI: Static device PCI: 00:15.1 not found, disabling it. sb800_enable() PCI: Static device PCI: 00:15.2 not found, disabling it. sb800_enable() PCI: Static device PCI: 00:15.3 not found, disabling it. . .
You also need to tune "gpp_configuration" in devicetree.cb, it depends on the PCIe port configuration, pls. reference the gpp_configuration definition in /src/southbridge/amd/cimx/sb800/chip.h.
The right place to trace port detecting is the CIMX vender code, CheckGppLinkStatus() in Gpp.c.
Thanks
On Thu, Jun 7, 2012 at 2:54 PM, Steve Goodrich <steve.goodrich@se-eng.com mailto:steve.goodrich@se-eng.com> wrote:
ARG…. Thanks, Outlook. :P____ __ __ Andy,____ __ __ Check the devicetree.cb file in your …/src/mainboard/amd/persimmon folder. Mine shows:____ __ __ device pci 15.0 off end # PCIe PortA____ device pci 15.1 off end # PCIe PortB____ device pci 15.2 off end # PCIe PortC____ device pci 15.3 off end # PCIe PortD____ __ __ I’m not 100% certain, but I suspect that changing these from “off” to “on” will enable the devices. Try the change and see if the console output starts reflecting the devices you’re looking for.____ __ __ -- Steve G.____ __ __ __ __ __ __ *From:* coreboot-bounces@coreboot.org <mailto:coreboot-bounces@coreboot.org> [mailto:coreboot-bounces@coreboot.org] *On Behalf Of *Andy Sharp *Sent:* Thursday, June 07, 2012 2:31 PM *To:* coreboot@coreboot.org <mailto:coreboot@coreboot.org> *Subject:* [coreboot] PCIe devices not enabled on amd/persimmon____ __ __ Howdy,____ __ __ I've got an AMD/persimmon board, with the agesa family 14 northbridge on the CPU, and the SB800 southbridge. Both have 4 PCIe ports on them, but coreboot isn't enabling or enumerating any of the PCIe devices on the SB800. Does anyone have any ideas for me? The two devices on that southbridge are an NEC USB3 and a Mini-PCIe slot.____ __ __ __ __ Pasting the console output below for those interested:____ __ __ __ __ coreboot-persimmon1-278-gbbca20f-dirty Wed May 23 12:48:37 PDT 2012 starting...____ POST: 0x34____ BSP Family_Model: 00500f20 ____ cpu_init_detectedx = 00000000 ____ POST: 0x35____ agesawrapper_amdinitmmio passed.____ POST: 0x37____ agesawrapper_amdinitreset passed.____ POST: 0x39____ agesawrapper_amdinitearly POST: 0x34____ BSP Family_Model: 00500f20 ____ cpu_init_detectedx = 00000001 ____ POST: 0x35____ agesawrapper_amdinitmmio passed.____ POST: 0x37____ agesawrapper_amdinitreset passed.____ POST: 0x39____ agesawrapper_amdinitearly passed.____ SLP_TYP type was 0____ POST: 0x40____ agesawrapper_amdinitpost ____ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ __ __ EventLog: EventClass = 2, EventInfo = 8040100.____ Param1 = a00a, Param2 = 0.____ Param3 = 0, Param4 = 0.____ SLP_TYP type was 0____ error level: 4 ____ POST: 0x42____ agesawrapper_amdinitenv SLP_TYP type was 0____ BiosAllocateBuffer BiosHeapBaseAddr: 10000____ SLP_TYP type was 0____ SLP_TYP type was 0____ BiosAllocateBuffer BiosHeapBaseAddr: 10000____ SLP_TYP type was 0____ BiosAllocateBuffer BiosHeapBaseAddr: 10000____ SLP_TYP type was 0____ SLP_TYP type was 0 SLP_TYP type was 0____ passed.____ POST: 0x43____ POST: 0x44____ POST: 0x50____ Loading image.____ CBFS: Looking for 'fallback/coreboot_ram'____ CBFS: found.____ CBFS: loading stage fallback/coreboot_ram @ 0x200000 (1441792 bytes), entry @ 0x200000____ Jumping to image.____ POST: 0x80____ POST: 0x39____ coreboot-persimmon1-278-gbbca20f-dirty Wed May 23 12:48:37 PDT 2012 booting...____ POST: 0x40____ Enumerating buses...____ Show all devs...Before device enumeration.____ Root Device: enabled 1____ APIC_CLUSTER: 0: enabled 1____ APIC: 00: enabled 1____ PCI_DOMAIN: 0000: enabled 1____ PCI: 00:00.0: enabled 1____ PCI: 00:01.0: enabled 1____ PCI: 00:01.1: enabled 1____ PCI: 00:04.0: enabled 1____ PCI: 00:05.0: enabled 0____ PCI: 00:06.0: enabled 0____ PCI: 00:07.0: enabled 0____ PCI: 00:08.0: enabled 0____ PCI: 00:11.0: enabled 1____ PCI: 00:12.0: enabled 1____ PCI: 00:12.1: enabled 1____ PCI: 00:12.2: enabled 1____ PCI: 00:13.0: enabled 1____ PCI: 00:13.1: enabled 1____ PCI: 00:13.2: enabled 1____ PCI: 00:14.0: enabled 1____ I2C: 00:50: enabled 1____ I2C: 00:51: enabled 1____ PCI: 00:14.1: enabled 1____ PCI: 00:14.2: enabled 1____ PCI: 00:14.3: enabled 1____ PNP: 004e.0: enabled 0____ PNP: 004e.3: enabled 0____ PNP: 004e.4: enabled 0____ PNP: 004e.5: enabled 1____ PNP: 004e.6: enabled 0____ PNP: 004e.a: enabled 0____ PNP: 004e.10: enabled 1____ PNP: 004e.11: enabled 0____ PCI: 00:14.4: enabled 1____ PCI: 00:14.5: enabled 1____ PCI: 00:15.0: enabled 0____ PCI: 00:15.1: enabled 0____ PCI: 00:15.2: enabled 0____ PCI: 00:15.3: enabled 0____ PCI: 00:16.0: enabled 0____ PCI: 00:16.2: enabled 0____ PCI: 00:18.0: enabled 1____ PCI: 00:18.1: enabled 1____ PCI: 00:18.2: enabled 1____ PCI: 00:18.3: enabled 1____ PCI: 00:18.4: enabled 1____ PCI: 00:18.5: enabled 1____ PCI: 00:18.6: enabled 1____ PCI: 00:18.7: enabled 1____ Compare with tree...____ Root Device: enabled 1____ APIC_CLUSTER: 0: enabled 1____ APIC: 00: enabled 1____ PCI_DOMAIN: 0000: enabled 1____ PCI: 00:00.0: enabled 1____ PCI: 00:01.0: enabled 1____ PCI: 00:01.1: enabled 1____ PCI: 00:04.0: enabled 1____ PCI: 00:05.0: enabled 0____ PCI: 00:06.0: enabled 0____ PCI: 00:07.0: enabled 0____ PCI: 00:08.0: enabled 0____ PCI: 00:11.0: enabled 1____ PCI: 00:12.0: enabled 1____ PCI: 00:12.1: enabled 1____ PCI: 00:12.2: enabled 1____ PCI: 00:13.0: enabled 1____ PCI: 00:13.1: enabled 1____ PCI: 00:13.2: enabled 1____ PCI: 00:14.0: enabled 1____ I2C: 00:50: enabled 1____ I2C: 00:51: enabled 1____ PCI: 00:14.1: enabled 1____ PCI: 00:14.2: enabled 1____ PCI: 00:14.3: enabled 1____ PNP: 004e.0: enabled 0____ PNP: 004e.3: enabled 0____ PNP: 004e.4: enabled 0____ PNP: 004e.5: enabled 1____ PNP: 004e.6: enabled 0____ PNP: 004e.a: enabled 0____ PNP: 004e.10: enabled 1____ PNP: 004e.11: enabled 0____ PCI: 00:14.4: enabled 1____ PCI: 00:14.5: enabled 1____ PCI: 00:15.0: enabled 0____ PCI: 00:15.1: enabled 0____ PCI: 00:15.2: enabled 0____ PCI: 00:15.3: enabled 0____ PCI: 00:16.0: enabled 0____ PCI: 00:16.2: enabled 0____ PCI: 00:18.0: enabled 1____ PCI: 00:18.1: enabled 1____ PCI: 00:18.2: enabled 1____ PCI: 00:18.3: enabled 1____ PCI: 00:18.4: enabled 1____ PCI: 00:18.5: enabled 1____ PCI: 00:18.6: enabled 1____ PCI: 00:18.7: enabled 1____ Mainboard Persimmon Enable.____ SLP_TYP type was 0____ persimmon_enable, TOP MEM: msr.lo = 0x7f000000, msr.hi = 0x00000000____ persimmon_enable, TOP MEM2: msr2.lo = 0x00000000, msr2.hi = 0x00000000____ persimmon_enable: uma size 0x18000000, memory start 0x67000000____ scan_static_bus for Root Device____ APIC_CLUSTER: 0 enabled____ PCI_DOMAIN: 0000 enabled____ APIC_CLUSTER: 0 scanning...____ AP siblings=1____ CPU: APIC: 00 enabled____ CPU: APIC: 01 enabled____ PCI_DOMAIN: 0000 scanning...____ PCI: pci_scan_bus for bus 00____ POST: 0x24____ PCI: 00:00.0 [1022/1510] ops____ PCI: 00:00.0 [1022/1510] enabled____ PCI: 00:01.0 [1002/9804] enabled____ Capability: type 0x01 @ 0x50____ Capability: type 0x10 @ 0x58____ Capability: type 0x05 @ 0xa0____ Capability: type 0x0d @ 0xb0____ Capability: type 0x08 @ 0xb8____ Capability: type 0x01 @ 0x50____ Capability: type 0x10 @ 0x58____ PCI: 00:04.0 subordinate bus PCI Express____ PCI: 00:04.0 [1022/1512] enabled____ sb800_enable() SLP_TYP type was 0____ PCI: 00:11.0 [1002/4393] ops____ PCI: 00:11.0 [1002/4393] enabled____ sb800_enable() PCI: 00:12.0 [1002/4397] ops____ PCI: 00:12.0 [1002/4397] enabled____ sb800_enable() PCI: Static device PCI: 00:12.1 not found, disabling it.____ sb800_enable() PCI: 00:12.2 [1002/4396] ops____ PCI: 00:12.2 [1002/4396] enabled____ sb800_enable() PCI: 00:13.0 [1002/4397] ops____ PCI: 00:13.0 [1002/4397] enabled____ sb800_enable() PCI: Static device PCI: 00:13.1 not found, disabling it.____ sb800_enable() PCI: 00:13.2 [1002/4396] ops____ PCI: 00:13.2 [1002/4396] enabled____ sb800_enable() sm_init().____ IOAPIC: Clearing IOAPIC at 0xfec00000____ IOAPIC: 23 interrupts____ IOAPIC: reg 0x00000000 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000001 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000002 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000003 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000004 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000005 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000006 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000007 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000008 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000009 value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000a value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000b value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000c value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000d value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000e value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000f value 0x00000000 0x00010000____ IOAPIC: reg 0x00000010 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000011 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000012 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000013 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000014 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000015 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000016 value 0x00000000 0x00010000____ IOAPIC: Initializing IOAPIC at 0xfec00000____ IOAPIC: Bootstrap Processor Local APIC = 0x00____ IOAPIC: ID = 0x02____ IOAPIC: 23 interrupts____ IOAPIC: Enabling interrupts on FSB____ IOAPIC: reg 0x00000000 value 0x00000000 0x00000700____ IOAPIC: reg 0x00000001 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000002 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000003 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000004 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000005 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000006 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000007 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000008 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000009 value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000a value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000b value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000c value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000d value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000e value 0x00000000 0x00010000____ IOAPIC: reg 0x0000000f value 0x00000000 0x00010000____ IOAPIC: reg 0x00000010 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000011 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000012 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000013 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000014 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000015 value 0x00000000 0x00010000____ IOAPIC: reg 0x00000016 value 0x00000000 0x00010000____ PCI: 00:14.0 [1002/4385] enabled____ sb800_enable() PCI: Static device PCI: 00:14.1 not found, disabling it.____ sb800_enable() hda enabled____ PCI: 00:14.2 [1002/4383] ops____ PCI: 00:14.2 [1002/4383] enabled____ sb800_enable() PCI: 00:14.3 [1002/439d] bus ops____ PCI: 00:14.3 [1002/439d] enabled____ sb800_enable() PCI: 00:14.4 [1002/4384] bus ops____ PCI: 00:14.4 [1002/4384] enabled____ sb800_enable() PCI: 00:14.5 [1002/4399] ops____ PCI: 00:14.5 [1002/4399] enabled____ sb800_enable() sb800_enable() sb800_enable() sb800_enable() sb800_enable() sb800_enable() PCI: 00:18.0 [1022/1700] enabled____ PCI: 00:18.1 [1022/1701] enabled____ PCI: 00:18.2 [1022/1702] enabled____ PCI: 00:18.3 [1022/1703] enabled____ PCI: 00:18.4 [1022/1704] enabled____ PCI: 00:18.5 [1022/1718] enabled____ PCI: 00:18.6 [1022/1716] enabled____ PCI: 00:18.7 [1022/1719] enabled____ POST: 0x25____ PCI: Left over static devices:____ PCI: 00:01.1____ PCI: Check your devicetree.cb.____ do_pci_scan_bridge for PCI: 00:04.0____ PCI: pci_scan_bus for bus 01____ POST: 0x24____ PCI: 01:00.0 [10ec/8168] enabled____ POST: 0x25____ PCI: pci_scan_bus returning with max=001____ POST: 0x55____ -- coreboot mailing list: coreboot@coreboot.org <mailto:coreboot@coreboot.org> http://www.coreboot.org/mailman/listinfo/coreboot