Re: [coreboot] IORESOURCE_UMA_FB question

[Kyösti Mälkki]

On Tue, 2013-03-19 at 23:16 -0500, Aaron Durbin wrote:
> Hi corebooters,
>
> I'm trying to understand the reason for the existence of
> IORESOURCE_UMA_FB. Is this to allow one to carve out an uncacheable
> MTRR region for the UMA framebuffer? If so, why was that ram added as
> cacheable to begin with?
>
> Thanks for the help. Full disclosure: I'd like to get rid of it and
> handle these concepts in a different manner.
>
> -Aaron

Hi Aaron

Reasons are in the poor implementation of variable MTRRs and choice of
defined IORESOURCE flags.

Variable MTRR routine causes excessive use of MTRRs when the cacheable
resources do not add to powers of 2. Try describing 3 GiB - 128 MiB
cacheable memory, and current variable MTRR routines might use 5 MTRRs
for that (2048+1024+512+256+128 MiB).

I did quite a few changes on this topic last summer to fix issues with
AMD boards with 4GB or more RAM. I believe I received enough change
resistance to not touch MTRR further.

Also see: http://review.coreboot.org/#/c/1431

Kyösti