Re: [coreboot] PNP logical device handling

[Peter Stuge]

On Sun, Jan 27, 2008 at 01:51:15PM +0100, Rudolf Marek wrote:
> The logical device for SPI flash has only bit 1 for enable/disable.
> Bit 0 is reserved.

I guess bit 3 also reserved?
> Question is how to solve that? Would help to ommit 2e.9 off/on in
> Config.lb? And enable this manually in sio_init in MB specific
> setup?

Is this MB-specific? It sounds like it's superio-specific, in which
case I guess the superio code should take care of not trashing the
register.

//Peter