On 16.09.2008 05:32, ron minnich wrote:
good idea, send me that dts.
It was attached to my earlier reply. I'm attaching it again in case it
was stripped by gmail.
Basically, each of my reviews of your patchset was done by running that
dts through dtc and inspecting statictree.c for possible bugs. Yay for
torture tests! ;-)
Oh, and we should check whether the new dts architecture supports
representing multiprocessor environments with HT links between them.
AFAICS that breaks for current svn HEAD and any of our proposed patches.
We'd need cross-referencing abilities in the dts. And I fear that nobody
will understand a dts for 8 processors in crosssed ladder configuration
with 2 selected HT links out. We need graphical tools for that.
Regards,
Carl-Daniel
--
http://www.hailfinger.org/
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Ronald G. Minnich
rminnich@gmail.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/{
mainboard_vendor = "AMD";
mainboard_name = "Serengeti";
cpus { };
apic@0 {
};
domain@0 {
pci@1,0{
};
/* guesses; we need a real lspci */
pci0@18,0 {
/config/("northbridge/amd/k8/pci");
pci@0,0 {
/config/("southbridge/amd/amd8111/amd8111.dts");
};
pci@4,0 {
/config/("southbridge/amd/amd8111/ide.dts");
};
pci@5,0 {
/config/("southbridge/amd/amd8111/nic.dts");
};
};
pci1@18,0 {
/config/("northbridge/amd/k8/pci");
};
pci2@18,0 {
/config/("northbridge/amd/k8/pci");
/* just for illustrating link #2 */
pci@2,0{
};
};
ioport@2e {
/config/("superio/winbond/w83627hf/dts");
com1enable = "1";
};
};
};
