Richard Smith rsmith@bitworks.com writes:
Eric W. Biederman wrote:
Hmm. I suspect your configuration would look something like:
chip northbridge/intel/440bx device pci_domain 0 on
Ok so I guess I'll start asking questions. "pci_domain" this is the top level I guess? Where are all the different device types listed at?
src/include/device/path.h
The use of "on" this is on as in on/off and not "this item is on this item"
Correct. It is there so we do things like disable unused integrated hardware.
Is the order of the config file related to the order of the init sequence the code generates?
Roughly. Yes.
The compile time information is merged with what can be found dynamically. The resources are allocated (much like v1 pci devices) but the methods can be overridden.
Then the init methods of all of the devices are called.
device apic_cluster 0 on chip cpu/intel/slot_2 device apic 0 on end end end
end
So after I fix up this example to match our board where would my board specific code go? Is there still a mainboard.c? I've got things that disable the secondary IDE controller and a few other specials.
Yes, but we try to avoid
Basically the code is inside out from the v1 tree. That makes the code a little harder to follow but a lot easier to reuse.
I am stunned that the ide interface enable/disable thing has not come up, before. That looks something we have just glossed over. To many other glitches I guess.
I am trying to think of a clean way to handle it so the ide enable/disable can be set in the configuration file.
I can see two possible ways and I will list an example of both: Either we add and ide_socket path and only enable IDE controllers who have an attached socket, or we add a chip specific configuration option.
chip southbridge/intel/piix4e device pci 12.0 on end # ISA bridge device pci 12.1 on device ide_socket on end end # IDE controller device pci 12.1 on end # IDE controller device pci 12.2 on end # USB host controller device pci 12.3 on end # Power management registers
register enable_ide_0 = "1" register enable_ide_1 = "0" end
We can still run mainboard specific code in the appropriate init method. Note however that will be the first init method run. In general it is assumed that the order of init methods does not matter, so the just get run in the order the devices were discovered.
Eric