Author: oxygene Date: Fri May 14 13:02:56 2010 New Revision: 5548 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5548
Log: Remove another set of includes from Fam10 romstages:
northbridge/amd/amdht/ht_wrapper.c northbridge/amd/amdfam10/raminit_amdmct.c cpu/amd/model_10xxx/fidvid.c pc80/mc146818rtc_early.c
They are now included by the fam10 chipset code that requires them.
Signed-off-by: Patrick Georgi patrick.georgi@coresystems.de Acked-by: Peter Stuge peter@stuge.se
Modified: trunk/src/cpu/amd/car/post_cache_as_ram.c trunk/src/cpu/amd/model_10xxx/fidvid.c trunk/src/cpu/amd/model_10xxx/init_cpus.c trunk/src/cpu/amd/quadcore/quadcore.c trunk/src/mainboard/amd/mahogany_fam10/romstage.c trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c trunk/src/mainboard/amd/tilapia_fam10/romstage.c trunk/src/mainboard/msi/ms9652_fam10/romstage.c trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c trunk/src/mainboard/tyan/s2912_fam10/romstage.c trunk/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c trunk/src/northbridge/amd/amdht/h3gtopo.h
Modified: trunk/src/cpu/amd/car/post_cache_as_ram.c ============================================================================== --- trunk/src/cpu/amd/car/post_cache_as_ram.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/cpu/amd/car/post_cache_as_ram.c Fri May 14 13:02:56 2010 (r5548) @@ -3,7 +3,9 @@ */ #include <string.h> #include <arch/stages.h> +#include <cpu/x86/mtrr.h> #include "cpu/amd/car/disable_cache_as_ram.c" +#include "cpu/x86/mtrr/earlymtrr.c"
static inline void print_debug_pcar(const char *strval, uint32_t val) {
Modified: trunk/src/cpu/amd/model_10xxx/fidvid.c ============================================================================== --- trunk/src/cpu/amd/model_10xxx/fidvid.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/cpu/amd/model_10xxx/fidvid.c Fri May 14 13:02:56 2010 (r5548) @@ -18,7 +18,7 @@ */
#if SET_FIDVID == 1 -#include "../../../northbridge/amd/amdht/AsPsDefs.h" +#include <northbridge/amd/amdht/AsPsDefs.h>
#define SET_FIDVID_DEBUG 1
Modified: trunk/src/cpu/amd/model_10xxx/init_cpus.c ============================================================================== --- trunk/src/cpu/amd/model_10xxx/init_cpus.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/cpu/amd/model_10xxx/init_cpus.c Fri May 14 13:02:56 2010 (r5548) @@ -25,6 +25,9 @@ #include <northbridge/amd/amdht/AsPsDefs.h> #include <northbridge/amd/amdht/porting.h>
+#include <cpu/x86/mtrr/earlymtrr.c> +#include <northbridge/amd/amdfam10/raminit_amdmct.c> + //it takes the CONFIG_ENABLE_APIC_EXT_ID and CONFIG_APIC_ID_OFFSET and CONFIG_LIFT_BSP_APIC_ID #ifndef SET_FIDVID #define SET_FIDVID 1 @@ -976,3 +979,5 @@ } #endif } + +#include "fidvid.c"
Modified: trunk/src/cpu/amd/quadcore/quadcore.c ============================================================================== --- trunk/src/cpu/amd/quadcore/quadcore.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/cpu/amd/quadcore/quadcore.c Fri May 14 13:02:56 2010 (r5548) @@ -18,6 +18,8 @@ */
#include <console/console.h> +#include <pc80/mc146818rtc_early.c> +#include <northbridge/amd/amdht/ht_wrapper.c>
#ifndef SET_NB_CFG_54 #define SET_NB_CFG_54 1
Modified: trunk/src/mainboard/amd/mahogany_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/mahogany_fam10/romstage.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/mainboard/amd/mahogany_fam10/romstage.c Fri May 14 13:02:56 2010 (r5548) @@ -46,7 +46,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "option_table.h" -#include "pc80/mc146818rtc_early.c" #include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> @@ -82,10 +81,8 @@ }
#include "northbridge/amd/amdfam10/amdfam10.h" -#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/raminit_amdmct.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c" @@ -95,7 +92,6 @@ #include "cpu/amd/microcode/microcode.c" #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c" -#include "cpu/amd/model_10xxx/fidvid.c"
#include "northbridge/amd/amdfam10/early_ht.c" #include "southbridge/amd/sb700/sb700_early_setup.c"
Modified: trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c Fri May 14 13:02:56 2010 (r5548) @@ -46,7 +46,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "option_table.h" -#include "pc80/mc146818rtc_early.c" #include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> @@ -104,10 +103,8 @@ }
#include "northbridge/amd/amdfam10/amdfam10.h" -#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/raminit_amdmct.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c" @@ -117,7 +114,6 @@ #include "cpu/amd/microcode/microcode.c" #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c" -#include "cpu/amd/model_10xxx/fidvid.c"
#include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdfam10/early_ht.c"
Modified: trunk/src/mainboard/amd/tilapia_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/amd/tilapia_fam10/romstage.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/mainboard/amd/tilapia_fam10/romstage.c Fri May 14 13:02:56 2010 (r5548) @@ -46,7 +46,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "option_table.h" -#include "pc80/mc146818rtc_early.c" #include <console/console.h> #include "lib/ramtest.c" #include <cpu/amd/model_10xxx_rev.h> @@ -82,10 +81,8 @@ }
#include "northbridge/amd/amdfam10/amdfam10.h" -#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/raminit_amdmct.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c" @@ -95,7 +92,6 @@ #include "cpu/amd/microcode/microcode.c" #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c" -#include "cpu/amd/model_10xxx/fidvid.c"
#include "northbridge/amd/amdfam10/early_ht.c" #include "southbridge/amd/sb700/sb700_early_setup.c"
Modified: trunk/src/mainboard/msi/ms9652_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/msi/ms9652_fam10/romstage.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/mainboard/msi/ms9652_fam10/romstage.c Fri May 14 13:02:56 2010 (r5548) @@ -44,7 +44,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "option_table.h" -#include "pc80/mc146818rtc_early.c" #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" @@ -88,10 +87,8 @@ }
#include "northbridge/amd/amdfam10/amdfam10.h" -#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/raminit_amdmct.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c" @@ -123,7 +120,6 @@ #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c"
-#include "cpu/amd/model_10xxx/fidvid.c"
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdfam10/early_ht.c"
Modified: trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/mainboard/supermicro/h8dmr_fam10/romstage.c Fri May 14 13:02:56 2010 (r5548) @@ -42,7 +42,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "option_table.h" -#include "pc80/mc146818rtc_early.c"
#include <console/console.h> #include "lib/ramtest.c" @@ -83,10 +82,8 @@ }
#include "northbridge/amd/amdfam10/amdfam10.h" -#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/raminit_amdmct.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c" @@ -108,7 +105,6 @@ #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c"
-#include "cpu/amd/model_10xxx/fidvid.c"
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdfam10/early_ht.c"
Modified: trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c Fri May 14 13:02:56 2010 (r5548) @@ -42,7 +42,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "option_table.h" -#include "pc80/mc146818rtc_early.c"
#include <console/console.h> #include "lib/ramtest.c" @@ -86,10 +85,8 @@ }
#include "northbridge/amd/amdfam10/amdfam10.h" -#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/raminit_amdmct.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c" @@ -113,7 +110,6 @@ #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c"
-#include "cpu/amd/model_10xxx/fidvid.c"
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdfam10/early_ht.c"
Modified: trunk/src/mainboard/tyan/s2912_fam10/romstage.c ============================================================================== --- trunk/src/mainboard/tyan/s2912_fam10/romstage.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/mainboard/tyan/s2912_fam10/romstage.c Fri May 14 13:02:56 2010 (r5548) @@ -44,7 +44,6 @@ #include <arch/romcc_io.h> #include <cpu/x86/lapic.h> #include "option_table.h" -#include "pc80/mc146818rtc_early.c" #include <console/console.h> #if CONFIG_USBDEBUG_DIRECT #include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" @@ -88,10 +87,8 @@ }
#include "northbridge/amd/amdfam10/amdfam10.h" -#include "northbridge/amd/amdht/ht_wrapper.c"
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c" -#include "northbridge/amd/amdfam10/raminit_amdmct.c" #include "northbridge/amd/amdfam10/amdfam10_pci.c"
#include "resourcemap.c" @@ -120,7 +117,6 @@ #include "cpu/amd/model_10xxx/update_microcode.c" #include "cpu/amd/model_10xxx/init_cpus.c"
-#include "cpu/amd/model_10xxx/fidvid.c"
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c" #include "northbridge/amd/amdfam10/early_ht.c"
Modified: trunk/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c ============================================================================== --- trunk/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c Fri May 14 13:02:56 2010 (r5548) @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <delay.h>
static void set_htic_bit(u8 i, u32 val, u8 bit) {
Modified: trunk/src/northbridge/amd/amdht/h3gtopo.h ============================================================================== --- trunk/src/northbridge/amd/amdht/h3gtopo.h Fri May 14 11:59:59 2010 (r5547) +++ trunk/src/northbridge/amd/amdht/h3gtopo.h Fri May 14 13:02:56 2010 (r5548) @@ -20,6 +20,8 @@ #ifndef HTTOPO_H #define HTTOPO_H
+#include <stddef.h> + /*---------------------------------------------------------------------------- * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS) *