Thank you very much for the reply. I think you mean though that the FSP does NOT need to be touched - correct?
-Bob ________________________________ From: Yang, York [york.yang@intel.com] Sent: Thursday, September 22, 2016 8:34 PM To: Watzlavick, Robert L (US); coreboot@coreboot.org Subject: EXTERNAL: Re: SMI handler for fsp_broadwell_de
Fsp_broadwell_de do not implement the SMI support, but you may refer to soc/Broadwell as both are Intel architecture chipset. The SMI support can be done purely in coreboot, but need to touch FSP.
/ YoRK
From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Watzlavick, Robert L Sent: Thursday, September 22, 2016 4:28 PM To: coreboot@coreboot.org Subject: [coreboot] SMI handler for fsp_broadwell_de
I want to experiment with an SMI handler on the Camelback Mountain CRB (Xeon D-1500) but it appears that the fsp_broadwell_de changes removed SMM support. I’m browsing the coreboot-4.4 release. Was there a reason it was removed? It shows up in the soc/intel/Broadwell area so I suppose I could port over the original code. I didn’t see that the D_LCK bit was set anywhere so does that mean I can potentially let SeaBIOS install an SMI handler? Or is it set in the FSP? I also noticed the mainline has some new code under coreboot/src/soc/intel/sch but I’m not sure which processors that is for.
Thanks, -Bob