[coreboot] [v2] r4854 - branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights

Author: stepan
Date: 2009-10-26 00:56:30 +0100 (Mon, 26 Oct 2009)
New Revision: 4854

Modified:
   branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/Config.lb
   branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/auto.c
Log:
Use Intel Core code for eagleheights CAR init, not Intel Core 2, as
any of the CPUs might be used.

Signed-off-by: Stefan Reinauer 
Acked-by: Peter Stuge

Modified: branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/Config.lb
===================================================================
--- branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/Config.lb	2009-10-25 23:47:38 UTC (rev 4853)
+++ branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/Config.lb	2009-10-25 23:56:30 UTC (rev 4854)
@@ -109,7 +109,7 @@
 ##
 ## Setup Cache-As-Ram
 ##
-mainboardinit cpu/intel/model_6fx/cache_as_ram.inc
+mainboardinit cpu/intel/model_6ex/cache_as_ram.inc

###
 ### This is the early phase of coreboot startup

Modified: branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/auto.c
===================================================================
--- branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/auto.c	2009-10-25 23:47:38 UTC (rev 4853)
+++ branches/coreboot-v2-newbuild/src/mainboard/intel/eagleheights/auto.c	2009-10-25 23:56:30 UTC (rev 4854)
@@ -238,4 +238,4 @@
    sdram_initialize(ARRAY_SIZE(mch), mch);
 }

-#include "cpu/intel/model_6fx/cache_as_ram_disable.c"
+#include "cpu/intel/model_6ex/cache_as_ram_disable.c"