Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2622
-gerrit
commit 78f6e01e44c7da95b95fcab38113d916690a6dd1 Author: Aaron Durbin adurbin@chromium.org Date: Fri Nov 2 09:19:43 2012 -0500
graysreef: update platform information
Some of the Lynx Point ids were off. Correct those and make the pei data BAR fields consistent with the others.
Change-Id: I4102439588362cdb94643bd1ce69c9fa4278329e Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/mainboard/intel/graysreef/romstage.c | 2 +- src/northbridge/intel/haswell/report_platform.c | 9 +++++---- 2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/src/mainboard/intel/graysreef/romstage.c b/src/mainboard/intel/graysreef/romstage.c index 6e35d51..25c17fe 100644 --- a/src/mainboard/intel/graysreef/romstage.c +++ b/src/mainboard/intel/graysreef/romstage.c @@ -135,7 +135,7 @@ void main(unsigned long bist) mchbar: DEFAULT_MCHBAR, dmibar: DEFAULT_DMIBAR, epbar: DEFAULT_EPBAR, - pciexbar: CONFIG_MMCONF_BASE_ADDRESS, + pciexbar: DEFAULT_PCIEXBAR, smbusbar: SMBUS_IO_BASE, wdbbar: 0x4000000, wdbsize: 0x1000, diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c index c65bbe5..e50c757 100644 --- a/src/northbridge/intel/haswell/report_platform.c +++ b/src/northbridge/intel/haswell/report_platform.c @@ -74,10 +74,11 @@ static struct { } pch_table [] = { {0x8c41, "Mobile Engineering Sample"}, {0x8c42, "Desktop Engineering Sample"}, - {0x8c46, "Z87"}, - {0x8c49, "Z85"}, - {0x8c4a, "HM86"}, - {0x8c4b, "H87"}, + {0x8c44, "Z87"}, + {0x8c46, "Z85"}, + {0x8c49, "HM86"}, + {0x8c4a, "H87"}, + {0x8c4b, "HM87"}, {0x8c4c, "Q85"}, {0x8c4e, "Q87"}, {0x8c4f, "QM87"},